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* Utils: Use MDTuple::get() directly, NFCDuncan P. N. Exon Smith2015-01-141-2/+2
| | | | | | Working towards supporting `MDLocation` in `MapMetadata()`. llvm-svn: 225896
* [SimplifyLibCalls] Don't try to simplify indirect calls.Ahmed Bougacha2015-01-143-1/+17
| | | | | | | | | | | | It turns out, all callsites of the simplifier are guarded by a check for CallInst::getCalledFunction (i.e., to make sure the callee is direct). This check wasn't done when trying to further optimize a simplified fortified libcall, introduced by a refactoring in r225640. Fix that, add a testcase, and document the requirement. llvm-svn: 225895
* Remove unused predicate.Eric Christopher2015-01-141-2/+0
| | | | llvm-svn: 225893
* Migrate ABIName to MCTargetOptions so that it can be shared betweenEric Christopher2015-01-147-26/+28
| | | | | | the TargetMachine level and the MC level. llvm-svn: 225891
* Don't set LD_PRELOAD to ''. It doesn't work on OpenBSD.Rafael Espindola2015-01-141-1/+5
| | | | | | Patch by Brad Smith. llvm-svn: 225890
* Revert r225854: [PM] Move the LazyCallGraph printing functionality toChandler Carruth2015-01-142-44/+36
| | | | | | | | | | | | | | | a print method. This was formulated on a bad idea, but sadly I didn't uncover how bad this was until I got further down the path. I had hoped that we could provide a low boilerplate way of printing analyses, but it just doesn't seem like this really fits the needs of the analyses. Not all analyses really want to do printing, and those that do don't all use the same interface. Instead, with the new pass manager let's just take advantage of the fact that creating an explicit printer pass like the LCG has is pretty low boilerplate already and rely on that for testing. llvm-svn: 225861
* Debug Info: Don't bother emitting DW_AT_frame_base if the function hasAdrian Prantl2015-01-141-1/+2
| | | | | | no frame register. "Tested" via an assertion triggered by DwarfExpression. llvm-svn: 225858
* Revert "Debug Info: Bail out of AddMachineRegPiece() if MachineReg is not a"Adrian Prantl2015-01-141-6/+0
| | | | | | | | | This reverts commit r225852, it was a bad idea. MachineReg should always be a physical register. If it isn't this DebugLoc shouldn't have been created in the first place. llvm-svn: 225857
* [PM] Move the LazyCallGraph printing functionality to a print method.Chandler Carruth2015-01-132-36/+44
| | | | | | | | I'm adding generic analysis printing utility pass support which will require such a method (or a specialization) so this will let the existing printing logic satisfy that. llvm-svn: 225854
* Debug Info: Bail out of AddMachineRegPiece() if MachineReg is not aAdrian Prantl2015-01-131-0/+6
| | | | | | | physical register. The call to getMinimalPhysRegClass() later on asserts on this condition. llvm-svn: 225852
* Debug Info: Move the complex expression handling (=the remainder) ofAdrian Prantl2015-01-135-52/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | emitDebugLocValue() into DwarfExpression. Ought to be NFC, but it actually uncovered a bug in the debug-loc-asan.ll testcase. The testcase checks that the address of variable "y" is stored at [RSP+16], which also lines up with the comment. It also check(ed) that the *value* of "y" is stored in RDI before that, but that is actually incorrect, since RDI is the very value that is stored in [RSP+16]. Here's the assembler output: movb 2147450880(%rcx), %r8b #DEBUG_VALUE: bar:y <- RDI cmpb $0, %r8b movq %rax, 32(%rsp) # 8-byte Spill movq %rsi, 24(%rsp) # 8-byte Spill movq %rdi, 16(%rsp) # 8-byte Spill .Ltmp3: #DEBUG_VALUE: bar:y <- [RSP+16] Fixed the comment to spell out the correct register and the check to expect an address rather than a value. Note that the range that is emitted for the RDI location was and is still wrong, it claims to begin at the function prologue, but really it should start where RDI is first assigned. llvm-svn: 225851
* [AVX512] Add 16x32 unpck tests as wellAdam Nemet2015-01-131-0/+40
| | | | | | Forgot this from r225838. llvm-svn: 225850
* cleanup.Adrian Prantl2015-01-131-3/+2
| | | | llvm-svn: 225848
* Document, cleanup, and clang-format DwarfExpression.hAdrian Prantl2015-01-131-12/+14
| | | | llvm-svn: 225847
* Debug Info: Turn DIExpression::getFrameRegister() into an isFrameRegister()Adrian Prantl2015-01-134-8/+9
| | | | | | | | function. NFC. llvm-svn: 225846
* R600/SI: Add pattern for bitcasting fp immediates to integersTom Stellard2015-01-138-56/+39
| | | | | | | | The backend now assumes that all immediates are integers. This allows us to simplify immediate handling code, becasue we no longer need to handle fp and integer immediates differently. llvm-svn: 225844
* [PM] Remove the defunt CGSCC-specific debug flag.Chandler Carruth2015-01-133-21/+17
| | | | | | | | Even before I sunk the debug flag into the opt tool this had been made obsolete by factoring the pass and analysis managers into a single set of templates that all used the core flag. No functionality changed here. llvm-svn: 225842
* [PM] Push the debug option for the new pass manager into the opt toolChandler Carruth2015-01-135-52/+70
| | | | | | | | | | and expose the necessary hooks in the API directly. This makes it much cleaner for example to log the usage of a pass manager from a library. It also makes it more obvious that this functionality isn't "optional" or "asserts-only" for the pass manager. llvm-svn: 225841
* Fix function names in tests from r225838.Adam Nemet2015-01-131-8/+8
| | | | llvm-svn: 225840
* [AVX512] Unpack support in new shuffle loweringAdam Nemet2015-01-132-0/+70
| | | | | | | | | | | This now handles both 32 and 64-bit element sizes. In this version, the test are in vector-shuffle-512-v8.ll, canonicalized by Chandler's update_llc_test_checks.py. Part of <rdar://problem/17688758> llvm-svn: 225838
* [AVX512] Add pretty-printing of shuffle mask for unpacksAdam Nemet2015-01-131-0/+64
| | | | llvm-svn: 225837
* DAGCombiner: simplify by using condition variables; NFCMatthias Braun2015-01-132-18/+15
| | | | llvm-svn: 225836
* [PM] Sink the convenience typedefs after the class template they areChandler Carruth2015-01-131-4/+7
| | | | | | | | | referring to and give them nice comments. Previously, these were used, but now things use the generic form of the AnalysisManager. llvm-svn: 225833
* AsmParser/Bitcode: Add support for MDLocationDuncan P. N. Exon Smith2015-01-1315-5/+284
| | | | | | | | | | | | This adds assembly and bitcode support for `MDLocation`. The assembly side is rather big, since this is the first `MDNode` subclass (that isn't `MDTuple`). Part of PR21433. (If you're wondering where the mountains of testcase updates are, we don't need them until I update `DILocation` and `DebugLoc` to actually use this class.) llvm-svn: 225830
* R600: Implement getRecipEstimateMatt Arsenault2015-01-135-2/+42
| | | | | | | | | This requires a new hook to prevent expanding sqrt in terms of rsqrt and reciprocal. v_rcp_f32, v_rsq_f32, and v_sqrt_f32 are all the same rate, so this expansion would just double the number of instructions and cycles. llvm-svn: 225828
* R600: Implement getRsqrtEstimateMatt Arsenault2015-01-134-1/+63
| | | | | | | | Only do for f32 since I'm unclear on both what this is expecting for the refinement steps in terms of accuracy, and what f64 instruction actually provides. llvm-svn: 225827
* IR: Fix GCC error from MDLocation::getInlinedAt()Duncan P. N. Exon Smith2015-01-131-1/+3
| | | | | | | Apparently GCC didn't like my ternary operator from r225824. Use an `if`. llvm-svn: 225826
* IR: Add MDLocation classDuncan P. N. Exon Smith2015-01-137-4/+266
| | | | | | | | | | | Add a new subclass of `UniquableMDNode`, `MDLocation`. This will be the IR version of `DebugLoc` and `DILocation`. The goal is to rename this to `DILocation` once the IR classes supersede the `DI`-prefixed wrappers. This isn't used anywhere yet. Part of PR21433. llvm-svn: 225824
* R600: Make cttz / ctlz cheap to speculateMatt Arsenault2015-01-133-0/+239
| | | | | | | | | Speculating things is generally good. SI+ has instructions for these for 32-bit values. This is still probably better even with the expansion for 64-bit values, although it is odd that this callback doesn't have the size as a parameter. llvm-svn: 225822
* Fix non-determinism issue in SLPJulien Lerouge2015-01-131-1/+1
| | | | | | | | | | | | | | | The issue was introduced in r214638: + for (auto &BSIter : BlocksSchedules) { + scheduleBlock(BSIter.second.get()); + } Because BlocksSchedules is a DenseMap with BasicBlock* keys, blocks are scheduled in non-deterministic order, resulting in unpredictable IR. Patch by Daniel Reynaud! llvm-svn: 225821
* Use the integrated assembler as default on SystemZUlrich Weigand2015-01-1323-22/+24
| | | | | | | | | | This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases deliberately using an invalid instruction in inline asm now have to use -no-integrated-as. llvm-svn: 225820
* Use the integrated assembler as default on PowerPCUlrich Weigand2015-01-137-13/+13
| | | | | | | | | | | This was already done in clang, this commit now uses the integrated assembler as default when using LLVM tools directly. A number of test cases using inline asm had to be adapted, either by updating the expected output, or by using -no-integrated-as (for such tests that deliberately use an invalid instruction in inline asm). llvm-svn: 225819
* Running clang-format on CommandLine.h and CommandLine.cpp.Chris Bieneman2015-01-132-653/+695
| | | | | | No functional changes, I'm just going to be doing a lot of work in these files and it would be helpful if they had more current LLVM style. llvm-svn: 225817
* Add link to Go bindings documentation.Peter Collingbourne2015-01-131-0/+2
| | | | llvm-svn: 225815
* Revert "r225808 - [PowerPC] Add StackMap/PatchPoint support"Hal Finkel2015-01-1317-1116/+98
| | | | | | | Reverting this while I investiage buildbot failures (segfaulting in GetCostForDef at ScheduleDAGRRList.cpp:314). llvm-svn: 225811
* Update multiline.ll testcase to handle (ppc64le) .localentry directiveWill Schmidt2015-01-131-1/+1
| | | | | | | | | | | | The ppc64le platform will emit a .localentry directive. This is triggering a false-positive against a CHECK-NOT: .loc in multiline.ll. Add a space "{{ }}" to the check-not line to allow for arguments, and prevent .localentry from matching. Differential Revision: http://reviews.llvm.org/D6935 llvm-svn: 225810
* [PowerPC] Add missing override keywordHal Finkel2015-01-131-1/+1
| | | | llvm-svn: 225809
* [PowerPC] Add StackMap/PatchPoint supportHal Finkel2015-01-1317-98/+1116
| | | | | | | | | | | | | | | | | | | | | | | | | This commit does two things: 1. Refactors PPCFastISel to use more of the common infrastructure for call lowering (this lets us take advantage of this common code for lowering some common intrinsics, stackmap/patchpoint among them). 2. Adds support for stackmap/patchpoint lowering. For the most part, this is very similar to the support in the AArch64 target, with the obvious differences (different registers, NOP instructions, etc.). The test cases are adapted from the AArch64 test cases. One difference of note is that the patchpoint call sequence takes 24 bytes, so you can't use less than that (on AArch64 you can go down to 16). Also, as noted in the docs, we take the patchpoint address to be the actual code address (assuming the call is local in the TOC-sharing sense), which should yield higher performance than generating the full cross-DSO indirect-call sequence and is likely just as useful for JITed code (if not, we'll change it). StackMaps and Patchpoints are still marked as experimental, and so this support is doubly experimental. So go ahead and experiment! llvm-svn: 225808
* [StackMaps] Use CurrentFnSymForSizeHal Finkel2015-01-131-1/+1
| | | | | | | | When computing the call-site offset, use AP.CurrentFnSymForSize instead of AP.CurrentFnSym. There should be no change for other targets, but this is necessary for generating valid expressions for PPC64/ELF. llvm-svn: 225807
* [StackMaps] Mark in CallLoweringInfo when lowering a patchpointHal Finkel2015-01-135-6/+22
| | | | | | | | | | | | | | | While, generally speaking, the process of lowering arguments for a patchpoint is the same as lowering a regular indirect call, on some targets it may not be exactly the same. Targets may not, for example, want to add additional register dependencies that apply only to making cross-DSO calls through linker stubs, may not want to load additional registers out of function descriptors, and may not want to add additional side-effect-causing instructions that cannot be removed later with the call itself being generated. The PowerPC target will use this in a future commit (for all of the reasons stated above). llvm-svn: 225806
* [StackMaps] Allow the target to pre-process the live-out maskHal Finkel2015-01-132-0/+7
| | | | | | | | | | | | | | Some targets, PowerPC for example, have pseudo-registers (such as that used to represent the rounding mode), that don't have DWARF register numbers or a register class. These are used only for internal dependency tracking, and should not appear in the recorded live-outs. This adds a callback allowing the target to pre-process the live-out mask in order to remove these kinds of registers so that the StackMaps code does not complain about them and/or attempt to include them in the output. This will be used by the PowerPC target in a future commit. llvm-svn: 225805
* [PowerPC] Split the blr definition into BLR and BLR8Hal Finkel2015-01-135-6/+13
| | | | | | | | | | We really need a separate 64-bit version of this instruction so that it can be marked as clobbering LR8 (instead of just LR). No change in functionality (although the verifier might be slightly happier), however, it is required for stackmap/patchpoint support. Thus, this will be covered by stackmap test cases once those are added. llvm-svn: 225804
* [PowerPC] Add DWARF numbers for CA (XER), etc.Hal Finkel2015-01-131-5/+4
| | | | | | | | | | | | For registers that have DWARF numbers (like CA, which is really part of XER), add them. Also, RM is not an SPR, and the declaration hack (where it is declared as an SPR with an arbitrary number) is not needed, so just declare it as a register. NFC; although CA's register number will be needed when stackmap/patchpoint support is added. llvm-svn: 225800
* [mips][microMIPS] Fix issue with 16b instructions in jr instruction delay slotJozef Kolek2015-01-132-5/+64
| | | | | | | | | 16 bit instructions are not allowed in jr delay slot. Same stands for PseudoIndirectBranch and PseudoReturn. Differential Revision: http://reviews.llvm.org/D6815 llvm-svn: 225798
* Added a Mips lld milestone to the release notes for the 3.6 release.Daniel Sanders2015-01-131-4/+5
| | | | llvm-svn: 225797
* Added TLI hook for isFPExtFree. Some of the FMA combine heuristics are now ↵Olivier Sallenave2015-01-134-63/+85
| | | | | | guarded with that hook. llvm-svn: 225795
* Revert "SLPVectorizer: Cache results from memory alias checking."Erik Eckstein2015-01-131-49/+19
| | | | | | The alias cache has a problem of incorrect collisions in case a new instruction is allocated at the same address as a previously deleted instruction. llvm-svn: 225790
* Silence warnings about unknown pragmas for compilers that are not Clang. NFC.Aaron Ballman2015-01-131-1/+4
| | | | llvm-svn: 225788
* [OCaml] Allow out-of-tree builds of LLVM bindings.Peter Zotov2015-01-131-2/+9
| | | | | | | | | | | | In order to use this feature, configure LLVM as usual, but then build and install it as: make all install SYSTEM_LLVM_CONFIG=llvm-config where llvm-config is the llvm-config binary installed on your system (possibly llvm-config-VERSION on e.g. Debian). llvm-svn: 225787
* SLPVectorizer: Cache results from memory alias checking.Erik Eckstein2015-01-131-19/+49
| | | | | | | This speeds up the dependency calculations for blocks with many load/store/call instructions. Beside the improved runtime, there is no functional change. llvm-svn: 225786
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