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* revert r148691 and 148693Chris Lattner2012-01-234-67/+61
| | | | llvm-svn: 148698
* Implemented AddressSanitizer::getPassName()Alexander Potapenko2012-01-231-0/+5
| | | | llvm-svn: 148697
* ARMAsmPrinter.cpp: Try to fix up r148686. EnableARMEHABI was also here.NAKAMURA Takumi2012-01-231-2/+3
| | | | llvm-svn: 148694
* switch UndefValue and ConstantPointerNull over to DenseMap's for uniquing.Chris Lattner2012-01-234-40/+44
| | | | llvm-svn: 148693
* Fix broken link.Nick Lewycky2012-01-231-1/+1
| | | | llvm-svn: 148692
* Replace a use of ConstantUniqueMap for CAZ constants with a simple DenseMap.Chris Lattner2012-01-234-21/+23
| | | | | | | Now that the type system rewrite has landed, there is no need for its complexity and std::map'ness. llvm-svn: 148691
* allow OwningPtr to be copy constructed if null, which is required toChris Lattner2012-01-231-2/+5
| | | | | | make them be a valuetype in a DenseMap. llvm-svn: 148688
* Custom lower PCMPEQ/PCMPGT intrinsics to target specific nodes and remove ↵Craig Topper2012-01-232-301/+165
| | | | | | the intrinsic patterns. llvm-svn: 148687
* An option to selectively enable parts of ARM EHABI support.Evgeniy Stepanov2012-01-234-12/+26
| | | | | | | | This change adds an new value to the --arm-enable-ehabi option that disables emitting unwinding descriptors. This mode gives a working backtrace() without the (currently broken) exception support. llvm-svn: 148686
* Update more places to use target specific nodes for vector shifts instead of ↵Craig Topper2012-01-231-42/+19
| | | | | | intrinsics. llvm-svn: 148685
* Custom lower vector shift intrinsics to target specific nodes and remove the ↵Craig Topper2012-01-232-385/+156
| | | | | | patterns that are no longer needed. llvm-svn: 148684
* Avoid using an invalidated iterator.Rafael Espindola2012-01-231-1/+5
| | | | llvm-svn: 148681
* The iteration order over a std::set<Module*> depends on the addresses of theRafael Espindola2012-01-233-16/+18
| | | | | | modules. Avoid that to make the order the linker sees the modules deterministic. llvm-svn: 148676
* Remove pattern fragments for v32i8, v16i16, v8i32, v16i8, v8i16, and v4i32 ↵Craig Topper2012-01-232-30/+2
| | | | | | loads. All integer vector loads are promoted to v2i64 or v4i64 so these pattern fragments can never match. Fix or remove patterns that used these fragments. llvm-svn: 148672
* Make Value::isDereferenceablePointer() handle unreachable code blocks. (ThisNick Lewycky2012-01-232-7/+45
| | | | | | | | returns false in the event the computation feeding into the pointer is unreachable, which maybe ought to be true -- but this is at least consistent with undef->isDereferenceablePointer().) Fixes PR11825! llvm-svn: 148671
* Combine X86 CMPPD and CMPPS node types. Simplifies selection code and ↵Craig Topper2012-01-224-25/+26
| | | | | | pattern matching. llvm-svn: 148670
* Merge PCMPEQB/PCMPEQW/PCMPEQD/PCMPEQQ and PCMPGTB/PCMPGTW/PCMPGTD/PCMPGTQ ↵Craig Topper2012-01-224-87/+66
| | | | | | X86 ISD node types into only two node types. Simplifying opcode selection and pattern matching. llvm-svn: 148667
* Use Attributes::None instead of 0 after r148553 change on Attributes from ↵Nicolas Geoffray2012-01-221-1/+1
| | | | | | unsigned to their own class. llvm-svn: 148665
* Add target specific ISD node types for SSE/AVX vector shuffle instructions ↵Craig Topper2012-01-224-273/+410
| | | | | | and change all the code that used to create intrinsic nodes to create the new nodes instead. llvm-svn: 148664
* Add an option to disable buggy copy propagation passAnton Korobeynikov2012-01-221-1/+3
| | | | llvm-svn: 148662
* unittests/Support/Casting.cpp: [PR8226] Workaround for MSVC|Debug.NAKAMURA Takumi2012-01-221-3/+2
| | | | llvm-svn: 148659
* Add fused multiple+add instructions from VFPv4.Anton Korobeynikov2012-01-229-27/+254
| | | | | | Patch by Ana Pazos! llvm-svn: 148658
* Remove trailing spacesEli Bendersky2012-01-221-3/+3
| | | | llvm-svn: 148655
* Remove trailing spacesEli Bendersky2012-01-221-2/+2
| | | | llvm-svn: 148654
* Basic runtime dynamic loading capabilities added to ELFObjectFile, implementedEli Bendersky2012-01-223-20/+254
| | | | | | | | | | | | | in a subclass named DyldELFObject. This class supports rebasing the object file it represents by re-mapping section addresses to the actual memory addresses the object was placed in. This is required for MC-JIT implementation on ELF with debugging support. Patch reviewed on llvm-commits. Developed together with Ashok Thirumurthi and Andrew Kaylor. llvm-svn: 148653
* Split the lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h header to ↵Eli Bendersky2012-01-226-135/+373
| | | | | | | | | | smaller logical headers. ELF and MachO implementations of RuntimeDyldImpl go into their own header files now. Reviewed on llvm-commits llvm-svn: 148652
* Make code a little less verbose.Craig Topper2012-01-221-7/+5
| | | | llvm-svn: 148651
* Help GCC along with code that's actually unreachable.David Blaikie2012-01-221-0/+3
| | | | | | | | Unfortunately I don't think there's a fix for this that will work upstream and also satisfy Clang's -Wunreachable-code, which is a pity. But I'll give it some more thought -perhaps there's some way out. llvm-svn: 148645
* Remove unused X86 ISD node type defines.Craig Topper2012-01-222-8/+0
| | | | llvm-svn: 148644
* Move some vector shift patterns into their instruction definitions.Craig Topper2012-01-221-48/+42
| | | | llvm-svn: 148643
* Add memory patterns for some of the fp<->integer conversion instructions. ↵Craig Topper2012-01-211-24/+28
| | | | | | Fold some patterns into instruction definitions. llvm-svn: 148641
* Remove unreachable defaults from gtest.David Blaikie2012-01-213-5/+0
| | | | | | This will ensure LLVM and Clang build -Wswitch-enum-redundant-default (an on-by-default warning I'm about to add to Clang). llvm-svn: 148639
* Remove unused variables.Benjamin Kramer2012-01-211-2/+0
| | | | llvm-svn: 148635
* Fix PR11819 introduced by r148537. I'd commit the test case, but the ↵Craig Topper2012-01-211-2/+2
| | | | | | generated code is terrible as it gets fully scalarized. Expect a future commit to fix that. llvm-svn: 148632
* Fix an obvious typo.Evan Cheng2012-01-211-1/+1
| | | | llvm-svn: 148622
* Handle register masks in LiveVariables.Jakob Stoklund Olesen2012-01-212-0/+33
| | | | | | | | | | | A register mask operand kills any live physreg that isn't preserved. Unlike an implicit-def operand, the clobbered physregs are never live afterwards. This means LiveVariables has to track a much smaller number of live physregs, and it should spend much less time in addRegisterDead(). llvm-svn: 148609
* RuntimeDyld alignment adjustment from MachO file.Jim Grosbach2012-01-211-2/+4
| | | | | | | | The MachO file stores section alignment as log2(alignment-in-bytes). The allocation routines want the raw alignment-in-bytes value, so adjust for that. llvm-svn: 148604
* Thumb2 'add rd, pc, imm' alternate form for 'adr' instruction.Jim Grosbach2012-01-212-1/+6
| | | | llvm-svn: 148601
* Delete an unused member variable.Jakob Stoklund Olesen2012-01-203-8/+0
| | | | llvm-svn: 148594
* Fix inverted condition.Jim Grosbach2012-01-201-1/+1
| | | | llvm-svn: 148593
* Intel syntax: Robustify register parsing.Devang Patel2012-01-202-28/+18
| | | | llvm-svn: 148591
* Support register masks in MachineLICM.Jakob Stoklund Olesen2012-01-201-23/+36
| | | | | | Only PostRA LICM is affected. llvm-svn: 148589
* Handle register masks in DeadMachineInstructionElim.Jakob Stoklund Olesen2012-01-201-0/+7
| | | | | | Don't track live physregs that are clobbered by a register mask operand. llvm-svn: 148588
* More dead code removal (using -Wunreachable-code)David Blaikie2012-01-20110-443/+180
| | | | llvm-svn: 148578
* Handle a corner case with IV chain collection with bailout instead of assert.Andrew Trick2012-01-202-2/+49
| | | | | | Fixes PR11783: bad cast to AddRecExpr. llvm-svn: 148572
* Test case comments missing from my previous checkin.Andrew Trick2012-01-201-0/+5
| | | | llvm-svn: 148571
* Intel syntax: Parse ... PTR [-8]Devang Patel2012-01-202-1/+7
| | | | llvm-svn: 148570
* Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax.Devang Patel2012-01-202-2/+7
| | | | llvm-svn: 148569
* ARM vector any_extends need to be selected to vmovl. <rdar://problem/10723651>Bob Wilson2012-01-202-0/+20
| | | | | | | | We have patterns for vector sext and zext operations but were missing anyext. Without those patterns, codegen will fail when the selection DAG has any_extend nodes. llvm-svn: 148568
* TblGen diagnostic for mismatched template instantiation.Jim Grosbach2012-01-201-0/+4
| | | | | | | | | | | | | | | | | | Providing a template argment to a non-templatized class was crashing tblgen. Add a diagnostic. For example, $ cat bug.td class A; def B : A<0> { } $ llvm-tblgen bug.td bug.td:3:11: error: template argument provided to non-template class def B : A<0> { ^ llvm-svn: 148565
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