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* - Slight change to finalizeBundle() interface. LastMI is not exclusive (pointingEvan Cheng2012-01-193-5/+28
| | | | | | | | | | | to instruction right after the last instruction in the bundle. - Add a finalizeBundle() variant that doesn't specify LastMI. Instead, the code will find the last instruction in the bundle by following the 'InsideBundle' marker. This is useful in case bundles are formed early (i.e. during MI scheduling) but finalized later (i.e. after register allocator has finished rewriting virtual registers with physical registers). llvm-svn: 148444
* Add a TargetOption for disabling tail calls.Nick Lewycky2012-01-194-3/+57
| | | | llvm-svn: 148442
* Rename Finalizebundle to finalizeBundle to conform to coding guideline.Evan Cheng2012-01-193-5/+5
| | | | llvm-svn: 148440
* Add experimental -x86-use-regmask command line option.Jakob Stoklund Olesen2012-01-181-0/+12
| | | | | | | | It adds register mask operands to x86 call instructions. Once all the backend passes support register mask operands, this will be permanently enabled. llvm-svn: 148438
* Ignore register mask operands when lowering instructions to MC.Jakob Stoklund Olesen2012-01-186-1/+17
| | | | | | | This is similar to implicit register operands. MC doesn't understand register liveness and call clobbers. llvm-svn: 148437
* Add a RegisterMaskSDNode class.Jakob Stoklund Olesen2012-01-187-3/+41
| | | | | | | | | | | This SelectionDAG node will be attached to call nodes by LowerCall(), and eventually becomes a MO_RegisterMask MachineOperand on the MachineInstr representing the call instruction. LowerCall() will attach a register mask that depends on the calling convention. llvm-svn: 148436
* Add support for the gnueabihf environment. Patch by Sylvestre Ledru.Rafael Espindola2012-01-182-0/+4
| | | | llvm-svn: 148434
* Thumb2 alternate syntax for LDR(literal) and friends.Jim Grosbach2012-01-184-0/+96
| | | | | | | | Explicit pc-relative syntax. For example, "ldrb r2, [pc, #-22]". rdar://10250964 llvm-svn: 148432
* Process instructions after match to select alternative encoding which may be ↵Devang Patel2012-01-182-16/+111
| | | | | | more desirable. llvm-svn: 148431
* Replace FIXME with explanatory comment.Jim Grosbach2012-01-181-1/+2
| | | | llvm-svn: 148427
* Thumb2 relaxation for LDR(literal).Jim Grosbach2012-01-182-9/+33
| | | | | | | | | If the fixup is out of range for the Thumb1 instruction, relax it to the Thumb2 encoding instead. rdar://10711829 llvm-svn: 148424
* MCAssembler tweak for determining when a symbol difference is resolved.Jim Grosbach2012-01-181-1/+2
| | | | | | | | | | | | If the two fragments are in the same Atom, then the difference expression is resolvable at compile time. Previously we were checking that they were in the same fragment, but that breaks down in the presence of instruction relaxation which has multiple fragments in the same atom. rdar://10711829 llvm-svn: 148423
* Rename pattern for clarity.Jim Grosbach2012-01-181-4/+3
| | | | llvm-svn: 148422
* Add a depth limit to avoid runaway recursion.Dan Gohman2012-01-181-3/+7
| | | | llvm-svn: 148419
* Use llvm.global_ctors to locate global constructors insteadDan Gohman2012-01-182-6/+21
| | | | | | of recognizing them by name. llvm-svn: 148416
* Remove trailing spaces and unneeded includes.Jakub Staszak2012-01-181-134/+131
| | | | llvm-svn: 148415
* Document the fact that the selection dag changes the vselect condition typeNadav Rotem2012-01-181-0/+3
| | | | llvm-svn: 148411
* Fixed macro condition.Lang Hames2012-01-181-1/+1
| | | | llvm-svn: 148408
* Tidy up. 80 columns.Jim Grosbach2012-01-181-13/+13
| | | | llvm-svn: 148401
* Tidy up. MCAsmBackend naming conventions.Jim Grosbach2012-01-189-57/+57
| | | | llvm-svn: 148400
* Remove dead code.Bill Wendling2012-01-181-45/+0
| | | | llvm-svn: 148384
* Fix a bug in the type-legalization of vector integers. When we bitcast one ↵Nadav Rotem2012-01-182-2/+18
| | | | | | vector type to another, we must not bitcast the result if one type is widened while the other is promoted. llvm-svn: 148383
* Fix ISD::REG_SEQUENCE to accept physical registers and change ↵Pete Cooper2012-01-182-16/+24
| | | | | | TwoAddressInstructionPass to insert copies for any physical reg operands of the REG_SEQUENCE llvm-svn: 148377
* Thumb2 load/store fixups don't set the thumb bit.Jim Grosbach2012-01-181-4/+8
| | | | | | | | | | Load/store instructions w/ a fixup to be relative a function marked as thumb don't use the low bit to specify thumb vs. non-thumb like interworking branches do, so don't set it when dealing with those fixups. rdar://10348687. llvm-svn: 148366
* Move some ARM specific MCAssmebler bits into the ARMAsmBackend.Jim Grosbach2012-01-183-9/+27
| | | | llvm-svn: 148364
* Add a CoveredBySubRegs property to Register descriptions.Jakob Stoklund Olesen2012-01-188-14/+53
| | | | | | | | | | | | | | | | When set, this bit indicates that a register is completely defined by the value of its sub-registers. Use the CoveredBySubRegs property to infer which super-registers are call-preserved given a list of callee-saved registers. For example, the ARM registers D8-D15 are callee-saved. This now automatically implies that Q4-Q7 are call-preserved. Conversely, Win64 callees save XMM6-XMM15, but the corresponding YMM6-YMM15 registers are not call-preserved because they are not fully defined by their sub-registers. llvm-svn: 148363
* [lit] Add a --filter option which is useful when dealing with virtual testDaniel Dunbar2012-01-181-0/+18
| | | | | | paths. llvm-svn: 148362
* Remove unneeded include.Jakub Staszak2012-01-171-1/+0
| | | | llvm-svn: 148360
* Implement ARMBaseRegisterInfo::getCallPreservedMask().Jakob Stoklund Olesen2012-01-173-19/+17
| | | | | | Move ARM callee-saved lists into ARMCallingConv.td. llvm-svn: 148357
* Fix MCJIT memory leak of owned TargetMachine.Jim Grosbach2012-01-171-0/+1
| | | | | | | The JIT is expected to take ownership of the TM that's passed in. The MCJIT wasn't freeing it, resulting in leaks. llvm-svn: 148356
* Move X86 callee saved register lists to the X86CallConv .td file.Jakob Stoklund Olesen2012-01-173-37/+37
| | | | | | Add a trivial implementation of the getCallPreservedMask() hook. llvm-svn: 148347
* Add TableGen support for callee saved registers.Jakob Stoklund Olesen2012-01-174-0/+67
| | | | | | | | | Targets can now add CalleeSavedRegs defs to their *CallingConv.td file. TableGen will use this to create a *_SaveList array suitable for returning from getCalleeSavedRegs() as well as a *_RegMask bit mask suitable for returning from getCallPreservedMask(). llvm-svn: 148346
* Test case renameAndrew Trick2012-01-171-0/+0
| | | | llvm-svn: 148344
* Move includes to the .cpp file.Jakub Staszak2012-01-172-2/+2
| | | | llvm-svn: 148342
* MC tweak symbol difference resolution for non-local symbols.Jim Grosbach2012-01-174-7/+9
| | | | | | | | | | | | | | When the non-local symbol in the expression is in the same fragment as the second symbol, the assembler can still evaluate the expression without needing a relocation. For example, on ARM: _foo: ldr lr, (_foo - 4) rdar://10348687 llvm-svn: 148341
* Tidy up.Jim Grosbach2012-01-171-2/+2
| | | | llvm-svn: 148339
* Intel syntax: Fix parser match class to check memory operand size.Devang Patel2012-01-172-3/+5
| | | | llvm-svn: 148338
* Transform: (EXTRACT_VECTOR_ELT( VECTOR_SHUFFLE )) -> EXTRACT_VECTOR_ELT.Nadav Rotem2012-01-174-9/+66
| | | | llvm-svn: 148337
* Intel syntax: Parse "BYTE PTR [RDX + RCX]"Devang Patel2012-01-172-0/+6
| | | | llvm-svn: 148334
* Trailing spaces.Jakub Staszak2012-01-171-22/+21
| | | | llvm-svn: 148332
* Add a new ObjC ARC optimization pass to eliminate unneededDan Gohman2012-01-176-1/+177
| | | | | | autorelease push+pop pairs. llvm-svn: 148330
* Add a new PassManagerBuilder customization point,Dan Gohman2012-01-172-0/+6
| | | | | | | EP_ModuleOptimizerEarly, to allow passes to be added before the main ModulePass optimizers. llvm-svn: 148329
* Untabify.Devang Patel2012-01-171-12/+12
| | | | llvm-svn: 148322
* Intel syntax: Do not unncessarily create plus expression for memory operand ↵Devang Patel2012-01-172-2/+3
| | | | | | displacement. llvm-svn: 148321
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-172-1/+11
| | | | llvm-svn: 148316
* Remove "XFAIL: arm" from test/ExecutionEngine/test-return.llEli Bendersky2012-01-171-1/+0
| | | | | | The test passes on ARM bots llvm-svn: 148315
* Intel syntax: Robustify memory operand parsing.Devang Patel2012-01-172-51/+121
| | | | llvm-svn: 148312
* Add an LLDB data formatter script for llvm::SmallVector, maybe this is ↵Benjamin Kramer2012-01-171-0/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | helpful to someone else. This lets lldb give sane output for SmallVectors, e.g. Before: (lldb) p sv (llvm::SmallVector<int, 10>) $0 = { (llvm::SmallVectorImpl<int>) llvm::SmallVectorImpl<int> = { (llvm::SmallVectorTemplateBase<int>) llvm::SmallVectorTemplateBase<int> = { (llvm::SmallVectorTemplateCommon<int>) llvm::SmallVectorTemplateCommon<int> = { (llvm::SmallVectorBase) llvm::SmallVectorBase = { (void *) BeginX = 0x00007fff5fbff960 ... } After: (lldb) p sv (llvm::SmallVector<int, 10>) $0 = { (int) [0] = 42 (int) [1] = 23 ... } The script is still a bit rough so expect crashes for vectors of complex types. Synthetic children are _not_ available in xcode 4.2, newer LLDBs should work though. llvm-svn: 148308
* Removes template magic to build up containers.Manuel Klimek2012-01-172-131/+212
| | | | | | Instead, we now put the attributes of the container into members. llvm-svn: 148302
* Fix warning.Nadav Rotem2012-01-171-1/+1
| | | | llvm-svn: 148301
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