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* Switch the fixed-length disassembler to be table-driven.Jim Grosbach2012-08-145-702/+1230
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the TableGen'erated fixed length disassemblmer to use a table-driven state machine rather than a massive set of nested switch() statements. As a result, the ARM Disassembler (ARMDisassembler.cpp) builds much more quickly and generates a smaller end result. For a Release+Asserts build on a 16GB 3.4GHz i7 iMac w/ SSD: Time to compile at -O2 (averaged w/ hot caches): Previous: 35.5s New: 8.9s TEXT size: Previous: 447,251 New: 297,661 Builds in 25% of the time previously required and generates code 66% of the size. Execution time of the disassembler is only slightly slower (7% disassembling 10 million ARM instructions, 19.6s vs 21.0s). The new implementation has not yet been tuned, however, so the performance should almost certainly be recoverable should it become a concern. llvm-svn: 161888
* Fix the construction of the magic constant for roundToIntegral to be 64-bit ↵Owen Anderson2012-08-141-2/+2
| | | | | | safe. Fixes c-torture/execute/990826-0.c llvm-svn: 161885
* Fix the make update target to work even when sub repo repositories are ignored.David Blaikie2012-08-141-2/+2
| | | | llvm-svn: 161883
* Update configure.Daniel Dunbar2012-08-141-3/+21
| | | | llvm-svn: 161881
* [configure] Add a --enable-keep-symbols configure flag.Daniel Dunbar2012-08-142-0/+14
| | | | llvm-svn: 161880
* [asan] insert crash basic blocks inline as opposed to inserting them at the ↵Kostya Serebryany2012-08-141-10/+8
| | | | | | end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes (test change) llvm-svn: 161871
* [asan] insert crash basic blocks inline as opposed to inserting them at the ↵Kostya Serebryany2012-08-141-30/+27
| | | | | | end of the function. This doesn't seem to fix or break anything, but is considered to be more friendly to downstream passes llvm-svn: 161870
* Factor duplicate calls to getUNDEF in several functions.Craig Topper2012-08-141-10/+10
| | | | llvm-svn: 161860
* Re-factor intrinsic lowering to combine common parts of similar intrinsics. ↵Craig Topper2012-08-141-34/+133
| | | | | | Reduces compiled code size a little bit. llvm-svn: 161859
* Change greater than to greater than or equal so that an identical sized ↵Craig Topper2012-08-142-1/+20
| | | | | | store to the same offset is treated as completing overwriting. llvm-svn: 161857
* Fix undefined behavior: binding null pointer to reference. No functionality ↵Richard Smith2012-08-141-1/+1
| | | | | | change. llvm-svn: 161853
* During the CodeGenPrepare we often lower intrinsics (such as objsize)Nadav Rotem2012-08-148-22/+62
| | | | | | | | | | | and allow some optimizations to turn conditional branches into unconditional. This commit adds a simple control-flow optimization which merges two consecutive basic blocks which are connected by a single edge. This allows the codegen to operate on larger basic blocks. rdar://11973998 llvm-svn: 161852
* Grammar.Eric Christopher2012-08-141-1/+1
| | | | llvm-svn: 161851
* Avoid undefined behavior in DenseMap::shrink_and_clear(). Log2_32_Ceil(0)Richard Smith2012-08-141-2/+3
| | | | | | | returns 32. This change mirrors the corresponding code in SmallDenseMap::shrink_and_clear(). llvm-svn: 161829
* Typo.Eric Christopher2012-08-141-1/+1
| | | | llvm-svn: 161826
* llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, ↵NAKAMURA Takumi2012-08-141-1/+1
| | | | | | or it fails on msvc. llvm-svn: 161825
* Add a roundToIntegral method to APFloat, which can be parameterized over ↵Owen Anderson2012-08-135-0/+116
| | | | | | various rounding modes. Use this to implement SelectionDAG constant folding of FFLOOR, FCEIL, and FTRUNC. llvm-svn: 161807
* Transfer weights in transferSuccessorsAndUpdatePHIs().Jakob Stoklund Olesen2012-08-131-5/+7
| | | | llvm-svn: 161805
* Print out MachineBasicBlock successor weights when available.Jakob Stoklund Olesen2012-08-131-1/+4
| | | | llvm-svn: 161804
* LICM uses AliasSet information to hoist and sink instructions. However, ↵Nadav Rotem2012-08-132-1/+7
| | | | | | | | | | | | other passes, such as LoopRotate may invalidate its AliasSet because SSAUpdater does not update the AliasSet properly. This patch teaches SSAUpdater to notify AliasSet that it made changes. The testcase in PR12901 is too big to be useful and I could not reduce it to a normal size. rdar://11872059 PR12901 llvm-svn: 161803
* MemoryDependenceAnalysis attempts to find the first memory dependency for ↵Nadav Rotem2012-08-132-2/+41
| | | | | | | | | | | function calls. Currently, if GetLocation reports that it did not find a valid pointer (this is the case for volatile load/stores), we ignore the result. This patch adds code to handle the cases where we did not obtain a valid pointer. rdar://11872864 PR12899 llvm-svn: 161802
* ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.Jim Grosbach2012-08-132-8/+10
| | | | | | These tests weren't actually being run before (missing ':' after CHECK). llvm-svn: 161800
* Remove the TII::scheduleTwoAddrSource() hook.Jakob Stoklund Olesen2012-08-134-66/+0
| | | | | | | | | | | | | | | It never does anything when running 'make check', and it get's in the way of updating live intervals in 2-addr. The hook was originally added to help form IT blocks in Thumb2 code before register allocation, but the pass ordering has changed since then, and we run if-conversion after register allocation now. When the MI scheduler is enabled, there will be no less than two schedulers between 2-addr and Thumb2ITBlockPass, so this hook is unlikely to help anything. llvm-svn: 161794
* Rename test since it's not linux-specific.Bill Wendling2012-08-131-0/+0
| | | | llvm-svn: 161792
* ARM: enable struct byval for AAPCS-VFP.Manman Ren2012-08-131-0/+3
| | | | | | | | This change is to be enabled in clang. rdar://9877866 llvm-svn: 161789
* Whitespace cleanup.Bill Wendling2012-08-131-7/+7
| | | | llvm-svn: 161788
* Count triangles and diamonds in early if-conversion.Jakob Stoklund Olesen2012-08-131-0/+16
| | | | llvm-svn: 161783
* Delete dead typedef.Jakob Stoklund Olesen2012-08-131-2/+0
| | | | llvm-svn: 161782
* Handle extra Tail predecessors in if-conversion.Jakob Stoklund Olesen2012-08-132-20/+97
| | | | | | | | It is still possible to if-convert if the tail block has extra predecessors, but the tail phis must be rewritten instead of being removed. llvm-svn: 161781
* [Hexagon] Don't mark callee saved registers as clobbered by a tail callArnold Schwaighofer2012-08-132-9/+17
| | | | | | | | | | This was causing unnecessary spills/restores of callee saved registers. Fixes PR13572. Patch by Pranav Bhandarkar! llvm-svn: 161778
* Fix failure on Atom bot due to r161769Manman Ren2012-08-131-1/+1
| | | | llvm-svn: 161777
* Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ↵Nadav Rotem2012-08-132-1/+22
| | | | | | | | ISDNode has more than one user. rdar://11876519 llvm-svn: 161775
* X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr fromManman Ren2012-08-132-6/+20
| | | | | | | | | OpTbl1 to OpTbl2 since they have 3 operands and the last operand can be changed to a memory operand. PR13576 llvm-svn: 161769
* Add support for the %H output modifier.Eric Christopher2012-08-132-2/+24
| | | | | | Patch by Weiming Zhao. llvm-svn: 161768
* X86: when auto-detecting the subtarget features, make sure use IsIntel to detectManman Ren2012-08-131-2/+2
| | | | | | Nehalem, Westmere and Sandy Bridge. AMD also has processor family 6. llvm-svn: 161763
* Fix a documentation typo.Nadav Rotem2012-08-131-2/+2
| | | | llvm-svn: 161758
* [asan] remove the code for --asan-merge-callbacks as it appears to be a bad ↵Kostya Serebryany2012-08-131-78/+8
| | | | | | idea. (partly related to Bug 13225) llvm-svn: 161757
* Added test for non-static use of cl::opt (fixed in r160170)Alexander Kornienko2012-08-131-0/+11
| | | | llvm-svn: 161751
* Add test for previous commit correcting NEON load patterns.Tim Northover2012-08-131-0/+102
| | | | llvm-svn: 161750
* Use correct loads for vector types during extending-load operations.Tim Northover2012-08-131-36/+36
| | | | | | | | Previously, we used VLD1.32 in all cases, however there are both 16 and 64-bit accesses being selected, so we need to use an appropriate width load in those cases. llvm-svn: 161748
* Tidy up VSETCC lowering code a bit more by adding an llvm_unreachable and ↵Craig Topper2012-08-131-7/+9
| | | | | | putting an a couple if conditions in a better order. llvm-svn: 161746
* Refactor code a bit to share commonalities. No functional change intended.Craig Topper2012-08-131-20/+21
| | | | llvm-svn: 161745
* Fix an unused variable warning from r161742.Craig Topper2012-08-131-3/+0
| | | | llvm-svn: 161743
* Remove the LowerMMXCONCAT_VECTORS function. It could never execute because ↵Craig Topper2012-08-133-57/+1
| | | | | | there are no legal 64-bit vector types that could be used as inputs to a 128-bit concat_vectors. Remove a target specific SDNode and its patterns that become unused as a result. llvm-svn: 161742
* Give this test an explicit triple.Nick Lewycky2012-08-121-1/+1
| | | | llvm-svn: 161740
* When emitting the PC range in an FDE, use the same data encoding for both endsNick Lewycky2012-08-122-9/+34
| | | | | | of the range. Fixes PR13581! llvm-svn: 161739
* Remove call to setOperationAction for SETCC of v4f32. SETCC returns an ↵Craig Topper2012-08-121-1/+0
| | | | | | integer type not an FP type. llvm-svn: 161738
* Remove unnecessary call to setOperationAction for SETCC of v2i64 under ↵Craig Topper2012-08-121-3/+0
| | | | | | SSE42. It was already called for the same under SSE2. llvm-svn: 161737
* Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARMArnold Schwaighofer2012-08-127-339/+17
| | | | | | | | | architecture It broke MultiSource/Applications/JM/ldecod/ldecod on armv7 thumb O0 g and armv7 thumb O3. llvm-svn: 161736
* Change addTypeForNeon to use MVT instead of EVT so all the calls to ↵Craig Topper2012-08-122-51/+46
| | | | | | getSimpleVT can be removed. llvm-svn: 161735
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