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* Regenerate mul combine tests to update broadcast comment.Simon Pilgrim2017-09-301-1/+1
| | | | llvm-svn: 314607
* Refactor the SamplePGO profile annotation logic to extract ↵Dehao Chen2017-09-301-58/+65
| | | | | | inlineCallInstruction. (NFC) llvm-svn: 314601
* [X86][SSE] Fold (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1Simon Pilgrim2017-09-302-24/+13
| | | | | | Remove sign extend in register style pattern if the sign is already extended enough llvm-svn: 314599
* [AVX-512] Add patterns to make fp compare instructions commutable during isel.Craig Topper2017-09-303-3/+345
| | | | llvm-svn: 314598
* [X86][SSE] Add vector truncation cases inspired by PR34773Simon Pilgrim2017-09-301-0/+804
| | | | | | We should be using PACKSS/PACKUS more aggressively when we know the state of the upper bits llvm-svn: 314597
* Code refactoring for the interleaved code <NFC>Michael Zuckerman2017-09-303-99/+89
| | | | | Change-Id: I7831c9febad8e14278a5bc87584a0053dc837be1 llvm-svn: 314596
* [X86][SKX] Added codegen regression test for avx512 instructions scheduling.NFC.Gadi Haber2017-09-302-0/+17757
| | | | | | | | | | | | | | NFC. Added code gen regression tests for avx512 instructions scheduling called avx512-schedule.ll and avx512-shuffle-schedule.ll. This patch is in preparation of a larger patch of adding all SKX instruction scheduling and therefore the scheduling for the avx512 instructions are still missing. Reviewers: zvi, delena, RKSimon, igorb Differential Revision: https://reviews.llvm.org/D38035 Change-Id: I792762763127a921b9e13684b58af03646536533 llvm-svn: 314594
* Revert r314435: "[JumpThreading] Preserve DT and LVI across the pass"Daniel Jasper2017-09-306-270/+72
| | | | | | | Causes a segfault on a builtbot (and in our internal bootstrapping of Clang). See Eli's response on the commit thread. llvm-svn: 314589
* Fix buildbot failure -- tighten type check for matching phiXinliang David Li2017-09-301-1/+1
| | | | llvm-svn: 314585
* [X86] Support v64i8 mulhu/mulhsCraig Topper2017-09-303-2971/+103
| | | | | | | | Implemented by splitting into two v32i8 mulhu/mulhs and concatenating the results. Differential Revision: https://reviews.llvm.org/D38307 llvm-svn: 314584
* Recommi r314561 after fixing over-debug assertionXinliang David Li2017-09-306-0/+527
| | | | llvm-svn: 314579
* [llvm-rc] Serialize DIALOG(EX) to .res files (serialization, pt 4).Marek Sokolowski2017-09-3018-17/+494
| | | | | | | | | | | | | This is now able to serialize DIALOG and DIALOGEX resources to .res files. It still can't parse dialog-specific CAPTION, FONT, and STYLE optional statement - these will be added in the following patch. A limited set of controls is included. However, more can be easily added by extending SupportedCtls map defined in ResourceScriptStmt.cpp. Differential Revision: https://reviews.llvm.org/D37862 llvm-svn: 314578
* typosAdrian Prantl2017-09-301-3/+3
| | | | llvm-svn: 314577
* llvm-dwarfdump: implement the --name lookup option.Adrian Prantl2017-09-304-10/+80
| | | | llvm-svn: 314576
* Fix 80 column violationsAdrian Prantl2017-09-301-4/+8
| | | | llvm-svn: 314575
* Add commentsAdrian Prantl2017-09-301-0/+5
| | | | llvm-svn: 314574
* [AMDGPU] Set fast-math flags on functions given the optionsStanislav Mekhanoshin2017-09-294-7/+69
| | | | | | | | | | | | | | | | We have a single library build without relaxation options. When inlined library functions remove fast math attributes from the functions they are integrated into. This patch sets relaxation attributes on the functions after linking provided corresponding relaxation options are given. Math instructions inside the inlined functions remain to have no fast flags, but inlining does not prevent fast math transformations of a surrounding caller code anymore. Differential Revision: https://reviews.llvm.org/D38325 llvm-svn: 314568
* CodeGen: Fix pointer info in expandUnalignedLoad/StoreYaxun Liu2017-09-292-12/+45
| | | | | | | | | | | | Currently expandUnalignedLoad/Store uses place holder pointer info for temporary memory operand in stack, which does not have correct address space. This causes unaligned private double16 load/store to be lowered to flat_load instead of buffer_load for amdgcn target. This fixes failures of OpenCL conformance test basic/vload_private/vstore_private on target amdgcn---amdgizcl. Differential Revision: https://reviews.llvm.org/D35361 llvm-svn: 314566
* fix 80 column violation.Adrian Prantl2017-09-291-4/+4
| | | | llvm-svn: 314564
* Revert 314561 due to debug build assertion failureXinliang David Li2017-09-296-525/+0
| | | | llvm-svn: 314563
* [llvm-rc] Serialize MENU resources to .res files (serialization, pt 3).Marek Sokolowski2017-09-297-4/+236
| | | | | | | | | | | | | | | | | | | | This allows MENU resources to be serialized. MENU resource statement doc: msdn.microsoft.com/en-us/library/windows/desktop/aa381025.aspx POPUP sub-statement doc: msdn.microsoft.com/en-us/library/windows/desktop/aa381030.aspx MENUITEM sub-statement doc: msdn.microsoft.com/en-us/library/windows/desktop/aa381024.aspx MENUHEADER structure: msdn.microsoft.com/en-us/library/windows/desktop/ms648018.aspx (and NORMALMENUITEM, POPUPMENUITEM structs). Thanks for Nico Weber for his original work in this area. Differential Revision: https://reviews.llvm.org/D37828 llvm-svn: 314562
* Eliminate PHI (int typed) which has only one use by intptrXinliang David Li2017-09-296-0/+525
| | | | | | | | | | This patch will eliminate redundant intptr/ptrtoint that pessimizes analyses such as SCEV, AA and will make optimization passes such as auto-vectorization more powerful. Differential revision: http://reviews.llvm.org/D37832 llvm-svn: 314561
* Revert "Use the basic cost if a GEP is not used as addressing mode"Alex Shlyapnikov2017-09-299-107/+11
| | | | | | | | | | | | | | | | | | | | | | | This reverts commit r314517. This commit crashes sanitizer bots, for example: http://lab.llvm.org:8011/builders/sanitizer-x86_64-linux/builds/4167 Stack snippet: ... /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Support/Casting.h:255:0 llvm::TargetTransformInfoImplCRTPBase<llvm::X86TTIImpl>::getGEPCost(llvm::GEPOperator const*, llvm::ArrayRef<llvm::Value const*>) /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h:742:0 llvm::TargetTransformInfoImplCRTPBase<llvm::X86TTIImpl>::getUserCost(llvm::User const*, llvm::ArrayRef<llvm::Value const*>) /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h:782:0 /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/lib/Analysis/TargetTransformInfo.cpp:116:0 /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:116:0 /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:343:0 /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/ADT/SmallVector.h:864:0 /mnt/b/sanitizer-buildbot1/sanitizer-x86_64-linux/build/llvm/include/llvm/Analysis/TargetTransformInfo.h:285:0 ... llvm-svn: 314560
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-09-2914-187/+290
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 314559
* Revert "[CMake] Remove `CMAKE_.*_OUTPUT_DIRECTORY` (NFCI)"Brian Gesiak2017-09-292-0/+8
| | | | | | | | Summary: It appears polly makes use of the `CMAKE_RUNTIME_OUTPUT_DIRECTORY` variable when configuring its lit test suite. Reverting this for now. llvm-svn: 314551
* [CMake] Remove `CMAKE_.*_OUTPUT_DIRECTORY` (NFCI)Brian Gesiak2017-09-292-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | Summary: Three `CMAKE_.*_OUTPUT_DIRECTORY` variables used to be set in CMake and referenced in various other parts of the project. However, in r198205 chapuni added a note to "don't set them anymore", and any remaining references to them were subsequently removed in r198316 and r199592. Now that the variables are no longer used anywhere, remove them, along with the comments advising against using them any longer. Test Plan: I ran `check-all` and confirmed the tests built and passed. Reviewers: beanz, chapuni Reviewed By: beanz Subscribers: mgorny Differential Revision: https://reviews.llvm.org/D38389 llvm-svn: 314550
* [llvm-rc] Serialize ACCELERATORS to .res files (serialization, pt 2).Marek Sokolowski2017-09-2920-11/+531
| | | | | | | | | | | | | | | | | | | | This allows llvm-rc to serialize ACCELERATORS resources. Additionally, as this is the first type of resource to support basic optional resource statements (LANGUAGE, CHARACTERISTICS, VERSION), ACCELERATORS statement documentation: msdn.microsoft.com/en-us/library/windows/desktop/aa380610.aspx Accelerator table structure documentation: msdn.microsoft.com/en-us/library/windows/desktop/ms648010.aspx Optional resource statement fields are described in: msdn.microsoft.com/en-us/library/windows/desktop/ms648027.aspx Thanks for Nico Weber for his original work in this area. Differential Revision: https://reviews.llvm.org/D37824 llvm-svn: 314549
* [LV] Use correct insertion point when type shrinking reductionsMatthew Simpson2017-09-292-1/+42
| | | | | | | | | | | | | When type shrinking reductions, we should insert the truncations and extends at the end of the loop latch block. Previously, these instructions were inserted at the end of the loop header block. The difference is only a problem for loops with predicated instructions (e.g., conditional stores and instructions that may divide by zero). For these instructions, we create new basic blocks inside the vectorized loop, which cause the loop header and latch to no longer be the same block. This should fix PR34687. Reference: https://bugs.llvm.org/show_bug.cgi?id=34687 llvm-svn: 314542
* [llvm-rc] Refactoring needed for ACCELERATORS and MENU resources.Marek Sokolowski2017-09-294-49/+72
| | | | | | | | | | | | | | | | | | | | This is a part of llvm-rc serialization patch set (serialization, pt 1.5). This: * Unifies the internal representation of flags in ACCELERATORS and MENU with the corresponding representation in .res files (noticed in https://reviews.llvm.org/D37828#inline-329828). * Creates an RCResource subclass, OptStatementsRCResource, describing resource statements that can declare resource-local optional statements (proposed in https://reviews.llvm.org/D37824#inline-329775). These modifications don't fit to any of the current patches, so I'm submitting them as a separate patch. Differential Revision: https://reviews.llvm.org/D37841 llvm-svn: 314541
* Use LLVM_ENABLE_ABI_BREAKING_CHECKS correctlySanjoy Das2017-09-291-5/+11
| | | | llvm-svn: 314539
* [llvm-rc] Serialize HTML resources to .res files (serialization, pt 1).Marek Sokolowski2017-09-2915-45/+593
| | | | | | | | | | | | | | This allows to process HTML resources defined in .rc scripts and output them to resulting .res files. Additionally, some infrastructure allowing to output these files is created. This is the first resource type we can operate on. Thanks to Nico Weber for his original work in this area. Differential Revision: reviews.llvm.org/D37283 llvm-svn: 314538
* Display relative hotness with two decimal digits after the decimal pointAdam Nemet2017-09-291-1/+1
| | | | | | | | | I've seen cases where tiny inlined functions have such a high execution count that most everything would show up with a relative of hotness of 0%. Since the inlined functions effectively disappear you need to tune in the lower range, thus we need more precision. llvm-svn: 314537
* Fix Wmismatched-tags warning. Simon Pilgrim2017-09-291-2/+1
| | | | | | | | InlineAsmIdentifierInfo was declared a class in some places and a struct in others. Partial reversion of rL314508 llvm-svn: 314536
* [test] Enable LeakSanitizer on 64-bit Darwin ASan llvm buildsFrancis Ricci2017-09-292-1/+8
| | | | | | | | | | | | | | Summary: Also disables leak checking on lto tests, due to many leaks reported in the system's ld64. Reviewers: kcc, pcc, bogner, kubamracek Subscribers: mehdi_amini, llvm-commits Differential Revision: https://reviews.llvm.org/D37781 llvm-svn: 314535
* [WebAssembly] Allow each data segment to specify its own alignmentSam Clegg2017-09-2919-62/+88
| | | | | | | | | Also, add a flags field as we will almost certainly be needing that soon too. Differential Revision: https://reviews.llvm.org/D38296 llvm-svn: 314534
* [SimplifyIndVar] Do not fail when we constant fold an IV user to ↵Hongbin Zheng2017-09-293-11/+57
| | | | | | | | | | ConstantPointerNull The type of a SCEVConstant may not match the corresponding LLVM Value. In this case, we skip the constant folding for now. TODO: Replace ConstantInt Zero by ConstantPointerNull llvm-svn: 314531
* AMDGPU: fix bad test exposed by r314522Nicolai Haehnle2017-09-291-8/+0
| | | | | | | | | | | The test attempts to use -1 as carry-in for v_addc_*. Before writing r314522, I did actually test this on real hardware, and found that it doesn't work. So r314522 is correct in restricting the carry-in operand: just remove those tests to make things pass again. llvm-svn: 314530
* [ThinLTO] Use decimal suffix for promoted values to match demanglersTeresa Johnson2017-09-291-1/+1
| | | | | | | | | | | | | | | | Summary: Demanglers such as libiberty know how to strip suffixes of the form \.[a-zA-Z]+\.\d+, but our current promoted value suffixes are .llvm.${modulehash}, where the module hash is in hex. Change the module hash to decimal to allow demanglers to handle this. Reviewers: danielcdh Subscribers: llvm-commits, inglorion Differential Revision: https://reviews.llvm.org/D38405 llvm-svn: 314527
* [dwarfdump][NFC] Consistent printing of address rangesJonas Devlieghere2017-09-294-9/+11
| | | | | | | | | | | | | | This implement the insertion operator for DWARF address ranges so they are consistently printed as [LowPC, HighPC). While a dump method might have felt more consistent, it is used exclusively for printing error messages in the verifier and never used for actual dumping. Hence this approach is more intuitive and creates less clutter at the call sites. Differential revision: https://reviews.llvm.org/D38395 llvm-svn: 314523
* AMDGPU: VALU carry-in and v_cndmask condition cannot be EXECNicolai Haehnle2017-09-299-41/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | The hardware will only forward EXEC_LO; the high 32 bits will be zero. Additionally, inline constants do not work. At least, v_addc_u32_e64 v0, vcc, v0, v1, -1 which could conceivably be used to combine (v0 + v1 + 1) into a single instruction, acts as if all carry-in bits are zero. The llvm.amdgcn.ps.live test is adjusted; it would be nice to combine s_mov_b64 s[0:1], exec v_cndmask_b32_e64 v0, v1, v2, s[0:1] into v_mov_b32 v0, v3 but it's not particularly high priority. Fixes dEQP-GLES31.functional.shaders.helper_invocation.value.* llvm-svn: 314522
* Use the basic cost if a GEP is not used as addressing modeJun Bum Lim2017-09-299-11/+107
| | | | | | | | | | | | | | | | | | | Summary: Currently, getGEPCost() returns TCC_FREE whenever a GEP is a legal addressing mode in the target. However, since it doesn't check its actual users, it will return FREE even in cases where the GEP cannot be folded away as a part of actual addressing mode. For example, if an user of the GEP is a call instruction taking the GEP as a parameter, then the GEP may not be folded in isel. Reviewers: hfinkel, efriedma, mcrosier, jingyue, haicheng Reviewed By: hfinkel Subscribers: javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D38085 llvm-svn: 314517
* [SystemZ] implement shouldCoalesce()Jonas Paulsson2017-09-299-6/+112
| | | | | | | | | | | | | | | | | | | Implement shouldCoalesce() to help regalloc avoid running out of GR128 registers. If a COPY involving a subreg of a GR128 is coalesced, the live range of the GR128 virtual register will be extended. If this happens where there are enough phys-reg clobbers present, regalloc will run out of registers (if there is not a single GR128 allocatable register available). This patch tries to allow coalescing only when it can prove that this will be safe by checking the (local) interval in question. Review: Ulrich Weigand, Quentin Colombet https://reviews.llvm.org/D37899 https://bugs.llvm.org/show_bug.cgi?id=34610 llvm-svn: 314516
* Fix spelling in comments. NFCI.Simon Pilgrim2017-09-291-2/+2
| | | | llvm-svn: 314515
* [X86] Improve codegen for inverted overflow checking intrinsics.Amara Emerson2017-09-292-24/+32
| | | | | | | | Adds a new combine for: xor(setcc cc, val), 1 --> setcc (invert(cc), val) Differential Revision: https://reviews.llvm.org/D38161 llvm-svn: 314514
* [ARM] v8.3-a complex number supportSam Parker2017-09-2910-2/+610
| | | | | | | | | | | | | | | New instructions are added to AArch32 and AArch64 to aid floating-point multiplication and addition of complex numbers, where the complex numbers are packed in a vector register as a pair of elements. The Imaginary part of the number is placed in the more significant element, and the Real part of the number is placed in the less significant element. This patch adds assembler for the ARM target. Differential Revision: https://reviews.llvm.org/D36789 llvm-svn: 314511
* Small modification <NFC>Michael Zuckerman2017-09-291-1/+1
| | | | | Change-Id: I360abccee12cae29bd2ac4f8399c9ecc92eb7f13 llvm-svn: 314510
* Fix Wmismatched-tags warning. Simon Pilgrim2017-09-291-1/+3
| | | | | | InlineAsmIdentifierInfo was declared a class in some places and a class in others. llvm-svn: 314508
* [mips] Reordering callseq* nodes to be linearAleksandar Beserminji2017-09-299-36/+38
| | | | | | | | | | | | | Fix nested callseq* nodes by moving callseq_start after the arguments calculation to temporary registers, so that callseq* nodes in resulting DAG are linear. Recommitting r314497. This version does not contain test which fails when compiler is not build in debug mode. Differential Revision: https://reviews.llvm.org/D37328 llvm-svn: 314507
* Revert "[mips] Reordering callseq* nodes to be linear"Aleksandar Beserminji2017-09-299-93/+36
| | | | | | | | | Added test relies on the compiler being built in debug mode, which may not be the case. This reverts commit r314497. llvm-svn: 314506
* [mips] Add missing license info, formatting changes. NFCISimon Dardis2017-09-291-30/+47
| | | | | | | | Add missing license information to MicroMipsInstrFPU.td and fix most of the formatting errors present. Others will be addressed in a follow up commits. llvm-svn: 314505
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