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* Add and remove the attribute from the correct slot.Bill Wendling2013-02-201-2/+12
| | | | | | | | | The slot that we're adding/removing the attribute from may not be the same as the attribute coming in. Make sure that they match up before we try to add/remove them. PR15313 llvm-svn: 175684
* Stabilize vec_constants.llBill Schmidt2013-02-201-1/+4
| | | | llvm-svn: 175683
* Fix accidental concatenation for "outputuntil" in the -debug-buffer-size ↵Erik Verbruggen2013-02-201-1/+1
| | | | | | option description. llvm-svn: 175682
* MCParser: Update method names per coding guidelines.Jim Grosbach2013-02-2011-363/+363
| | | | | | | | | | | | | | | | | | | s/AddDirectiveHandler/addDirectiveHandler/ s/ParseMSInlineAsm/parseMSInlineAsm/ s/ParseIdentifier/parseIdentifier/ s/ParseStringToEndOfStatement/parseStringToEndOfStatement/ s/ParseEscapedString/parseEscapedString/ s/EatToEndOfStatement/eatToEndOfStatement/ s/ParseExpression/parseExpression/ s/ParseParenExpression/parseParenExpression/ s/ParseAbsoluteExpression/parseAbsoluteExpression/ s/CheckForValidSection/checkForValidSection/ http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly No functional change intended. llvm-svn: 175675
* Only use LiveIntervals in TwoAddressInstructionPass, not a mix of LiveintervalsCameron Zwarich2013-02-201-6/+4
| | | | | | and SlotIndexes. llvm-svn: 175674
* Find anchoring end points for repairIntervalsInRange and repairIndexesInRangeCameron Zwarich2013-02-203-12/+21
| | | | | | automatically. llvm-svn: 175673
* Make repairIntervalsInRange() more robust. There are now no longer any liveness-Cameron Zwarich2013-02-201-15/+58
| | | | | | | | | related failures when running 'make check' without LiveVariables with the verifier enabled. Some of the remaining failures elsewhere may still be fallout from incorrect updating of LiveIntervals or the few missing cases left in the two-address pass. llvm-svn: 175672
* DAGCombiner: Fold pointless truncate, bitcast, buildvector seriesArnold Schwaighofer2013-02-202-0/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | (2xi32) (truncate ((2xi64) bitcast (buildvector i32 a, i32 x, i32 b, i32 y))) can be folded into a (2xi32) (buildvector i32 a, i32 b). Such a DAG would cause uneccessary vdup instructions followed by vmovn instructions. We generate this code on ARM NEON for a setcc olt, 2xf64, 2xf64. For example, in the vectorized version of the code below. double A[N]; double B[N]; void test_double_compare_to_double() { int i; for(i=0;i<N;i++) A[i] = (double)(A[i] < B[i]); } radar://13191881 Fixes bug 15283. llvm-svn: 175670
* R600: Update for name changes from r175667.Jim Grosbach2013-02-201-3/+3
| | | | llvm-svn: 175668
* Update TargetLowering ivars for name policy.Jim Grosbach2013-02-209-51/+51
| | | | | | | | | | | http://llvm.org/docs/CodingStandards.html#name-types-functions-variables-and-enumerators-properly ivars should be camel-case and start with an upper-case letter. A few in TargetLowering were starting with a lower-case letter. No functional change intended. llvm-svn: 175667
* Additional fixes for bug 15155.Bill Schmidt2013-02-205-49/+149
| | | | | | | | This handles the cases where the 6-bit splat element is odd, converting to a three-instruction sequence to add or subtract two splats. With this fix, the XFAIL in test/CodeGen/PowerPC/vec_constants.ll is removed. llvm-svn: 175663
* [objdump] Print the PT_INTERP and PT_DYNAMIC correcctly.Michael J. Spencer2013-02-201-0/+6
| | | | llvm-svn: 175659
* Update a comment that looks to have been accidentally deleted many moons ago.Chad Rosier2013-02-201-1/+1
| | | | llvm-svn: 175658
* Rewrite comments.Dan Gohman2013-02-201-3/+5
| | | | llvm-svn: 175651
* Add comment in Memory.inc explaining r175646.Krzysztof Parzyszek2013-02-201-0/+7
| | | | llvm-svn: 175650
* SIGQUIT is a "kill" signal, rather than an "int" signal, in this context.Dan Gohman2013-02-201-2/+2
| | | | llvm-svn: 175648
* Formatting, grammarAndrew Kaylor2013-02-201-3/+2
| | | | llvm-svn: 175647
* On PowerPC, the cache-flush instructions dcbf and icbi are treated asKrzysztof Parzyszek2013-02-201-0/+4
| | | | | | | loads. On FreeBSD, add PROT_READ page protection flag before flushing cache. llvm-svn: 175646
* Use LiveRangeUpdater instead of mergeIntervalRanges.Jakob Stoklund Olesen2013-02-202-143/+11
| | | | | | | Performance is the same, but LiveRangeUpdater has a more flexible interface. llvm-svn: 175645
* Add a LiveRangeUpdater class.Jakob Stoklund Olesen2013-02-202-0/+258
| | | | | | | | | | | | | | | | | | Adding new segments to large LiveIntervals can be expensive because the LiveRange objects after the insertion point may need to be moved left or right. This can cause quadratic behavior when adding a large number of segments to a live range. The LiveRangeUpdater class allows the LIveInterval to be in a temporary invalid state while segments are being added. It maintains an internal gap in the LiveInterval when it is shrinking, and it has a spill area for new segments when the LiveInterval is growing. The behavior is similar to the existing mergeIntervalRanges() function, except it allocates less memory for the spill area, and the algorithm is turned inside out so the loop is driven by the clients. llvm-svn: 175644
* Adding support for absolute relocations. This occurs in ELF files when a ↵Andrew Kaylor2013-02-201-7/+14
| | | | | | relocation is given with no name and an undefined section. The relocation is applied with an address of zero. llvm-svn: 175643
* Fix PR15267Michael Liao2013-02-202-14/+185
| | | | | | | | | - When extloading from a vector with non-byte-addressable element, e.g. <4 x i1>, the current logic breaks. Extend the current logic to fix the case where the element type is not byte-addressable by loading all bytes, bit-extracting/packing each element. llvm-svn: 175642
* [ms-inline asm] Make the comment a bit more verbose.Chad Rosier2013-02-201-2/+6
| | | | llvm-svn: 175641
* Add a default constructor for LiveRange.Jakob Stoklund Olesen2013-02-201-1/+2
| | | | | | | It is useful to be able to create temporary LiveRange object whose members are filled in later. llvm-svn: 175639
* Fix bug 14779 for passing anonymous aggregates [patch by Kai Nacke].Bill Schmidt2013-02-202-1/+106
| | | | | | | | The PPC backend doesn't handle these correctly. This patch uses logic similar to that in the X86 and ARM backends to track these arguments properly. llvm-svn: 175635
* Hexagon: Move HexagonMCInst.h to MCTargetDesc/HexagonMCInst.h.Jyotsna Verma2013-02-2012-34/+395
| | | | | | | | Add HexagonMCInst class which adds various Hexagon VLIW annotations. In addition, this class also includes some APIs related to the constant extenders. llvm-svn: 175634
* Revert r175626, "ADT/Optional.h: Appease msvc."NAKAMURA Takumi2013-02-201-1/+1
| | | | | | Sorry, I didn't cover +Asserts, by accident. :( llvm-svn: 175633
* Fix PR15155: lost vadd/vsplat optimization.Bill Schmidt2013-02-204-8/+120
| | | | | | | | | | | | | | During lowering of a BUILD_VECTOR, we look for opportunities to use a vector splat. When the splatted value fits in 5 signed bits, a single splat does the job. When it doesn't fit in 5 bits but does fit in 6, and is an even value, we can splat on half the value and add the result to itself. This last optimization hasn't been working recently because of improved constant folding. To circumvent this, create a pseudo VADD_SPLAT that can be expanded during instruction selection. llvm-svn: 175632
* Whitespace.NAKAMURA Takumi2013-02-201-7/+7
| | | | llvm-svn: 175627
* ADT/Optional.h: Appease msvc.NAKAMURA Takumi2013-02-201-1/+1
| | | | llvm-svn: 175626
* Move the SplatByte helper to APInt and generalize it a bit.Benjamin Kramer2013-02-204-29/+28
| | | | llvm-svn: 175621
* I optimized the following patterns:Elena Demikhovsky2013-02-204-1/+74
| | | | | | | | | | | | | | | | sext <4 x i1> to <4 x i64> sext <4 x i8> to <4 x i64> sext <4 x i16> to <4 x i64> I'm running Combine on SIGN_EXTEND_IN_REG and revert SEXT patterns: (sext_in_reg (v4i64 anyext (v4i32 x )), ExtraVT) -> (v4i64 sext (v4i32 sext_in_reg (v4i32 x , ExtraVT))) The sext_in_reg (v4i32 x) may be lowered to shl+sar operations. The "sar" does not exist on 64-bit operation, so lowering sext_in_reg (v4i64 x) has no vector solution. I also added a cost of this operations to the AVX costs table. llvm-svn: 175619
* [asan] instrument invoke insns with noreturn attribute (as well as call insns)Kostya Serebryany2013-02-202-5/+27
| | | | llvm-svn: 175617
* Fix thumbv5e frame lowering assertion failure.Logan Chien2013-02-202-3/+35
| | | | | | | | | | | | | | It is possible that frame pointer is not found in the callee saved info, thus FramePtrSpillFI may be incorrect if we don't check the result of hasFP(MF). Besides, if we enable the stack coloring algorithm, there will be an assertion to ensure the slot is live. But in the test case, %var1 is not live in the prologue of the function, and we will get the assertion failure. Note: There is similar code in ARMFrameLowering.cpp. llvm-svn: 175616
* Use the attribute group reference instead of the attribute directly.Bill Wendling2013-02-201-1/+2
| | | | llvm-svn: 175609
* Fully qualify llvm::next to avoid ambiguity when building as C++11.David Blaikie2013-02-202-3/+4
| | | | llvm-svn: 175608
* Fix the (clang -Werror) build by removing an unused member variable.David Blaikie2013-02-201-2/+1
| | | | llvm-svn: 175607
* Modify the LLVM assembly output so that it uses references to represent ↵Bill Wendling2013-02-2028-164/+244
| | | | | | | | | | | function attributes. This makes the LLVM assembly look better. E.g.: define void @foo() #0 { ret void } attributes #0 = { nounwind noinline ssp } llvm-svn: 175605
* Add support to the two-address pass for updating LiveIntervals in many of theCameron Zwarich2013-02-202-14/+102
| | | | | | | common transformations. This includes updating repairIntervalsInRange() to handle more cases. llvm-svn: 175604
* Move the computation of the IsEarlyClobber flag into its own loop, since theCameron Zwarich2013-02-201-1/+5
| | | | | | | correct value is needed in every iteration of the loop for updating LiveIntervals. llvm-svn: 175603
* Modify LiveInterval::addRange() to match the comment about what it returns.Cameron Zwarich2013-02-201-2/+2
| | | | llvm-svn: 175602
* Add SlotIndexes::repairIndexesInRange(), which repairs SlotIndexes after addingCameron Zwarich2013-02-203-0/+68
| | | | | | | | | | and removing instructions. The implementation seems more complicated than it needs to be, but I couldn't find something simpler that dealt with all of the corner cases. Also add a call to repairIndexesInRange() from repairIntervalsInRange(). llvm-svn: 175601
* Make SlotIndex::getEntry() return unsigned to match IndexListEntry.Cameron Zwarich2013-02-201-1/+1
| | | | llvm-svn: 175600
* Fix a misunderstanding about how RegMaskBlocks works. This was caught byCameron Zwarich2013-02-201-1/+1
| | | | | | | assertions in the register allocator when running 'make check' without LiveVariables. llvm-svn: 175599
* Remove verification after PHIElimination when using LiveIntervals, and move itCameron Zwarich2013-02-202-3/+3
| | | | | | | after the two-address pass. The remaining problems in 'make check' are occurring later. llvm-svn: 175598
* Avoid recomputing an inserted instruction's SlotIndex.Cameron Zwarich2013-02-201-2/+1
| | | | llvm-svn: 175597
* Add preservation of SlotIndexes to PHIElimination.Cameron Zwarich2013-02-201-0/+1
| | | | llvm-svn: 175596
* Rename llvm::Optional<T>::Reset to 'reset' as per LLVM naming conventions.David Blaikie2013-02-202-4/+4
| | | | | | Code review feedback on r175580 from Jordan Rose. llvm-svn: 175595
* Expand pseudos/macros:Reed Kotler2013-02-2016-25/+125
| | | | | | | | SltCCRxRy16, SltiCCRxImmX16, SltiuCCRxImmX16, SltuCCRxRy16 $T8 shows up as register $24 when emitted from C++ code so we had to change some tests that were already there for this functionality. llvm-svn: 175593
* [llvm-readobj] Add ELF .dynamic table dumping.Michael J. Spencer2013-02-206-9/+281
| | | | llvm-svn: 175592
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