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* [AArch64] Add test case for preferred function alignment (NFC). Florian Hahn2017-07-071-0/+26
| | | | | | | | | | | | Reviewers: evandro, joelkevinjones, mcrosier Reviewed By: joelkevinjones, mcrosier Subscribers: mcrosier, aemerson, llvm-commits, rengolin, evandro, javed.absar, joelkevinjones, kristof.beyls Differential Revision: https://reviews.llvm.org/D34951 llvm-svn: 307369
* [ARM] GlobalISel: Fixup r307365Diana Picus2017-07-071-11/+10
| | | | | | | Rename member DebugLoc -> DbgLoc (so it doesn't conflict with the class name). llvm-svn: 307366
* [ARM] GlobalISel: Select hard G_FCMP for s32Diana Picus2017-07-073-63/+871
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We lower to a sequence consisting of: - MOVi 0 into a register - VCMPS to do the actual comparison and set the VFP flags - FMSTAT to move the flags out of the VFP unit - MOVCCi to either use the "zero register" that we have previously set with the MOVi, or move 1 into the result register, based on the values of the flags As was the case with soft-float, for some predicates (one, ueq) we actually need two comparisons instead of just one. When that happens, we generate two VCMPS-FMSTAT-MOVCCi sequences and chain them by means of using the result of the first MOVCCi as the "zero register" for the second one. This is a bit overkill, since one comparison followed by two non-flag-setting conditional moves should be enough. In any case, the backend manages to CSE one of the comparisons away so it doesn't matter much. Note that unlike SelectionDAG and FastISel, we always use VCMPS, and not VCMPES. This makes the code a lot simpler, and it also seems correct since the LLVM Lang Ref defines simple true/false returns if the operands are QNaN's. For SNaN's, even VCMPS throws an Invalid Operand exception, so they won't be slipping through unnoticed. Implementation-wise, this introduces a template so we can share the same code that we use for handling integer comparisons, since the only differences are in the details (exact opcodes to be used etc). Hopefully this will be easy to extend to s64 G_FCMP. llvm-svn: 307365
* [TableGen] Cleanup capturing of instruction namespace for the fast isel ↵Craig Topper2017-07-071-11/+7
| | | | | | emitter to remove a std::string and duplicated code. NFC llvm-svn: 307363
* [TableGen] Use StringRef instead of std::string for CodeGenInstruction ↵Craig Topper2017-07-078-16/+16
| | | | | | namespace. NFC llvm-svn: 307362
* [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. ↵Craig Topper2017-07-071-0/+1
| | | | | | This is required after r307358. llvm-svn: 307361
* Reduce code duplication.Rafael Espindola2017-07-072-34/+29
| | | | | | | By addding a mapNameToDWARFSection we only need to check section names in one place. llvm-svn: 307359
* [TableGen] Fix some mismatches in the use of Namespace fields versus Target ↵Craig Topper2017-07-072-3/+3
| | | | | | | | | | | | name in some of our emitters. Some of our emitters were using the name of the Target to reference things that were created by others emitters using Namespace. Apparently all targets have the same Target name as their instruction and register Namespace field? Someone on IRC had a target that didn't do this and was getting build errors. This patch is a necessary, but maybe not sufficient fix. llvm-svn: 307358
* [PDB] Teach libpdb to write DBI Stream ECNames.Zachary Turner2017-07-078-3/+84
| | | | | | | | | | | | | | | | | | | | | | | Based strictly on the name, this seems to have something to do width edit & continue. The goal of this patch has nothing to do with supporting edit and continue though. msvc link.exe writes very basic information into this area even when *not* compiling with support for E&C, and so the goal here is to bring lld-link to parity. Since we cannot know what assumptions standard tools make about the content of PDB files, we need to be as close as possible. This ECNames data structure is a standard PDB string hash table. link.exe puts a single string into this hash table, which is the full path to the PDB file on disk. It then references this string from the module descriptor for the compiler generated `* Linker *` module. With this patch, lld-link will generate the exact same sequence of bytes as MSVC link for this subsection for a given object file input (as reported by `llvm-pdbutil bytes -ec`). llvm-svn: 307356
* [Orc] Add missing return value (left out in r307350).Lang Hames2017-07-071-0/+1
| | | | llvm-svn: 307354
* Correct GFX9 processor names.Tony Tye2017-07-071-3/+1
| | | | | | Differential Revision: https://reviews.llvm.org/D33736 llvm-svn: 307353
* RegisterScavenging: Fix PR33687Matthias Braun2017-07-073-2/+77
| | | | | | | | | When scavenging for a use in instruction MI, we will reload after that instruction and hence cannot spill uses/defs of this instruction. This fixes http://llvm.org/PR33687 llvm-svn: 307352
* LiveRegUnits: Rename accumulateBackward()->accumulate()Matthias Braun2017-07-074-7/+7
| | | | | | | | | Contrary to the stepForward()/stepBackward() method accumulate() doesn't have a direction as defs, uses and clobbers all have the same effect. Also improve the documentation comment. llvm-svn: 307351
* [ORC] Errorize the ORC APIs.Lang Hames2017-07-0742-281/+570
| | | | | | | | This patch updates the ORC layers and utilities to return and propagate llvm::Errors where appropriate. This is necessary to allow ORC to safely handle error cases in cross-process and remote JITing. llvm-svn: 307350
* [InferAddressSpaces] Fix assertion about null pointerYaxun Liu2017-07-072-1/+14
| | | | | | | | | | | | | InferAddressSpaces does not check address space in collectFlatAddressExpressions, which causes values with non flat address space put into Postorder and causes assertion in cloneValueWithNewAddressSpace. This patch fixes assertion in OpenCL 2.0 conformance test generic_address_space subtest for amdgcn target. Differential Revision: https://reviews.llvm.org/D34991 llvm-svn: 307349
* [WebAssembly] Support weak defined symbolsSam Clegg2017-07-074-81/+116
| | | | | | | | | | | | Model weakly defined symbols as symbols that are both exports and imported and marked as weak. Local references to the symbols refer to the import but the linker can resolve this to the weak export if not strong symbol is found at link time. Differential Revision: https://reviews.llvm.org/D35029 llvm-svn: 307348
* Extend memcpy expansion in Transform/Utils to handle wider operand types.Sean Fertile2017-07-079-25/+490
| | | | | | | | | | | Adds loop expansions for known-size and unknown-sized memcpy calls, allowing the target to provide the operand types through TTI callbacks. The default values for the TTI callbacks use int8 operand types and matches the existing behaviour if they aren't overridden by the target. Differential revision: https://reviews.llvm.org/D32536 llvm-svn: 307346
* Revert r307342, r307343.Evgeniy Stepanov2017-07-072-85/+0
| | | | | | | | | | Revert "Copy arguments passed by value into explicit allocas for ASan." Revert "[asan] Add end-to-end tests for overflows of byval arguments." Build failure on lldb-x86_64-ubuntu-14.04-buildserver. Test failure on clang-cmake-aarch64-42vma and sanitizer-x86_64-linux-android. llvm-svn: 307345
* Copy arguments passed by value into explicit allocas for ASan.Evgeniy Stepanov2017-07-072-0/+85
| | | | | | | | | | | | | | ASan determines the stack layout from alloca instructions. Since arguments marked as "byval" do not have an explicit alloca instruction, ASan does not produce red zones for them. This commit produces an explicit alloca instruction and copies the byval argument into the allocated memory so that red zones are produced. Patch by Matt Morehouse. Differential revision: https://reviews.llvm.org/D34789 llvm-svn: 307342
* [SafepointIRVerifier] NFC: Refactor code for identifying exclusive base typeAnna Thomas2017-07-071-37/+72
| | | | | | | | | Added a new Enum to identify if the base pointer is exclusively null or exlusively some constant or not exclusively any constant. Converted the base pointer identification method from recursive to iterative form. llvm-svn: 307340
* [lit] Modify LIT to accept environment variable LIT_FILTER to select tests.George Karpenkov2017-07-073-1/+14
| | | | | | | | | This is especially useful when lit is invoked indirectly by the build system, and additional arguments can not be easily specified. Differential Revision: https://reviews.llvm.org/D35091 llvm-svn: 307339
* [ConstHoisting] Turn on consthoist-with-block-frequency by default.Wei Mi2017-07-072-5/+2
| | | | | | | | | | | Using profile information to guide consthoisting is generally helpful for performance, so the patch turns it on by default. No compile time or perf regression were found using spec2000 and spec2006 on x86. Some significant improvement (>20%) was seen on internal benchmarks. Differential Revision: https://reviews.llvm.org/D35063 llvm-svn: 307338
* Reverting r307326 because it breaks clang tests.Michael Kuperstein2017-07-066-125/+11
| | | | llvm-svn: 307334
* [InstCombine] No need to pass DataLayout to helper functions if we're ↵Craig Topper2017-07-061-7/+5
| | | | | | passing the InstCombiner object. We can just ask it for the DataLayout. NFC llvm-svn: 307333
* [InstCombine] Remove unused arguments from some helper functions. NFCCraig Topper2017-07-061-7/+5
| | | | llvm-svn: 307332
* [InstCombine] Change a couple helper functions to only take the IRBuilder as ↵Craig Topper2017-07-061-9/+10
| | | | | | an argument and not the whole InstCombiner object. NFC llvm-svn: 307331
* [ConstHoisting] choose to hoist when frequency is the same.Wei Mi2017-07-063-6/+63
| | | | | | | | | | | | The patch is to adjust the strategy of frequency based consthoisting: Previously when the candidate block has the same frequency with the existing blocks containing a const, it will not hoist the const to the candidate block. For that case, now we change the strategy to hoist the const if only existing blocks have more than one block member. This is helpful for reducing code size. Differential Revision: https://reviews.llvm.org/D35084 llvm-svn: 307328
* [NVPTX] Add lowering of i128 params.Michael Kuperstein2017-07-066-11/+125
| | | | | | | | | | | | | | | | | The patch adds support of i128 params lowering. The changes are quite trivial to support i128 as a "special case" of integer type. With this patch, we lower i128 params the same way as aggregates of size 16 bytes: .param .b8 _ [16]. Currently, NVPTX can't deal with the 128 bit integers: * in some cases because of failed assertions like ValVTs.size() == OutVals.size() && "Bad return value decomposition" * in other cases emitting PTX with .i128 or .u128 types (which are not valid [1]) [1] http://docs.nvidia.com/cuda/parallel-thread-execution/index.html#fundamental-types Differential Revision: https://reviews.llvm.org/D34555 Patch by: Denys Zariaiev (denys.zariaiev@gmail.com) llvm-svn: 307326
* [ORC] Add missing <memory> include for shared_ptr.Lang Hames2017-07-061-0/+1
| | | | | | Accidentally left out of r307319. llvm-svn: 307322
* Change remaining references to lit.util.capture to use subprocess.check_output.David L. Jones2017-07-062-4/+6
| | | | | | | | | | | | | | Summary: The capture() function was removed in r306625. This should fix PGO breakages reported by Michael Zolotukhin. Reviewers: mzolotukhin Subscribers: sanjoy, llvm-commits Differential Revision: https://reviews.llvm.org/D35088 llvm-svn: 307320
* [ORC] Update GlobalMappingLayer::addModuleSet to addModule.Lang Hames2017-07-062-18/+19
| | | | | | This layer was accidentally left out of r306166. llvm-svn: 307319
* Use @LINE in two more tests.Rafael Espindola2017-07-062-4/+2
| | | | llvm-svn: 307318
* [COFF, AArch64] Set the private label prefix to .LMartin Storsjo2017-07-061-0/+2
| | | | | | | | | | This fixes calls to external functions starting with a capital L, fixing errors like this: fatal error: error in backend: assembler label 'LocalFree' can not be undefined Differential Revision: https://reviews.llvm.org/D35079 llvm-svn: 307317
* AMDGPU: Add macro fusion schedule DAG mutationMatt Arsenault2017-07-0618-305/+508
| | | | | | Try to increase opportunities to shrink vcc uses. llvm-svn: 307313
* AMDGPU: Minor cleanup of shrinking logicMatt Arsenault2017-07-061-8/+4
| | | | llvm-svn: 307312
* AMDGPU: Remove unnecessary IR from MIR testsMatt Arsenault2017-07-067-358/+113
| | | | llvm-svn: 307311
* [lit] Factor out some shell input/output redirection logic, NFCReid Kleckner2017-07-061-70/+97
| | | | | | | This is a very light refactoring aimed at improving readability. There is definitely still room for improvement here. llvm-svn: 307310
* [AMDGPU] Always use rcp + mul with fast mathStanislav Mekhanoshin2017-07-064-51/+40
| | | | | | | | | | | | | | | | | | | | | | | | | Regardless of relaxation options such as -cl-fast-relaxed-math we are producing rather long code for fdiv via amdgcn_fdiv_fast intrinsic. This intrinsic is used to replace fdiv with 2.5ulp metadata and does not handle denormals, thus believed to be fast. An fdiv instruction can also have fast math flag either by itself or together with fpmath metadata. Clang used with a relaxation flag always produces both metadata and fast flag: %div = fdiv fast float %v, %0, !fpmath !12 !12 = !{float 2.500000e+00} Current implementation ignores fast flag and favors metadata. An instruction with just fast flag would be lowered to a fastest rcp + mul, but that never happen on practice because of described mutual clang and BE behavior. This change allows an "fdiv fast" to be always lowered as rcp + mul. Differential Revision: https://reviews.llvm.org/D34844 llvm-svn: 307308
* [lib/LTO] Add a comment to explain where we set the linkage in the summary.Davide Italiano2017-07-061-0/+5
| | | | | | Pointed out by Teresa! llvm-svn: 307305
* [ValueTracking] Support icmps fed by 'and' and 'or'.Chad Rosier2017-07-064-9/+257
| | | | | | | | | | This patch adds support for handling some forms of ands and ors in ValueTracking's isImpliedCondition API. PR33611 https://reviews.llvm.org/D34901 llvm-svn: 307304
* [LTO] Fix the interaction between linker redefined symbols and ThinLTODavide Italiano2017-07-063-2/+35
| | | | | | | | | | | | | | | | | | | | | | | | This is the same as r304719 but for ThinLTO. The substantial difference is that in this case we don't have whole visibility, just the summary. In the LTO case, when we got the resolution for the input file we could just see if the linker told us whether a symbol was linker redefined (using --wrap or --defsym) and switch the linkage directly for the GV. Here, we have the summary. So, we record that the linkage changed from <whatever it was> to $weakany to prevent IPOs across this symbol boundaries and actually just switch the linkage at FunctionImport time. This patch should also fixes the lld bits (as all the scaffolding for communicating if a symbol is linker redefined should be there & should be the same), but I'll make sure to add some tests there as well. Fixes PR33192. Differential Revision: https://reviews.llvm.org/D35064 llvm-svn: 307303
* [GISel]: Enhance the MachineIRBuilder APIAditya Nandakumar2017-07-062-3/+42
| | | | | | | | | | | | | | | | | | | | Allows the MachineIRBuilder APIs to directly create registers (based on LLT or TargetRegisterClass) as well as accept MachineInstrBuilders and implicitly converts to register(with getOperand(0).getReg()). Eg usage: LLT s32 = LLT::scalar(32); auto C32 = Builder.buildConstant(s32, 32); auto Tmp = Builder.buildInstr(TargetOpcode::G_SUB, s32, C32, OtherReg); auto Tmp2 = Builder.buildInstr(Opcode, DstReg, Builder.buildConstant(s32, 31)); .... Only a few methods added for now. Reviewed by Tim llvm-svn: 307302
* [X86][SSE] Tests for bitcasting iX integers to vXi1 boolean vectorsSimon Pilgrim2017-07-063-0/+7447
| | | | | | Including sign/zero extension to legal types llvm-svn: 307301
* Add @LINE to checks in a test.Rafael Espindola2017-07-061-22/+29
| | | | | | This makes it a lot easier to see which error failed a check. llvm-svn: 307300
* remove an unused empty file.Chris Lattner2017-07-061-0/+0
| | | | llvm-svn: 307299
* Prototype: Reduce llvm-profdata merge memory usage furtherDavid Blaikie2017-07-068-71/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The InstrProfWriter already stores the name and hash of the record in the nested maps it uses for lookup while merging - this data is duplicated in the value within the maps. Refactor the InstrProfRecord to use a nested struct for the counters themselves so that InstrProfWriter can use this nested struct alone without the name or hash duplicated there. This work is incomplete, but enough to demonstrate the value (around a 50% decrease in memory usage for a large test case (10GB -> 5GB)). Though most of that decrease is probably from removing the SoftInstrProfError as well, but I haven't implemented a replacement for it yet. (it needs to go with the counters, because the operations on the counters - merging, etc, are where the failures are - unlike the name/hash which are totally unused by those counter-related operations and thus easy to split out) Ongoing discussion about removing SoftInstrProfError as a field of the InstrProfRecord is happening on the thread that added it - including the possibility of moving back towards an earlier version of that proposed patch that passed SoftInstrProfError through the various APIs, rather than as a member of InstrProfRecord. Reviewers: davidxl Differential Revision: https://reviews.llvm.org/D34838 llvm-svn: 307298
* [llvm] Separate out reverse iteration flag into its own headerMandeep Singh Grang2017-07-062-10/+18
| | | | | | | | | | | | | | Summary: This will ease out adding reverse iteration flags to other containers by simply including the header. Reviewers: mehdi_amini, dexonsmith, davide, dblaikie Reviewed By: dblaikie Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D35042 llvm-svn: 307297
* [InstCombine] Remove include of DIBuilder.h and Dwarf.h as they don't appear ↵Craig Topper2017-07-061-2/+0
| | | | | | to be necessary. llvm-svn: 307295
* Modify constraints in `llvm::canReplaceOperandWithVariable`Leo Li2017-07-062-2/+32
| | | | | | | | | | | | | | | | | Summary: `Instruction::Switch`: only first operand can be set to a non-constant value. `Instruction::InsertValue` both the first and the second operand can be set to a non-constant value. `Instruction::Alloca` return true for non-static allocation. Reviewers: efriedma Reviewed By: efriedma Subscribers: srhines, pirama, llvm-commits Differential Revision: https://reviews.llvm.org/D34905 llvm-svn: 307294
* [Constants] Replace calls to ConstantInt::equalsInt(0)/equalsInt(1) with ↵Craig Topper2017-07-064-17/+17
| | | | | | isZero and isOne. NFCI llvm-svn: 307293
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