summaryrefslogtreecommitdiffstats
path: root/llvm
Commit message (Collapse)AuthorAgeFilesLines
...
* [InstCombine] move and improve tests for cmp-intrinsic; NFCSanjay Patel2017-07-032-60/+87
| | | | llvm-svn: 307022
* Revert "[GVN] Recommit the patch "Add phi-translate support in scalarpre"."Benjamin Kramer2017-07-035-321/+34
| | | | | | | This reverts commit r306313. This breaks selfhost at -O3 and PR33652. Let me know if you need additional information on reproducing the issue. llvm-svn: 307021
* [GlobalISel][X86] fix %ptr(p0) = G_CONSTANT selection.Igor Breger2017-07-033-1/+42
| | | | llvm-svn: 307019
* fix trivial typos in comments; NFCHiroshi Inoue2017-07-035-5/+5
| | | | llvm-svn: 307004
* [InstCombine] Add a TODO for a probable missing single use check. NFCCraig Topper2017-07-031-0/+2
| | | | | | Will try to fix it soon, but in case I forget. llvm-svn: 307003
* [InstCombine] Support BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( ↵Craig Topper2017-07-032-24/+18
| | | | | | BITWISE_OP(x, BSWAP(CONSTANT) ) ) for splat vectors. llvm-svn: 307002
* [InstCombine] Add test cases for BITWISE_OP( BSWAP(x), CONSTANT ) -> BSWAP( ↵Craig Topper2017-07-031-0/+33
| | | | | | BITWISE_OP(x, BSWAP(CONSTANT) ) ) with splat vectors. NFC llvm-svn: 307001
* [InstCombine] Remove support for BITWISE_OP(CONSTANT, BSWAP(x)) -> ↵Craig Topper2017-07-031-7/+2
| | | | | | | | BSWAP(OP(BSWAP(CONSTANT), x)). Constants were already canonicalized to the right hand side before we got here. llvm-svn: 307000
* [InstCombine] Support BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) ↵Craig Topper2017-07-032-19/+12
| | | | | | for vectors. llvm-svn: 306999
* [InstCombine] Add test cases showing missed opportunity to fold ↵Craig Topper2017-07-031-0/+40
| | | | | | BITWISE_OP(BSWAP(A),BSWAP(B))->BSWAP(BITWISE_OP(A, B)) for vectors. NFC llvm-svn: 306998
* [InstCombine] Remove an if that should have been guaranteed by the caller. ↵Craig Topper2017-07-031-4/+2
| | | | | | Replace with an assert. NFC llvm-svn: 306997
* AMDGPU: Add operand target flags serializationMatt Arsenault2017-07-023-0/+55
| | | | llvm-svn: 306995
* [X86][AVX512] Test AVX512VPOPCNTDQ CTPOP with/without AVX512BWSimon Pilgrim2017-07-021-29/+57
| | | | llvm-svn: 306991
* [X86][AVX512VPOPCNTDQ] Improve support for v16i8/v8i16/v16i16/ CTPOPSimon Pilgrim2017-07-027-156/+125
| | | | | | Zero extend to v16i32/v8i64, use VPOPCNTDQ instructions and truncate back. llvm-svn: 306990
* [X86][AVX512] Cleanup tzcnt tests triples and attributesSimon Pilgrim2017-07-021-36/+36
| | | | | | Avoid use of specific -mcpu llvm-svn: 306989
* [X86][AVX512] Cleanup popcnt tests triples and attributesSimon Pilgrim2017-07-021-15/+15
| | | | | | Avoid use of specific -mcpu llvm-svn: 306988
* [IR] Remove unnecessary operator new from ConstantDataArray and ↵Craig Topper2017-07-021-10/+0
| | | | | | ConstantDataVector. They inherit an identical version from ConstantData. NFC llvm-svn: 306987
* [InstCombine] Use m_BitReverse pattern match helper. NFCI.Simon Pilgrim2017-07-021-2/+2
| | | | llvm-svn: 306986
* [InstCombine] fix crash when folding cmp+bswap vectorSanjay Patel2017-07-023-35/+45
| | | | | | | | | We assumed the constant was a scalar when creating the replacement operand. Also, improve tests for this fold and move the tests for this fold to their own file. I'll move the related and missing tests to this file as a follow-up. llvm-svn: 306985
* [x86] auto-generate complete checks for tests; NFCSanjay Patel2017-07-024-72/+126
| | | | | | These all used 'CHECK-NOT' which isn't necessary if we have complete checks. llvm-svn: 306984
* [x86] remove unnecessary RUN for test after auto-generating checks; NFCSanjay Patel2017-07-021-5/+21
| | | | llvm-svn: 306983
* [x86] update test to use FileCheck and auto-generate checks; NFCSanjay Patel2017-07-021-1/+50
| | | | llvm-svn: 306982
* [x86] auto-generate complete checks for tests; NFCSanjay Patel2017-07-024-32/+41
| | | | | | These all used 'CHECK-NOT' which isn't necessary if we have complete checks. llvm-svn: 306981
* [InstCombine] look through bswap/bitreverse for equality comparisonsSanjay Patel2017-07-022-12/+13
| | | | | | | | | I noticed this missed bswap optimization in the CGP memcmp() expansion, and then I saw that we don't have the fold in InstCombine. Differential Revision: https://reviews.llvm.org/D34763 llvm-svn: 306980
* llvm/test/Transforms/LoopVectorize/X86/slm-no-vectorize.ll: -debug is ↵NAKAMURA Takumi2017-07-021-0/+1
| | | | | | available in +Asserts. llvm-svn: 306979
* [X86][SSE] Attempt to combine 64-bit and 32-bit shuffles to unary shuffles ↵Simon Pilgrim2017-07-023-34/+23
| | | | | | | | before bit shifts We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive llvm-svn: 306978
* [X86][SSE] Attempt to combine 64-bit and 16-bit shuffles to unary shuffles ↵Simon Pilgrim2017-07-022-69/+58
| | | | | | | | | | before bit shifts We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive The 32-bit shuffles are a bit tricky and will be dealt with in a later patch llvm-svn: 306977
* [X86][SSE] Add test showing missed opportunity to combine to pshuflwSimon Pilgrim2017-07-021-0/+18
| | | | | | We are combining shuffles to bit shifts before unary permutes, which means we can't fold loads plus the destination register is destructive llvm-svn: 306976
* fix trivial typos in documents; NFCHiroshi Inoue2017-07-022-2/+2
| | | | llvm-svn: 306975
* [X86][CM] update add\sub costs of vectors of 64 in X86\SLM archMohammed Agabaria2017-07-023-11/+78
| | | | | | | | | this patch updates the cost of addq\subq (add\subtract of vectors of 64bits) based on the performance numbers of SLM arch. Differential Revision: https://reviews.llvm.org/D33983 llvm-svn: 306974
* [X86] Rerun "update_llc_test_checks" tool on CodeGen tests. NFC.Gadi Haber2017-07-023-0/+75
| | | | | | | | | | This is NFC after rerunning the "update_llc_test_checks.py" tool on the CodeGen X86 tests in order to submit a patch. Minor differences due to added "End of Function" lines. Reviewers: zvi Differential Revision: https://reviews.llvm.org/D34933 llvm-svn: 306973
* [GlobalISel][X86] Support G_GLOBAL_VALUE operation.Igor Breger2017-07-026-8/+284
| | | | | | | | | | | | | | | | | Summary: Support G_GLOBAL_VALUE operation. For now most of the PIC configurations not implemented yet. Reviewers: zvi, guyblank Reviewed By: guyblank Subscribers: rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D34738 Conflicts: test/CodeGen/X86/GlobalISel/regbankselect-X86_64.mir llvm-svn: 306972
* [GlobalISel][X86] Support vector type G_UNMERGE_VALUES selection.Igor Breger2017-07-024-17/+314
| | | | | | | | | | | | | | | | Summary: Support vector type G_UNMERGE_VALUES selection. For now G_UNMERGE_VALUES marked as legal for any type, so nothing to do in legalizer. Reviewers: t.p.northover, qcolombet, zvi, guyblank Reviewed By: guyblank Subscribers: rovka, kristof.beyls, guyblank, llvm-commits Differential Revision: https://reviews.llvm.org/D33665 llvm-svn: 306971
* fix trivial typos; NFCHiroshi Inoue2017-07-026-7/+7
| | | | | | suport -> support llvm-svn: 306968
* [InstCombine] Fold (a | b) ^ (~a | ~b) --> ~(a ^ b) and (a & b) ^ (~a & ~b) ↵Craig Topper2017-07-023-34/+34
| | | | | | | | | | | | | | | | | | | --> ~(a ^ b) Summary: I came across this while thinking about what would happen if one of the operands in this xor pattern was itself a inverted (A & ~B) ^ (~A & B)-> (A^B). The patterns here assume that the (~a | ~b) will be demorganed to ~(a & b) first. Though I wonder if there's a multiple use case that would prevent the demorgan. Reviewers: spatel Reviewed By: spatel Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D34870 llvm-svn: 306967
* [CodeExtractor] Remove unneded and commented out debugging stmts.Davide Italiano2017-07-021-6/+0
| | | | llvm-svn: 306966
* [X86][RDSEED] Split off i64 intrinsic tests and test i16/i32 on 32-bit ↵Simon Pilgrim2017-07-012-29/+56
| | | | | | target as well. llvm-svn: 306961
* [X86][RDRAND] Split off i64 intrinsic tests and test i16/i32 on 32-bit ↵Simon Pilgrim2017-07-012-36/+102
| | | | | | target as well. llvm-svn: 306960
* [X86] Removed reference to update_test_checks.pySimon Pilgrim2017-07-011-1/+1
| | | | llvm-svn: 306959
* [X86][AVX] Remove duplicate autogeneration noteSimon Pilgrim2017-07-011-3/+2
| | | | llvm-svn: 306958
* fix trivial typos, NFCHiroshi Inoue2017-07-015-7/+7
| | | | llvm-svn: 306952
* [SelectionDAGBuilder] Use EVT::getVectorVT instead of MVT::getVectorVT to ↵Craig Topper2017-07-011-1/+1
| | | | | | prevent a crash if the type isn't a simple VT. llvm-svn: 306950
* [AVR] Remove a bunch of now-obselete testsDylan McKay2017-07-014-20/+0
| | | | | | The fixups in these instructions are now lowered into relocations. llvm-svn: 306947
* Revert "Revert "Replace trivial use of external rc.exe by writing our own ↵Eric Beckmann2017-07-015-30/+56
| | | | | | | | | | | | | | | | | | .res file."" Summary: This reverts commit 51931072a7c9a52540baf76fc30ef391d2529a2f. This revert was originally done because the integrations of the new WindowsResource library into LLD was causing error in chromium, due to bugs in how resource sections were handled. These bugs were fixed, meaning that the features may be reintegrated. Subscribers: hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D34922 llvm-svn: 306941
* Remove the default ARMSubtarget from the ARM TargetMachine.Eric Christopher2017-07-014-21/+20
| | | | | | | This enables us to ensure better LTO and code generation in the face of module linking. Remove a report_fatal_error from the TargetMachine and replace it with an assert in ARMSubtarget - and remove the test that depended on the error. The assertion will still fire in the case that we were reporting before, but error reporting needs to be in front end tools if possible for options parsing. llvm-svn: 306939
* [Cloner] Re-map simplfied cloned instructions.Davide Italiano2017-07-012-5/+29
| | | | | | | | | | | | | | | This commit pretty much rolls back the logic added in r306495 as in the testcase provided we simplify an `icmp` looking through a PHI that hasn't been mapped yet. I think instsimplify shouldn't do threading over select/phis or just looking through phis in general, but this is what we have now. Also, add a test to prevent this from happening in case somebody wants to modify this code again. Briefly discussed with Kyle Butt (thanks Kyle!). llvm-svn: 306938
* Recommit "r306541 - Add zero-length check to memcpy/memset load store loop ↵Teresa Johnson2017-07-012-5/+18
| | | | | | | | | | expansion"" With fix for use-after-free errors. We can't add the new branch and remove the old one until we are done with the Builder constructed for the block. llvm-svn: 306937
* Revert "r306473 - re-commit r306336: Enable vectorizer-maximize-bandwidth by ↵Teresa Johnson2017-07-0112-77/+68
| | | | | | | | | default." This still breaks PPC tests we have. I'll forward reproduction instructions to dehao. llvm-svn: 306936
* re-commit r306336: Enable vectorizer-maximize-bandwidth by default.Teresa Johnson2017-07-0112-68/+77
| | | | | | Differential Revision: https://reviews.llvm.org/D33341 llvm-svn: 306935
* revert r306336 for breaking ppc test.Teresa Johnson2017-07-0112-77/+68
| | | | llvm-svn: 306934
OpenPOWER on IntegriCloud