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* [IR] Make getIndexedOffsetInType return a signed resultDavid Majnemer2016-07-134-9/+9
| | | | | | | A GEPed offset can go negative, the result of getIndexedOffsetInType should according be a signed type. llvm-svn: 275246
* vim: add local_unnamed_addr keywordSaleem Abdulrasool2016-07-131-6/+6
| | | | | | | The `local_unnamed_addr` was introduced in SVN r272709. Update the syntax highlighting rules. llvm-svn: 275245
* [ConstantFold] Don't incorrectly infer inbounds on array GEPDavid Majnemer2016-07-132-42/+69
| | | | | | | | The many levels of nesting inside the responsible code made it easy for bugs to sneak in. Flattening the logic makes it easier to see what's going on. llvm-svn: 275244
* [LoopVectorize] Further cleanupsDavid Majnemer2016-07-131-4/+2
| | | | | | No functional change is intended, just a minor cleanup. llvm-svn: 275243
* [X86] Remove some seemingly unnecessary patterns that supported vector ↵Craig Topper2016-07-132-33/+0
| | | | | | | | zext/sext with 256-bit source types producing a 256-bit result. These patterns just extracted the source down to 128-bits to use the instructions. AVX512 seems to have blindly copied them over for VLX, but did not create similar patterns for 512-bit sources. So I'm hoping the backend can't actually produce these cases. llvm-svn: 275240
* Fix ScalarEvolutionExpander step scaling bugKeno Fischer2016-07-132-0/+55
| | | | | | | | | | | | | | | | The expandAddRecExprLiterally function incorrectly transforms `[Start + Step * X]` into `Step * [Start + X]` instead of the correct transform of `[Step * X] + Start`. This caused https://github.com/JuliaLang/julia/issues/14704#issuecomment-174126219 due to what appeared to be sufficiently complicated loop interactions. Patch by Jameson Nash (jameson@juliacomputing.com). Reviewers: sanjoy Differential Revision: http://reviews.llvm.org/D16505 llvm-svn: 275239
* Remove another unused variable from r275216Teresa Johnson2016-07-121-2/+1
| | | | | | | Remove another variable added in r275216 that was only used in debug mode. llvm-svn: 275238
* [LV] Do not invalidate use-lists we're iterating over.Michael Kuperstein2016-07-121-14/+15
| | | | | | Should make sanitizers happier. llvm-svn: 275230
* Add missing files for r275222Dehao Chen2016-07-122-0/+2
| | | | | | | | | | | | | | New pass manager for LICM. Summary: Port LICM to the new pass manager. Reviewers: davidxl, silvas Subscribers: krasin, vitalybuka, silvas, davide, sanjoy, llvm-commits, mehdi_amini Differential Revision: http://reviews.llvm.org/D21772 llvm-svn: 275224
* New pass manager for LICM.Dehao Chen2016-07-1229-68/+174
| | | | | | | | | | | | Summary: Port LICM to the new pass manager. Reviewers: davidxl, silvas Subscribers: krasin, vitalybuka, silvas, davide, sanjoy, llvm-commits, mehdi_amini Differential Revision: http://reviews.llvm.org/D21772 llvm-svn: 275222
* GlobalISel: freeze reserved regs after IRTranslator.Tim Northover2016-07-122-1/+6
| | | | | | | | | | We can freeze the registers after the MachineFrameInfo has been configured (by telling it about calls, inline asm, ...). This doesn't happen at all yet, but will be part of IR translation. Fixes -verify-machineinstrs assertion. llvm-svn: 275221
* AMDGPU: Follow up to r275203Matt Arsenault2016-07-126-39/+218
| | | | | | I meant to squash this into it. llvm-svn: 275220
* Remove unused variable to fix bot failure from r275216Teresa Johnson2016-07-121-2/+1
| | | | | | | Remove unused variable added in r275216. Should fix bot failure: http://lab.llvm.org:8011/builders/lld-x86_64-darwin13/builds/24665 llvm-svn: 275219
* The test case I added is PowerPC specific but I accidentallyNemanja Ivanovic2016-07-121-0/+0
| | | | | | | | had it in the wrong directory. Moved it to CodeGen/PowerPC. Sorry about the noise. llvm-svn: 275218
* [LV] Remove wrong assumption about LCSSAMichael Kuperstein2016-07-122-5/+25
| | | | | | | | | The LCSSA pass itself will not generate several redundant PHI nodes in a single exit block. However, such redundant PHI nodes don't violate LCSSA form, and may be introduced by passes that preserve LCSSA, and/or preserved by the LCSSA pass itself. So, assuming a single PHI node per exit block is not safe. llvm-svn: 275217
* Refactor indirect call promotion profitability analysis (NFC)Teresa Johnson2016-07-127-63/+201
| | | | | | | | | | | | | | | Summary: Refactored the profitability analysis out of the IC promotion pass and into lib/Analysis so that it can be accessed by the summary index builder in a follow-on patch to enable IC promotion in ThinLTO (D21932). Reviewers: davidxl, xur Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22182 llvm-svn: 275216
* [Power9] Add codegen for VSX word insert/extract instructionsNemanja Ivanovic2016-07-126-8/+1190
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D20239 It adds exploitation of XXINSERTW and XXEXTRACTUW instructions that are useful in some cases for inserting and extracting vector elements of v4[if]32 vectors. llvm-svn: 275215
* Review fixes to lit documentationPiotr Padlewski2016-07-122-33/+2
| | | | | | | | | | Reviewers: mehdi_amini Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D22245 llvm-svn: 275214
* [LoopAccessAnalysis] Some minor cleanupsDavid Majnemer2016-07-121-20/+16
| | | | | | | | | Use range-base for loops. Use auto when appropriate. No functional change is intended. llvm-svn: 275213
* [X86][AVX] Add support for target shuffle combining to VPERM2F128/VPERM2I128Simon Pilgrim2016-07-123-10/+57
| | | | llvm-svn: 275212
* [SCCP] Constant fold structs if all the lattice value are constant.Davide Italiano2016-07-122-9/+107
| | | | | | Differential Revision: http://reviews.llvm.org/D22269 llvm-svn: 275208
* [LoopVectorize] Assorted cleanupsDavid Majnemer2016-07-121-223/+184
| | | | | | | | | Use range-based for loops instead of doing everything manually. Use auto when appropriate. No functional change is intended. llvm-svn: 275205
* X86FixupBWInsts: No need for forward liveness analysis.Matthias Braun2016-07-122-72/+0
| | | | | | | | | | With r274952 and r275201 in place there are no cases left where a forward liveness analysis yields different results than a backward one. So we can remove the forward stepping logic. Differential Revision: http://reviews.llvm.org/D22083 llvm-svn: 275204
* AMDGPU: Fix verifier error with kill intrinsicMatt Arsenault2016-07-123-70/+272
| | | | | | | Don't create a terminator in the middle of the block. We should probably get rid of this intrinsic. llvm-svn: 275203
* [PM] Port LoopIdiomRecognize Pass to new PMDehao Chen2016-07-127-38/+116
| | | | | | | | | | | | Summary: Port LoopIdiomRecognize Pass to new PM Reviewers: davidxl Subscribers: davide, sanjoy, mzolotukhin, llvm-commits Differential Revision: http://reviews.llvm.org/D22250 llvm-svn: 275202
* BranchFolding: Use LivePhysReg to update live in lists.Matthias Braun2016-07-122-29/+30
| | | | | | | | | | | | | | | Use LivePhysRegs with a backwards walking algorithm to update live in lists, this way the results do not depend on the presence of kill flags anymore. This patch also reduces the number of registers added as live-in. Previously all pristine registers as well as all sub registers of a super register were added resulting in unnecessarily large live in lists. This fixed https://llvm.org/PR25263. Differential Revision: http://reviews.llvm.org/D22027 llvm-svn: 275201
* AMDGPU: Set isConvergent on v_cmpx* instructionsMatt Arsenault2016-07-121-2/+3
| | | | | | | No test since these aren't used now, except for one place in a pre-emit pass. llvm-svn: 275200
* AMDGPU: Add LLVM IR Intrinsic for v_lerp_u8Wei Ding2016-07-123-0/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D22239 llvm-svn: 275197
* Fix printing of debugging information in LiveIntervals::shrinkToUsesKrzysztof Parzyszek2016-07-121-1/+1
| | | | | | | Print VNI->def before calling VNI->markUnused(), since markUnused makes the def invalid. llvm-svn: 275196
* Add print/dump routines to LiveInterval::SubRangeKrzysztof Parzyszek2016-07-122-10/+27
| | | | llvm-svn: 275194
* [PGO] Don't include full file path in static function profile counter namesXinliang David Li2016-07-122-3/+23
| | | | | | | Patch by Jake VanAdrighem Differential Revision: http://reviews.llvm.org/D22028 llvm-svn: 275193
* add tests for missing DeMorgan's Law foldsSanjay Patel2016-07-121-0/+55
| | | | llvm-svn: 275192
* auto-generate checksSanjay Patel2016-07-121-20/+23
| | | | llvm-svn: 275188
* auto-generate checksSanjay Patel2016-07-121-12/+13
| | | | llvm-svn: 275187
* auto-generate checksSanjay Patel2016-07-121-159/+190
| | | | llvm-svn: 275186
* [MC] Flip llc's assembly comment preservation flag to have consistentNirav Dave2016-07-121-3/+4
| | | | | | orientation with llvm-mc. llvm-svn: 275179
* [AArch64] Set FMOVS0 and FMOVD0 as isAsCheapAsAMove when needed.Haicheng Wu2016-07-122-4/+10
| | | | | | | | | If a subtarget has both ZCZeroing and CustomCheapAsMoveHandling features (now only Kryo has both), set FMOVS0 and FMOVD0 isAsCheapAsAMove. Differential Revision: http://reviews.llvm.org/D22256 llvm-svn: 275178
* [PowerPC] Cannonicalize applicable vector shift immediates as swapsNemanja Ivanovic2016-07-126-11/+53
| | | | | | | | | | | This patch corresponds to review: http://reviews.llvm.org/D21358 Vector shifts that have the same semantics as a vector swap are cannonicalized as such to provide additional opportunities for swap removal optimization to remove unnecessary swaps. llvm-svn: 275168
* [codeview] Improved array type support.Amjad Aboud2016-07-125-33/+305
| | | | | | | | | | | | Added support for: 1. Multi dimension array. 2. Array of structure type, which previously was declared incompletely. 3. Dynamic size array. 4. Array where element type is a typedef, volatile or constant (this should resolve PR28311). Differential Revision: http://reviews.llvm.org/D21526 llvm-svn: 275167
* AMDGPU: Unify MOVRELSOffset and MOVRELDOffsetNicolai Haehnle2016-07-125-40/+23
| | | | | | | | | | | | | | | | Summary: Previously, constant index insertelements would be turned into SI_INDIRECT_DST, which is bound to prevent some optimization opportunities. Worse, it mislead the heuristic that decides whether immediates should be lowered to S_MOV_B32 or V_MOV_B32 in a way that resulted in unnecessary v_readfirstlanes. Reviewers: arsenm, tstellarAMD Subscribers: arsenm, kzhuravl, llvm-commits Differential Revision: http://reviews.llvm.org/D22217 llvm-svn: 275160
* Revert "New pass manager for LICM."Vitaly Buka2016-07-1231-175/+67
| | | | | | | | | | Summary: This reverts commit r275118. Subscribers: sanjoy, mehdi_amini Differential Revision: http://reviews.llvm.org/D22259 llvm-svn: 275156
* [AVX512] Remove masked logic op intrinsics and autoupgrade them to native IR.Craig Topper2016-07-127-1276/+1197
| | | | llvm-svn: 275155
* Dump enum unique names.Rui Ueyama2016-07-121-0/+3
| | | | llvm-svn: 275152
* Re-enable TPI hash verification for enum records.Rui Ueyama2016-07-123-4/+10
| | | | | | | We didn't read unique names correctly. As a result, we computed hashes on (non-)unique names instead of unique names. llvm-svn: 275150
* X86: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-1210-220/+220
| | | | | | | | Avoid implicit conversions from MachineInstrBundleIterator to MachineInstr*, mainly by preferring MachineInstr& over MachineInstr* and using range-based for loops. llvm-svn: 275149
* Fix libdeps in r275125. LTO tools require BitReader.NAKAMURA Takumi2016-07-122-0/+2
| | | | llvm-svn: 275148
* Print remarks from WholeProgramDevirt pass for each call site.Ivan Krasin2016-07-124-3/+23
| | | | | | | | | | | | | Summary: It's useful to have some visibility about which call sites are devirtualized, especially for debug purposes. Another use case is a regression test on the application side (like, Chromium). Reviewers: pcc Differential Revision: http://reviews.llvm.org/D22252 llvm-svn: 275145
* llvm/test/CodeGen/AMDGPU/selected-stack-object.ll REQUIRES +Asserts, since ↵NAKAMURA Takumi2016-07-121-0/+3
| | | | | | it expects assertion failure. llvm-svn: 275144
* [Kryo] Enable ZCZeroing featureHaicheng Wu2016-07-122-23/+32
| | | | | | | | This feature uses immediate #0 to zero a register. Differential Revision: http://reviews.llvm.org/D19985 llvm-svn: 275143
* Hexagon: Avoid implicit iterator conversions, NFCDuncan P. N. Exon Smith2016-07-1215-442/+426
| | | | | | | | | | | | | | Avoid implicit iterator conversions from MachineInstrBundleIterator to MachineInstr* in the Hexagon backend, mostly by preferring MachineInstr& over MachineInstr* and switching to range-based for loops. There's a long tail of API cleanup here, but I'm planning to leave the rest to the Hexagon maintainers. HexagonInstrInfo defines many of its own predicates, and most of them still take MachineInstr*. Some of those actually check for nullptr, so I didn't feel comfortable changing them to MachineInstr& en masse. llvm-svn: 275142
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