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* Move optimization to avoid redundant matching.Benjamin Kramer2010-07-121-13/+13
| | | | llvm-svn: 108140
* Revert r108136 until I figure out why it broke selfhost.Benjamin Kramer2010-07-123-45/+0
| | | | llvm-svn: 108139
* cache dereferenced iteratorsGabor Greif2010-07-121-2/+3
| | | | llvm-svn: 108138
* recommit r108131 (hich has been backed out in r108135) with a fixGabor Greif2010-07-121-2/+3
| | | | llvm-svn: 108137
* instcombine: fold (x & y) | (~x & z) and (x & y) ^ (~x & z) into ((y ^ z) & ↵Benjamin Kramer2010-07-123-0/+45
| | | | | | | | | | | | | | | | | x) ^ z which is one instruction shorter. (PR6773) before: %and = and i32 %y, %x %neg = xor i32 %x, -1 %and4 = and i32 %z, %neg %xor = xor i32 %and4, %and after: %xor1 = xor i32 %z, %y %and2 = and i32 %xor1, %x %xor = xor i32 %and2, %z llvm-svn: 108136
* back out r108131 (of TailDuplication.cpp) for now, it causes a buildbot failureGabor Greif2010-07-121-5/+4
| | | | llvm-svn: 108135
* cache dereferenced iteratorsGabor Greif2010-07-121-3/+3
| | | | llvm-svn: 108134
* cache dereferenced iteratorsGabor Greif2010-07-121-4/+6
| | | | llvm-svn: 108133
* cache dereferenced iteratorsGabor Greif2010-07-121-3/+5
| | | | llvm-svn: 108132
* cache dereferenced iteratorsGabor Greif2010-07-123-9/+12
| | | | llvm-svn: 108131
* Convert some tab stops into spaces.Duncan Sands2010-07-1233-77/+77
| | | | llvm-svn: 108130
* Add parentheses around an || to correct the logic. Also silences a GCC warningChandler Carruth2010-07-121-1/+1
| | | | | | | | | that was actually useful here. Chris, please double check that this is the correct interpretation. I was pretty sure, and ran it by Nick as well. llvm-svn: 108129
* Remove tab characters and 80-col.Eric Christopher2010-07-122-5/+5
| | | | llvm-svn: 108127
* 80 columns.Eric Christopher2010-07-122-2/+3
| | | | llvm-svn: 108126
* Path::isRootDirectory is unimplemented on Unix and not used,Chris Lattner2010-07-122-14/+0
| | | | | | remove it, fixing PR6909. llvm-svn: 108125
* Convert getLoadStoreRegOpcode to use a switch.Rafael Espindola2010-07-121-26/+29
| | | | llvm-svn: 108123
* Convert the last use of getPhysicalRegisterRegClass and remove it.Rafael Espindola2010-07-123-28/+5
| | | | | | | | | | | | AggressiveAntiDepBreaker should not be using getPhysicalRegisterRegClass. An instruction might be using a register that can only be replaced with one from a subclass of getPhysicalRegisterRegClass. With this patch we use getMinimalPhysRegClass. This is correct, but conservative. We should check the uses of the register and select the largest register class that can be used in all of them. llvm-svn: 108122
* Fix up the ocaml kaleidoscope example as well.Eric Christopher2010-07-124-12/+12
| | | | | | Note that the example currently doesn't appear to work. llvm-svn: 108121
* A basic block that only uses RFP registers still needs the FP_REG_KILL marker.Jakob Stoklund Olesen2010-07-121-10/+7
| | | | | | This fixes PR7375. llvm-svn: 108120
* Don't use getPhysicalRegisterRegClass in PBQP. The existing checks that theRafael Espindola2010-07-121-15/+10
| | | | | | | | | | physical register can be allocated in the class of the virtual are sufficient. I think that the test for virtual registers is more strict than it needs to be, it should be possible to coalesce two virtual registers the class of one is a subclass of the other. llvm-svn: 108118
* fix PR7311 by avoiding breaking casts when a bitcast from scalar->vectorChris Lattner2010-07-122-0/+19
| | | | | | is involved. llvm-svn: 108117
* make the prototypes for CreateMalloc and CreateFree more consistent. PatchChris Lattner2010-07-123-6/+8
| | | | | | by Hans Vandierendonck from PR7605 llvm-svn: 108116
* Convert the last getPhysicalRegisterRegClass in VirtRegRewriter.cpp toRafael Espindola2010-07-122-2/+3
| | | | | | | | | getMinimalPhysRegClass. It was used to produce spills, and it is better to use the most specific class if possible. Update getLoadStoreRegOpcode to handle GR32_AD. llvm-svn: 108115
* if jump threading is able to infer interesting values on bothChris Lattner2010-07-122-2/+37
| | | | | | | | the LHS and RHS of an and/or instruction, don't multiply add known predecessor values. This fixes the crash on testcase from PR7498 llvm-svn: 108114
* fix PR7429, a crash turning a load from a string into a float.Chris Lattner2010-07-122-3/+22
| | | | llvm-svn: 108113
* convert to filechecconvert to filecheckkChris Lattner2010-07-121-10/+10
| | | | llvm-svn: 108112
* merge two tests.Chris Lattner2010-07-122-11/+11
| | | | llvm-svn: 108111
* improve Path::makeUnique when mkstemp/mktemp are not availableChris Lattner2010-07-121-7/+12
| | | | | | patch by Lasse Kärkkäinen in PR7404. llvm-svn: 108110
* change machinelicm to use MachineInstr::isSafeToMove. NoChris Lattner2010-07-121-18/+8
| | | | | | | | intended functionality change. The avoidance of hoistiing implicitdef seems wrong though. llvm-svn: 108109
* first part of JIT support for address of labels, part of PR7264,Chris Lattner2010-07-113-13/+81
| | | | | | patch by Yuri! llvm-svn: 108107
* introduce WinCOFFObjectWriter, patch by Michael Spencer!Chris Lattner2010-07-113-0/+74
| | | | llvm-svn: 108103
* introduce WinCOFFStreamer.cpp, patch by Michael Spencer!Chris Lattner2010-07-113-0/+205
| | | | llvm-svn: 108102
* If it's safe to speculatively execute load(alloca) the it's safe to executeNick Lewycky2010-07-111-3/+11
| | | | | | | load(gep(alloca)) where the gep is all-zeros. There's more we could do here but this is a common case. llvm-svn: 108101
* fix typoChris Lattner2010-07-111-1/+1
| | | | llvm-svn: 108100
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-1116-812/+0
| | | | | | | | The only folding these load/store architectures can do is converting COPY into a load or store, and the target independent part of foldMemoryOperand already knows how to do that. llvm-svn: 108099
* Use target independent COPY instructions for the fake fextend and froundJakob Stoklund Olesen2010-07-111-6/+6
| | | | | | operations in x87 code. llvm-svn: 108098
* Remove redundant branch. Thanks, Anton!Jakob Stoklund Olesen2010-07-111-2/+0
| | | | llvm-svn: 108097
* Remove obsolete README_SSE note.Jakob Stoklund Olesen2010-07-111-10/+0
| | | | | | | | | | | | | | | We are generating movaps for all XMM register copies, including scalar floating point values. This is known to be at least as good as movss and movsd for all known architectures up to and including Nehalem because it avoids a partial register stall. The SSEDomainFix pass will switch movaps to movdqa when appropriate (i.e., when operands come from the integer unit). We don't now that switching movaps to movapd has any benefit. The same applies to andps -> pand. llvm-svn: 108096
* Remove TargetInstrInfo::copyRegToReg entirely.Jakob Stoklund Olesen2010-07-116-41/+9
| | | | | | | Targets must now implement TargetInstrInfo::copyPhysReg instead. There is no longer a default implementation forwarding to copyRegToReg. llvm-svn: 108095
* Make getPhysicalRegisterRegClass non-virtual. Should be able to remove it soon.Rafael Espindola2010-07-115-41/+1
| | | | llvm-svn: 108094
* Convert uses of getPhysicalRegisterRegClass in VirtRegRewriter.cpp.Rafael Espindola2010-07-111-2/+2
| | | | | | | | | | | | The first one was used just to call isSafeToMoveRegClassDefs. In general, using a more specific reg class is better, in practice only x86 implements that method and the results are always the same. The second one is in FindFreeRegister and is used to check if a register is in a register class, a much more direct call to contains is better as it should cover more cases and is faster. llvm-svn: 108093
* Replace copyRegToReg with copyPhysReg for SystemZ.Jakob Stoklund Olesen2010-07-112-58/+28
| | | | llvm-svn: 108092
* Avoid SSE instructions in FastIsel when it is not available.Jakob Stoklund Olesen2010-07-111-4/+4
| | | | llvm-svn: 108091
* Remove two other uses of ATTRIBUTE_UNUSED for variables only used withinChandler Carruth2010-07-112-5/+4
| | | | | | | | assert()s, switching to void-casts. Removed an unneeded Compiler.h include as a result. There are two other uses in LLVM, but they're not due to assert()s, so I've left them alone. llvm-svn: 108088
* Replace copyRegToReg with copyPhysReg for XCore.Jakob Stoklund Olesen2010-07-112-32/+24
| | | | llvm-svn: 108087
* Replace copyRegToReg with copyPhysReg for Sparc.Jakob Stoklund Olesen2010-07-112-28/+18
| | | | llvm-svn: 108086
* Replace copyRegToReg with copyPhysReg for CellSPU.Jakob Stoklund Olesen2010-07-112-34/+10
| | | | llvm-svn: 108084
* Replace copyRegToReg with copyPhysReg for PowerPC.Jakob Stoklund Olesen2010-07-112-36/+30
| | | | llvm-svn: 108083
* Fix PIC16 comments referencing copyRegToReg.Jakob Stoklund Olesen2010-07-111-3/+3
| | | | llvm-svn: 108082
* Replace copyRegToReg with copyPhysReg for PIC16.Jakob Stoklund Olesen2010-07-112-24/+17
| | | | llvm-svn: 108081
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