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* [mips] Run test case with command line option -mattr=+fp64.Akira Hatanaka2013-11-121-16/+39
| | | | llvm-svn: 194519
* Add a FIXME for 32-bit q modifiers.Eric Christopher2013-11-121-0/+1
| | | | llvm-svn: 194515
* Protect user-supplied runtime library functions in LTOJustin Bogner2013-11-123-3/+76
| | | | | | | | | | | | | | Add user-supplied C runtime and compiler-rt library functions to llvm.compiler.used to protect them from premature optimization by passes like -globalopt and -ipsccp. Calls to (seemingly unused) runtime library functions can be added by -instcombine and instruction lowering. Patch by Duncan Exon Smith, thanks! Fixes <rdar://problem/14740087> llvm-svn: 194514
* ARM: diagnose invalid system LDM/STMTim Northover2013-11-122-0/+21
| | | | | | | | | | | | | The system LDM and STM instructions can't usually writeback to the base register. The one exception is when an LDM is actually an exception-return (i.e. contains PC in the register list). (There's already a test that "ldm sp!, {r0-r3, pc}^" works, which is why there is no positive test). rdar://problem/15223374 llvm-svn: 194512
* [mips] Revert part of r194510 that was accidentally committed.Akira Hatanaka2013-11-121-1/+1
| | | | llvm-svn: 194511
* [mips] Fix and re-enable a test case that has been disabled for a long time.Akira Hatanaka2013-11-122-100/+121
| | | | llvm-svn: 194510
* [OCaml] Dynamically link LLVM on --enable-shared buildsPeter Zotov2013-11-122-2/+68
| | | | | | | | | | This commit significantly speeds up both bytecode and native builds of LLVM clients (from ~20 second to sub-second link time), and allows to invoke LLVM functions from OCaml toplevel. The behavior for --disable-shared builds is unchanged. llvm-svn: 194509
* [OCaml] Fix a typoPeter Zotov2013-11-121-6/+6
| | | | llvm-svn: 194508
* Corruptly merge constants with explicit and implicit alignments.Rafael Espindola2013-11-122-4/+35
| | | | | | | | | | | | | Constant merge can merge a constant with implicit alignment with one that has explicit alignment. Before this change it was assuming that the explicit alignment was higher than the implicit one, causing the result to be under aligned in some cases. Fixes pr17815. Patch by Chris Smowton! llvm-svn: 194506
* Export intrinsics:__builtin_arm_{dmb,dsb} to frontendWeiming Zhao2013-11-121-2/+2
| | | | llvm-svn: 194505
* [AArch64] Implemented AdvSIMD scalar x indexed element format and AdvSIMD scalarChad Rosier2013-11-1214-37/+1001
| | | | | | | | copy in MC layer. Added the MC layer tests. Fixed triple setting in test cases. Patch by Ana Pazos <apazos@codeaurora.org>. llvm-svn: 194501
* Expand rotate instructions on sparcv9 as well.Roman Divacky2013-11-121-0/+2
| | | | llvm-svn: 194500
* Simplify operand folding when rematerializing a load.Andrew Trick2013-11-122-12/+12
| | | | | | | | | | | | We already know how to fold a reload from a frameindex without analyzing the load instruction. Generalize this to handle any frameindex load. This streamlines the logic for rematerializing loads from stack arguments. As a side effect, it allows stackmaps to record a stack argument location without spilling it. Verified no effect on codegen for llvm test-suite. llvm-svn: 194497
* GraphViz CFGPrinter: wrap long lines.Andrew Trick2013-11-121-2/+19
| | | | llvm-svn: 194496
* whitespaceAndrew Trick2013-11-121-5/+5
| | | | llvm-svn: 194495
* Revert "Remove unused variable."Rafael Espindola2013-11-121-0/+1
| | | | | | | | | This reverts commit r194485. The variable is unused in some macro instantiations, but not others. We should probably fix clang to not warn on this. llvm-svn: 194486
* Remove unused variable.Rafael Espindola2013-11-121-1/+0
| | | | llvm-svn: 194485
* R600: Reenable llvm.R600.load.input/interp.input for compatibilityVincent Lejeune2013-11-122-0/+47
| | | | llvm-svn: 194484
* [mips][msa] Enable inlinse assembly for MSA.Daniel Sanders2013-11-123-9/+85
| | | | | | | | | | | | | | Like GCC, this re-uses the 'f' constraint and a new 'w' print-modifier: asm ("ldi.w %w0, 1", "=f"(result)); Unlike GCC, the 'w' print-modifer is not _required_ to produce the intended output. This is a consequence of differences in the internal handling of the registers in each compiler. To be source-compatible between the compilers, users must use the 'w' print-modifier. MSA registers (including control registers) are supported in clobber lists. llvm-svn: 194476
* SimplifyCFG: Use existing constant folding logic when forming switch tables.Benjamin Kramer2013-11-122-34/+26
| | | | | | Both simpler and more powerful than the hand-rolled folding logic. llvm-svn: 194475
* [mips][msa] Fix buildbot failures caused by an unused variable when ↵Daniel Sanders2013-11-121-2/+1
| | | | | | assertions are disabled. llvm-svn: 194472
* [mips][msa] Added support for matching bclr, and bclri from normal IR (i.e. ↵Daniel Sanders2013-11-1211-39/+300
| | | | | | not intrinsics) llvm-svn: 194471
* [ARM] Add support for FP_HP_extension build attributeBradley Smith2013-11-124-7/+31
| | | | llvm-svn: 194470
* [mips][msa] Added support for matching bset, bseti, bneg, and bnegi from ↵Daniel Sanders2013-11-123-70/+464
| | | | | | normal IR (i.e. not intrinsics) llvm-svn: 194469
* [mips][msa] Change constant used in ori tests to avoid conflict with bseti ↵Daniel Sanders2013-11-121-16/+16
| | | | | | | | | | | | (also xori to avoid bnegi) Upcoming commit(s) are going to add support for bseti and bnegi. This would cause some existing tests to (correctly) change behaviour and emit a different instruction. This patch prevents this by changing the constant used in ori and xori tests so that they will not be matchable by the bseti and bnegi patterns when these instructions are matchable from normal IR. llvm-svn: 194467
* XCore target: fix bug in aligning 'byval i8*' on the stackRobert Lytton2013-11-122-1/+16
| | | | llvm-svn: 194466
* XCore target test for hidden declarationRobert Lytton2013-11-121-1/+5
| | | | llvm-svn: 194465
* Add XCore support for ATOMIC_FENCE.Robert Lytton2013-11-124-1/+41
| | | | | | | | | | ATOMIC_FENCE is lowered to a compiler barrier which is codegen only. There is no need to emit an instructions since the XCore provides sequential consistency. Original patch by Richard Osborne llvm-svn: 194464
* XCore target: return error for unsupported alignmentRobert Lytton2013-11-122-0/+13
| | | | llvm-svn: 194463
* Change data structure to memorize computed result in ScalarEvolutionWan Xiaofei2013-11-122-25/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace std::map with SmallVector to memorize the cached result since SCEV usually belongs to little Loop/BB Linear scan on SmallVector is faster than std::map. Code reviewer : Andrew Trick. Test result : Pass Unit Test & LLVM Test Suite 401.bzip2 0.425721 0.419981 101.37% 403.gcc 24.53855 24.2667 101.12% 429.mcf 0.060847 0.059944 101.51% 433.milc 0.646009 0.636119 101.55% 444.namd 1.383928 1.370614 100.97% 445.gobmk 5.836575 5.800225 100.63% 450.soplex 1.911257 1.895963 100.81% 456.hmmer 1.039565 1.032534 100.68% 458.sjeng 0.897401 0.885567 101.34% 464.h264ref 3.645908 3.577991 101.90% 470.lbm 0.049456 0.048398 102.19% 471.omnetpp 5.638575 5.60435 100.61% bitmnp01 0.045738 0.045291 100.99% cjpegv2data 0.304359 0.302833 100.50% idctrn01 0.046433 0.045763 101.46% quake2 4.534416 4.4952 100.87% quake 2.688566 2.659208 101.10% xcsoar 12.42545 12.30385 100.99% linpack 0.038739 0.03803 101.86% matrix01 0.053564 0.0528 101.45% nbench 0.402867 0.395803 101.78% tblook01 0.021265 0.021015 101.19% ttsprk01 0.066384 0.065566 101.25% llvm-svn: 194459
* Correct a glitch in r194424 which may invalidate iterator.Shuxin Yang2013-11-121-1/+3
| | | | llvm-svn: 194457
* Add new FileCheck feature to 3.4 release notesMatt Arsenault2013-11-121-0/+3
| | | | llvm-svn: 194456
* Revert "Added basic unit test for llvm-cov."Yuchen Wu2013-11-127-169/+0
| | | | | | | | | | | This reverts commit r194451. Not sure why the tests are failing on the buildbot. They run fine on my local machine. Could it possibly be because of the endianness of the architectures? The GCNO and GCDA files are little-endian encoded, and llvm-cov expects it to remain that way. Is this a safe assumption? llvm-svn: 194454
* llvm-cov: Added call to update run/program counts.Yuchen Wu2013-11-123-0/+8
| | | | | | Also updated test files that were generated from this change. llvm-svn: 194453
* Added basic unit test for llvm-cov.Yuchen Wu2013-11-127-0/+169
| | | | | | | | | This test compares the output of llvm-cov against a coverage file generated by gcov. Since the source file must be in the current directory when reading GCNO files, the test will first cd into the Inputs directory. llvm-svn: 194451
* R600/SI: Change formatting of printed registers.Matt Arsenault2013-11-1255-282/+343
| | | | | | | | | | | | | | | | | | | | | | | Print the range of registers used with a single letter prefix. This better matches what the shader compiler produces and is overall less obnoxious than concatenating all of the subregister names together. Instead of SGPR0, it will print s0. Instead of SGPR0_SGPR1, it will print s[0:1] and so on. There doesn't appear to be a straightforward way to get the actual register info in the InstPrinter, so this parses the generated name to print with the new syntax. The required test changes are pretty nasty, and register matching regexes are now worse. Since there isn't a way to add to a variable in FileCheck, some of the tests now don't check the exact number of registers used, but I don't think that will be a real problem. llvm-svn: 194443
* Change the default branch instruction to be the 16 bit variety for mips16.Reed Kotler2013-11-124-5/+63
| | | | | | | | | | | This has no material effect at this time since we don't have a direct object emitter for mips16 and the assembler can't tell them apart. I place a comment "16 bit inst" for those so that I can tell them apart in the output. The constant island pass has only been minimally changed to allow this. More complete branch work is forthcoming but this is the first step. llvm-svn: 194442
* Extract a bc attr parsing helper that returns Attribute::None on errorReid Kleckner2013-11-121-78/+49
| | | | | | | The parsing method still returns llvm::error_code for consistency with other parsing methods. Minor cleanup, no functionality change. llvm-svn: 194437
* R600/SI: Add test that fails due to requiring i64 mul for pointersMatt Arsenault2013-11-111-0/+18
| | | | llvm-svn: 194433
* Lower X86::MORESTACK_RET and X86::MORESTACK_RET_RESTORE_R10 inLang Hames2013-11-111-12/+12
| | | | | | | | | | | | | | X86AsmPrinter::EmitInstruction, rather than X86MCInstLower::Lower. The aim is to improve the reusability of the X86MCInstLower class by making it more function-like. The X86::MORESTACK_RET_RESTORE_R10 pseudo broke the function model by emitting an extra instruction to the MCStreamer attached to the AsmPrinter. The patch should have no impact on generated code. llvm-svn: 194431
* Fix the recently added anyregcc convention to handle spilled operands.Andrew Trick2013-11-112-9/+47
| | | | | | | | | | | | Fixes <rdar://15432754> [JS] Assertion: "Folded a def to a non-store!" The primary purpose of anyregcc is to prevent a patchpoint's call arguments and return value from being spilled. They must be available in a register, although the calling convention does not pin the register. It's up to the front end to avoid using this convention for calls with more arguments than allocatable registers. llvm-svn: 194428
* Print new JavaScript calling conventions symbolically.Andrew Trick2013-11-111-0/+2
| | | | llvm-svn: 194427
* R600: Use function inputs to represent data stored in gprVincent Lejeune2013-11-1129-321/+285
| | | | llvm-svn: 194425
* Fix PR17952.Shuxin Yang2013-11-119-28/+396
| | | | | | | | | | | | | | | | | | | | | | | The symptom is that an assertion is triggered. The assertion was added by me to detect the situation when value is propagated from dead blocks. (We can certainly get rid of assertion; it is safe to do so, because propagating value from dead block to alive join node is certainly ok.) The root cause of this bug is : edge-splitting is conducted on the fly, the edge being split could be a dead edge, therefore the block that split the critial edge needs to be flagged "dead" as well. There are 3 ways to fix this bug: 1) Get rid of the assertion as I mentioned eariler 2) When an dead edge is split, flag the inserted block "dead". 3) proactively split the critical edges connecting dead and live blocks when new dead blocks are revealed. This fix go for 3) with additional 2 LOC. Testing case was added by Rafael the other day. llvm-svn: 194424
* [mips] Partially revert r193641. Stack alignment should not be determined byAkira Hatanaka2013-11-112-3/+2
| | | | | | | the floating point register mode. llvm-svn: 194423
* Add support for DT_VERxxx and DT_MIPS_xxx .dynamic section entries to theSimon Atanasyan2013-11-114-0/+62
| | | | | | | | | llvm-readobj. The patch reviewed by Michael Spencer. http://llvm-reviews.chandlerc.com/D2113 llvm-svn: 194421
* Change libLTO back to linking with @executable_path instead of @rpath.Bob Wilson2013-11-111-1/+1
| | | | | | | This partially reverts r187641 until ld64 adopts a change to link with an rpath setting. llvm-svn: 194418
* CalcSpillWeights: allow overidding the spill weight normalizing functionArnaud A. de Grandmaison2013-11-112-6/+16
| | | | | | | | This will enable the PBQP register allocator to provide its own normalizing function. No functionnal change. llvm-svn: 194417
* [ARM] Add support for MVFR2 which is new in ARMv8Artyom Skrobov2013-11-115-0/+19
| | | | llvm-svn: 194416
* Fixing a problem with iterator validity in ↵Andrew Kaylor2013-11-111-2/+12
| | | | | | RuntimeDyldImpl::resolveExternalSymbols llvm-svn: 194415
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