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* enhance the immediate field encoding to know whether the immediateChris Lattner2010-02-123-23/+59
| | | | | | is pc relative or not, mark call and branches as pcrel. llvm-svn: 96026
* Load / store multiple instructions cannot load / store sp. Sorry, can't come ↵Evan Cheng2010-02-121-1/+2
| | | | | | up with a reasonable test case. llvm-svn: 96023
* This should have gone in with 26015, see comments there.Dale Johannesen2010-02-121-0/+12
| | | | llvm-svn: 96020
* Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.Johnny Chen2010-02-121-1/+33
| | | | llvm-svn: 96019
* doxygenize some comments, patch by Peter Collingbourne!Chris Lattner2010-02-123-53/+53
| | | | llvm-svn: 96018
* When save/restoring CR at prolog/epilog, in a largeDale Johannesen2010-02-122-14/+60
| | | | | | | | | | | | | | | | | stack frame, the prolog/epilog code was using the same register for the copy of CR and the address of the save slot. Oops. This is fixed here for Darwin, sort of, by reserving R2 for this case. A better way would be to do the store before the decrement of SP, which is safe on Darwin due to the red zone. SVR4 probably has the same problem, but I don't know how to fix it; there is no red zone and R2 is already used for something else. I'm going to leave it to someone interested in that target. Better still would be to rewrite the CR-saving code completely; spilling each CR subregister individually is horrible code. llvm-svn: 96015
* Add support for a union type in LLVM IR. Patch by Talin!Chris Lattner2010-02-1224-59/+612
| | | | llvm-svn: 96011
* Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.Johnny Chen2010-02-121-0/+21
| | | | llvm-svn: 96010
* Also recognize armv6t2-* and armv5te-* triplets.Evan Cheng2010-02-121-5/+12
| | | | llvm-svn: 96008
* Fix a case of mismatched types in an Add that turned up in 447.dealII.Dan Gohman2010-02-121-0/+2
| | | | llvm-svn: 96007
* Add ARM bitcode file magic.Evan Cheng2010-02-121-3/+32
| | | | llvm-svn: 96006
* Reapply 95979, a compile-time speedup, now that the bug it exposed is fixed.Dan Gohman2010-02-121-1/+1
| | | | llvm-svn: 96005
* Fix this code to avoid dereferencing an end() iterator inDan Gohman2010-02-121-1/+5
| | | | | | offset distributions it doesn't expect. llvm-svn: 96002
* Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.Johnny Chen2010-02-121-0/+44
| | | | llvm-svn: 95999
* Rewrite handling of DBG_VALUE; previous algorithmDale Johannesen2010-02-121-16/+24
| | | | | | | | | | | didn't handle X = Y<dead> = use X DBG_VALUE(X) I was hoping to avoid this approach as it's slower, but I don't think it can be done. llvm-svn: 95996
* 1. modernize the constantmerge pass, using densemap/smallvector.Chris Lattner2010-02-122-29/+46
| | | | | | | | | 2. don't bother trying to merge globals in non-default sections, doing so is quite dubious at best anyway. 3. fix a bug reported by Arnaud de Grandmaison where we'd try to merge two globals in different address spaces. llvm-svn: 95995
* rename testChris Lattner2010-02-121-0/+0
| | | | llvm-svn: 95993
* Revert "Reverse the order for collecting the parts of an addrec. The order", itDaniel Dunbar2010-02-121-1/+1
| | | | | | is breaking llvm-gcc bootstrap. llvm-svn: 95988
* Testcases for recent stdcall / fastcall mangling improvementsAnton Korobeynikov2010-02-122-0/+28
| | | | llvm-svn: 95982
* Setup correct data layout to match gcc's expectations on mingw32.Anton Korobeynikov2010-02-121-1/+1
| | | | llvm-svn: 95981
* Cleanup stdcall / fastcall name mangling.Anton Korobeynikov2010-02-129-154/+64
| | | | | | This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936 llvm-svn: 95980
* Reverse the order for collecting the parts of an addrec. The orderDan Gohman2010-02-121-1/+1
| | | | | | | doesn't matter, except that ScalarEvolution tends to need less time to fold the results this way. llvm-svn: 95979
* Reapply the new LoopStrengthReduction code, with compile time andDan Gohman2010-02-1235-2612/+3446
| | | | | | | | | | bug fixes, and with improved heuristics for analyzing foreign-loop addrecs. This change also flattens IVUsers, eliminating the stride-oriented groupings, which makes it easier to work with. llvm-svn: 95975
* * Updated the cost matrix normalization proceedure to better handle infinite ↵Lang Hames2010-02-122-13/+21
| | | | | | | | | | costs. * Enabled R1/R2 application for nodes with infinite spill costs in the Briggs heuristic (made safe by the changes to the normalization proceedure). * Removed a redundant header. llvm-svn: 95973
* Update test to match 95961.Evan Cheng2010-02-121-1/+1
| | | | llvm-svn: 95971
* Test for 95961.Evan Cheng2010-02-121-2/+1
| | | | llvm-svn: 95962
* add a bunch of mod/rm encoding types for fixed mod/rm bytes.Chris Lattner2010-02-126-2/+64
| | | | | | | This will work better for the disassembler for modeling things like lfence/monitor/vmcall etc. llvm-svn: 95960
* Test case for 95958.Evan Cheng2010-02-121-0/+18
| | | | llvm-svn: 95959
* revert r95949, it turns out that adding new prefixes is not a Chris Lattner2010-02-122-10/+10
| | | | | | great solution for the disassembler, we'll go with "plan b". llvm-svn: 95957
* MC: Fix bug where trailing tied operands were forgotten; the X86 assemblerDaniel Dunbar2010-02-121-19/+43
| | | | | | | | | matcher is now free of implicit operands! - Still need to clean up the code now that we don't to worry about implicit operands, and to make it a hard error if an instruction fails to specify all of its operands for some reason. llvm-svn: 95956
* Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,Johnny Chen2010-02-121-0/+84
| | | | | | MRRC, MRRc2. For disassembly only. llvm-svn: 95955
* Add a new pass on machine instructions to optimize away PHI cycles that Bob Wilson2010-02-125-0/+181
| | | | | | | | | | | reduce down to a single value. InstCombine already does this transformation but DAG legalization may introduce new opportunities. This has turned out to be important for ARM where 64-bit values are split up during type legalization: InstCombine is not able to remove the PHI cycles on the 64-bit values but the separate 32-bit values can be optimized. I measured the compile time impact of this (running llc on 176.gcc) and it was not significant. llvm-svn: 95951
* X86: Fix definition for RCL/RCR.*m? operations -- they were getting representedDaniel Dunbar2010-02-122-58/+63
| | | | | | with "tied memory operands", which is wrong. llvm-svn: 95950
* add another bit of space for new kinds of instruction prefixes.Chris Lattner2010-02-122-10/+10
| | | | llvm-svn: 95949
* Add a missing pattern for movhps so that we get:Nate Begeman2010-02-121-0/+3
| | | | | | | | | | | | | | | movq (%ecx,%edx,2), %xmm2 movhps (%ecx,%eax,2), %xmm2 rather than: movq (%eax, %edx, 2), %xmm2 movq (%eax, %ebx, 2), %xmm3 movlhps %xmm3, %xmm2 Testcase forthcoming. llvm-svn: 95948
* fix the encodings of monitor and mwait, which were completelyChris Lattner2010-02-122-7/+16
| | | | | | | busted in both encoders. I'm not bothering to fix it in the old one at this point. llvm-svn: 95947
* improve support for minix, PR6280, patch byChris Lattner2010-02-122-2/+11
| | | | | | Kees van Reeuwijk! llvm-svn: 95946
* Add a new function attribute, 'alignstack'. It will indicate (when the backendsCharles Davis2010-02-126-1/+71
| | | | | | | implement support for it) that the stack should be forcibly realigned in the prologue (and the process reversed in the epilogue). llvm-svn: 95945
* Reapply coalescer fix for better cross-class coalescing.Jakob Stoklund Olesen2010-02-117-10/+8
| | | | | | This time with fixed test cases. llvm-svn: 95938
* enhance llvm-mc -show-inst to print the enum of an instruction, like so:Chris Lattner2010-02-116-2/+59
| | | | | | | | | | testb %al, %al ## <MCInst #2412 TEST8rr ## <MCOperand Reg:2> ## <MCOperand Reg:2>> jne LBB1_7 ## <MCInst #938 JNE_1 ## <MCOperand Expr:(LBB1_7)>> llvm-svn: 95935
* add a new MCInstPrinter::getOpcodeName interface, when it is Chris Lattner2010-02-114-5/+22
| | | | | | | implemented, llvm-mc --show-inst now uses it to print the instruction opcode as well as the number. llvm-svn: 95929
* Document binutils requirements for coff targets (cygwin / mingw32).Anton Korobeynikov2010-02-111-8/+4
| | | | llvm-svn: 95928
* improve encoding information for branches. We now know they haveChris Lattner2010-02-111-15/+14
| | | | | | | 8 or 32-bit immediates, which allows the new encoder to handle them. llvm-svn: 95927
* MC: Move assembler-backend's fixup list into the fragment.Daniel Dunbar2010-02-112-85/+74
| | | | llvm-svn: 95926
* MC: Move MCSectionData::Fixup out to MCAsmFixup.Daniel Dunbar2010-02-112-40/+42
| | | | llvm-svn: 95925
* make getFixupKindInfo return a const reference, allowingChris Lattner2010-02-114-7/+22
| | | | | | | the tables to be const. Teach MCCodeEmitter to handle the target-indep kinds so that we don't crash on them. llvm-svn: 95924
* Revert functional change. This broke a bunch of tests.Jakob Stoklund Olesen2010-02-111-1/+1
| | | | llvm-svn: 95921
* switch to target-indep fixups for 1/2/4/8 byte data.Chris Lattner2010-02-111-14/+9
| | | | llvm-svn: 95920
* revert 95903.Devang Patel2010-02-111-4/+1
| | | | llvm-svn: 95918
* It is always good to do a cross-class join when the large register has a ↵Jakob Stoklund Olesen2010-02-111-6/+11
| | | | | | | | tiny interval. Also avoid division by zero. llvm-svn: 95917
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