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* Fix typo in an error string. NFC.George Burgess IV2016-01-201-1/+1
| | | | llvm-svn: 258357
* Fix PR26152.Evgeniy Stepanov2016-01-203-1/+32
| | | | | | | | Fix the condition for when the new global takes over the name of the existing one to be the negation of the condition for the new global to get internal linkage. llvm-svn: 258355
* Fix build warning.Evgeniy Stepanov2016-01-201-1/+2
| | | | | | | error: field 'CCMgr' will be initialized after field 'IndirectStubsMgr' [-Werror,-Wreorder] : DL(TM.createDataLayout()), CCMgr(std::move(CCMgr)), llvm-svn: 258354
* AMDGPU/SI: Promote i1 SETCC operationsTom Stellard2016-01-202-0/+21
| | | | | | | | | | | | | | Summary: While working on uniform branching, I've hit a few cases where we emit i1 SETCC operations. Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16233 llvm-svn: 258352
* AMDGPU: Fix old comments that mention AMDILMatt Arsenault2016-01-203-4/+4
| | | | llvm-svn: 258350
* AMDGPU: Remove AMDGPU.trunc intrinsicMatt Arsenault2016-01-203-20/+0
| | | | llvm-svn: 258348
* AMDGPU: Remove AMDIL.fraction intrinsicMatt Arsenault2016-01-205-23/+4
| | | | llvm-svn: 258347
* AMDGPU: Remove AMDIL.round.nearest intrinsicMatt Arsenault2016-01-203-15/+0
| | | | llvm-svn: 258346
* [GlobalISel] Add the proper cmake plumbing.Quentin Colombet2016-01-209-1/+239
| | | | | | | | | | | | | This patch adds the necessary plumbing to cmake to build the sources related to GlobalISel. To build the sources related to GlobalISel, we need to add -DBUILD_GLOBAL_ISEL=ON. By default, this is OFF, thus GlobalISel sources will not impact people that do not explicitly opt-in. Differential Revision: http://reviews.llvm.org/D15983 llvm-svn: 258344
* AMDGPU: Remove abs intrinsicMatt Arsenault2016-01-204-63/+0
| | | | llvm-svn: 258343
* AMDGPU: Remove min/max intrinsicsMatt Arsenault2016-01-207-211/+2
| | | | | | This removes support for mesa 11.0.x llvm-svn: 258342
* Add a "gc-transition" operand bundleSanjoy Das2016-01-208-10/+58
| | | | | | | | | | | | | | | | | | | Summary: This adds a new kind of operand bundle to LLVM denoted by the `"gc-transition"` tag. Inputs to `"gc-transition"` operand bundle are lowered into the "transition args" section of `gc.statepoint` by `RewriteStatepointsForGC`. This removes the last bit of functionality that was unsupported in the deopt bundle based code path in `RewriteStatepointsForGC`. Reviewers: pgavlin, JosephTremoulet, reames Subscribers: sanjoy, mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D16342 llvm-svn: 258338
* [llvm-readobj][ELF] Teach llvm-readobj to show arch specific ELF section's flagsSimon Atanasyan2016-01-204-3/+157
| | | | | | | | | | | | | | Some architecture specific ELF section flags might have the same value (for example SHF_X86_64_LARGE and SHF_HEX_GPREL) and we have to check machine architectures to select an appropriate set of possible flags. The patch selects architecture specific flags into separate arrays `ElfxxxSectionFlags` and combines `ElfSectionFlags` and `ElfxxxSectionFlags` before pass to the `StreamWriter::printFlags()` method. Differential Revision: http://reviews.llvm.org/D16269 llvm-svn: 258334
* [GlobalISel] Add a generic machine opcode for ADD.Quentin Colombet2016-01-206-7/+41
| | | | | | | | | | | The selection process being split into separate passes, we need generic opcodes to translate the LLVM IR to target independent code. This patch adds an opcode for addition: G_ADD. Differential Revision: http://reviews.llvm.org/D15472 llvm-svn: 258333
* fix typo; NFCSanjay Patel2016-01-201-1/+1
| | | | llvm-svn: 258332
* fix formatting; NFCSanjay Patel2016-01-201-3/+3
| | | | llvm-svn: 258330
* Accept subtractions involving a weak symbol.Rafael Espindola2016-01-204-12/+6
| | | | | | | | | | | | | | | | | | When a symbol S shows up in an expression in assembly there are two possible interpretations * The expression is referring to the value of S in this file. * The expression is referring to the value after symbol resolution. In the first case the assembler can reason about the value and try to produce a relocation. In the second case, that is only possible if the symbol cannot be preempted. Assemblers are not very consistent about which interpretation gets used. This changes MC to agree with GAS in the case of an expression of the form "Sym - WeakSym". llvm-svn: 258329
* [LibCallSimplifier] don't get fooled by a fake sqrt()Sanjay Patel2016-01-202-4/+23
| | | | | | | | | | | | | | | | | | | | | | The test case will crash without this patch because the subsequent call to hasUnsafeAlgebra() assumes that the call instruction is an FPMathOperator (ie, returns an FP type). This part of the function signature check was omitted for the sqrt() case, but seems to be in place for all other transforms. Before: http://reviews.llvm.org/rL257400 ...we would have needlessly continued execution in optimizeSqrt(), but the bug was harmless because we'd eventually fail some other check and return without damage. This should fix: https://llvm.org/bugs/show_bug.cgi?id=26211 Differential Revision: http://reviews.llvm.org/D16198 llvm-svn: 258325
* [Orc] Fix a use-after-move bug in the Orc C-bindings stack.Lang Hames2016-01-201-3/+3
| | | | llvm-svn: 258324
* 80-cols; NFCSanjay Patel2016-01-201-2/+2
| | | | llvm-svn: 258323
* Write AArch64 big endian data fixup entries as BE.Keith Walker2016-01-202-35/+70
| | | | | | | | | | | | | | There was support for writing the AArch64 big endian data fixup entries in the .eh_frame section in BE. This is changed to write all such fixup entries in BE with no restriction on the section. This is similar to the existing support for fixup entries for ARM. A test is added to check the length field in the .debug_line section as this is an example of where such a fixup occurs. Differential Revision: http://reviews.llvm.org/D16064 llvm-svn: 258320
* Correctly initialize SIAnnotateControlFlowTom Stellard2016-01-203-2/+11
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D16304 llvm-svn: 258319
* [AVX512] Adding VPERMB Intrinsics Michael Zuckerman2016-01-204-6/+72
| | | | | | Differential Revision: http://reviews.llvm.org/D16296 llvm-svn: 258316
* Fixing bug in rL258132: [X86] Adding support for missing variations of X86 ↵Marina Yatsina2016-01-201-2/+6
| | | | | | | | | | string related instructions There was a bug in my rL258132 because there's an overloading of the "movsd" and "cmpsd" instructions, e.g. movsd can be either "Move Data from String to String" (the case I wanted to handle) or "Move or Merge Scalar Double-Precision Floating-Point Value" (the case that causes the asserts). Added code for escaping the unfamiliar scenarios and falling back to old behviour. Also changed the asserts to llvm_unreachable. llvm-svn: 258312
* Proper handling of diamond-like cases in if-conversionKrzysztof Parzyszek2016-01-202-15/+95
| | | | | | | | | | | If converter was somewhat careless about "diamond" cases, where there was no join block, or in other words, where the true/false blocks did not have analyzable branches. In such cases, it was possible for it to remove (needed) branches, resulting in a loss of entire basic blocks. Differential Revision: http://reviews.llvm.org/D16156 llvm-svn: 258310
* AVX512: Store (MOVNTPD, MOVNTPS, MOVNTDQ) using non-temporal hint intrinsic ↵Igor Breger2016-01-205-38/+80
| | | | | | | | implementation. Differential Revision: http://reviews.llvm.org/D16350 llvm-svn: 258309
* [AArch64] Fix two bugs in the .inst directiveOliver Stannard2016-01-202-3/+26
| | | | | | | | | | | | | | The AArch64 .inst directive was implemented using EmitIntValue, which resulted in both $x and $d (code and data) mapping symbols being emitted at the same address. This fixes it to only emit the $x mapping symbol. EmitIntValue also emits the value in big-endian order when targeting big-endian systems, but instructions are always emitted in little-endian order for AArch64. Differential Revision: http://reviews.llvm.org/D16349 llvm-svn: 258308
* [AVR] Defnined calling conventions. NFC.Dylan McKay2016-01-201-0/+10
| | | | llvm-svn: 258300
* [LTO] Fix error reporting when a file passed to libLTO is invalid or ↵Petr Pavlu2016-01-203-6/+9
| | | | | | | | | | | | | | | | | | non-existent This addresses PR26060 where function lto_module_create() could return nullptr but lto_get_error_message() returned an empty string. The error() call after LTOModule::createFromFile() in llvm-lto is then removed because any error from this function should go through the diagnostic handler in llvm-lto which will exit the program. The error() call was added because this previously did not happen when the file was non-existent. This is fixed by the patch. (The situation that llvm-lto reports an error when the input file does not exist is tested by llvm/tools/llvm-lto/error.ll). Differential Revision: http://reviews.llvm.org/D16106 llvm-svn: 258298
* [Verifier] Fix performance regression for LTO buildsIvan Krasin2016-01-201-6/+7
| | | | | | | | | | | | | | | | | | Summary: Fix a significant performance regression by introducing GlobalValueVisited field and reusing the map. This is a follow up to r257823 that slowed down linking Chrome with LTO by 2.5x. If you revert this commit, please, also revert r257823. BUG=https://llvm.org/bugs/show_bug.cgi?id=26214 Reviewers: pcc, loladiro, joker.eph Subscribers: krasin1, joker.eph, loladiro, pcc Differential Revision: http://reviews.llvm.org/D16338 llvm-svn: 258297
* [SelectionDAG] Fold more offsets into GlobalAddressesDan Gohman2016-01-206-84/+809
| | | | | | | | | | | | | | | | | | SelectionDAG previously missed opportunities to fold constants into GlobalAddresses in several areas. For example, given `(add (add GA, c1), y)`, it would often reassociate to `(add (add GA, y), c1)`, missing the opportunity to create `(add GA+c, y)`. This isn't often visible on targets such as X86 which effectively reassociate adds in their complex address-mode folding logic, however it is currently visible on WebAssembly since it currently has very simple address mode folding code that doesn't reassociate anything. This patch fixes this by making SelectionDAG fold offsets into GlobalAddresses at the same times that it folds constants together, so that it doesn't miss any opportunities to perform such folding. Differential Revision: http://reviews.llvm.org/D16090 llvm-svn: 258296
* [WebAssembly] Tighten up some regexes in some tests.Dan Gohman2016-01-204-80/+80
| | | | llvm-svn: 258295
* [WebAssembly] Minor code cleanups. NFC.Dan Gohman2016-01-206-12/+13
| | | | llvm-svn: 258294
* [WebAssembly] Remove the Relooper code, as it is not currently being used.Dan Gohman2016-01-204-1173/+0
| | | | llvm-svn: 258293
* [Orc] 'this' qualify more lambda-captured members.Lang Hames2016-01-201-4/+4
| | | | | | More workaround attempts for GCC ICEs. llvm-svn: 258288
* [Orc] More qualifications of lambda-captured member variables to fix GCC ICEs.Lang Hames2016-01-201-3/+3
| | | | llvm-svn: 258286
* [WebAssembly] Don't stackify stores across instructions with side effects.Dan Gohman2016-01-203-13/+37
| | | | llvm-svn: 258285
* tools/llvm-config: improve shared library supportAndrew Wilkins2016-01-206-66/+131
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a re-commit of r257003, which was reverted, along with the fixes from http://reviews.llvm.org/D15986. r252532 added support for reporting the monolithic library when LLVM_BUILD_LLVM_DYLIB is used. This would only be done if the individual components were not found, and the dynamic library is found. This diff extends this as follows: - If LLVM_LINK_LLVM_DYLIB is set, then prefer the shared library, even if all component libraries exist. - Two flags, --link-shared and --link-static are introduced to provide explicit guidance. If --link-shared is passed and the shared library does not exist, an error results. Additionally, changed the expected shared library names from (e.g.) LLVM-3.8.0 to LLVM-3.8. The former exists only in an installation (and then only in CMake builds I think?), and not in the build tree; this breaks usage of llvm-config during builds, e.g. by llvm-go. Reviewers: DiamondLovesYou, beanz Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D15986 llvm-svn: 258283
* [Orc] Qualify captured variable to work around GCC ICE.Lang Hames2016-01-201-1/+1
| | | | llvm-svn: 258278
* Fix a bug in testXinliang David Li2016-01-201-2/+2
| | | | llvm-svn: 258276
* [Inliner/WinEH] Honor implicit nounwindsJoseph Tremoulet2016-01-202-17/+769
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Funclet EH tables require that a given funclet have only one unwind destination for exceptional exits. The verifier will therefore reject e.g. two cleanuprets with different unwind dests for the same cleanup, or two invokes exiting the same funclet but to different unwind dests. Because catchswitch has no 'nounwind' variant, and because IR producers are not *required* to annotate calls which will not unwind as 'nounwind', it is legal to nest a call or an "unwind to caller" catchswitch within a funclet pad that has an unwind destination other than caller; it is undefined behavior for such a call or catchswitch to unwind. Normally when inlining an invoke, calls in the inlined sequence are rewritten to invokes that unwind to the callsite invoke's unwind destination, and "unwind to caller" catchswitches in the inlined sequence are rewritten to unwind to the callsite invoke's unwind destination. However, if such a call or "unwind to caller" catchswitch is located in a callee funclet that has another exceptional exit with an unwind destination within the callee, applying the normal transformation would give that callee funclet multiple unwind destinations for its exceptional exits. There would be no way for EH table generation to determine which is the "true" exit, and the verifier would reject the function accordingly. Add logic to the inliner to detect these cases and leave such calls and "unwind to caller" catchswitches as calls and "unwind to caller" catchswitches in the inlined sequence. This fixes PR26147. Reviewers: rnk, andrew.w.kaylor, majnemer Subscribers: alexcrichton, llvm-commits Differential Revision: http://reviews.llvm.org/D16319 llvm-svn: 258273
* [PGO] Add a new interface to be used by Indirect Call PromotionXinliang David Li2016-01-203-0/+47
| | | | llvm-svn: 258271
* [NFC] Replace several manual GEP loops with gep_type_iterator.Eduard Burtescu2016-01-203-47/+22
| | | | | | | | | | Reviewers: dblaikie Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D16335 llvm-svn: 258262
* Function name change /NFCXinliang David Li2016-01-202-3/+5
| | | | llvm-svn: 258260
* MachineScheduler: Allow independent scheduling of sub register defsMatthias Braun2016-01-206-61/+226
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Note that this is disabled by default and still requires a patch to handleMove() which is not upstreamed yet. If the TrackLaneMasks policy/strategy is enabled the MachineScheduler will build a schedule graph where definitions of independent subregisters are no longer serialised. Implementation comments: - Without lane mask tracking a sub register def also counts as a use (except for the first one with the read-undef flag set), with lane mask tracking enabled this is no longer the case. - Pressure Diffs where previously maintained per definition of a vreg with the help of the SSA information contained in the LiveIntervals. With lanemask tracking enabled we cannot do this anymore and instead change the pressure diffs for all uses of the vreg as it becomes live/dead. For this changed style to work correctly we ignore uses of instructions that define the same register again: They won't affect register pressure. - With lanemask tracking we remove all read-undef flags from sub register defs when building the graph and re-add them later when all vreg lanes have become dead. Differential Revision: http://reviews.llvm.org/D14969 llvm-svn: 258259
* RegisterPressure: Make liveness tracking subregister awareMatthias Braun2016-01-207-219/+540
| | | | | | Differential Revision: http://reviews.llvm.org/D14968 llvm-svn: 258258
* LiveInterval: Add utility class to rename independent subregister usageMatthias Braun2016-01-204-0/+273
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This renaming is necessary to avoid a subregister aware scheduler accidentally creating liveness "holes" which are rejected by the MachineVerifier. Explanation as found in this patch: Helper class that can divide MachineOperands of a virtual register into equivalence classes of connected components. MachineOperands belong to the same equivalence class when they are part of the same SubRange segment or adjacent segments (adjacent in control flow); Different subranges affected by the same MachineOperand belong to the same equivalence class. Example: vreg0:sub0 = ... vreg0:sub1 = ... vreg0:sub2 = ... ... xxx = op vreg0:sub1 vreg0:sub1 = ... store vreg0:sub0_sub1 The example contains 3 different equivalence classes: - One for the (dead) vreg0:sub2 definition - One containing the first vreg0:sub1 definition and its use, but not the second definition! - The remaining class contains all other operands involving vreg0. We provide a utility function here to rename disjunct classes to different virtual registers. Differential Revision: http://reviews.llvm.org/D16126 llvm-svn: 258257
* AMDGPU/SI: Prevent the DAGCombiner from creating setcc with i1 inputsTom Stellard2016-01-205-2/+81
| | | | | | | | | | Reviewers: arsenm Subscribers: arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15035 llvm-svn: 258256
* [MachineSink] Don't break ImplicitNullsSanjoy Das2016-01-202-0/+98
| | | | | | | | | | | | | | | Summary: This teaches MachineSink to not sink instructions that might break the implicit null check optimization that runs later. This should not affect frontends that do not use implicit null checks. Reviewers: aadg, reames, hfinkel, atrick Subscribers: majnemer, llvm-commits Differential Revision: http://reviews.llvm.org/D14632 llvm-svn: 258254
* Reinstate the second part of a comment. NFC.Davide Italiano2016-01-191-0/+1
| | | | | | | Reported by: Filipe Cabecinhas Pointy-hat to: me llvm-svn: 258223
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