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* Separate x86 opcode maps and 0x66/0xf2/0xf3 prefixes from each other in the ↵Craig Topper2014-01-316-411/+288
| | | | | | TSFlags. This greatly simplifies the switch statements in the disassembler tables and the code emitters. llvm-svn: 200522
* Move REP out of the Prefix field of the X86 format. Give it its own bit. It ↵Craig Topper2014-01-316-38/+39
| | | | | | had special handling anyway and this enables a future patch. llvm-svn: 200520
* Move address override handling in X86CodeEmitter to a place where it works ↵Craig Topper2014-01-311-28/+28
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. llvm-svn: 200517
* Move address override handling in X86MCCodeEmitter to a place where it works ↵Craig Topper2014-01-313-47/+50
| | | | | | for VEX encoded instructions too. This allows 32-bit addressing to work in 64-bit mode. llvm-svn: 200516
* Fix a bug in gcov instrumentation introduced by r195513. <rdar://15930350>Bob Wilson2014-01-311-1/+8
| | | | | | | | | | The entry block of a function starts with all the static allocas. The change in r195513 splits the block before those allocas, which has the effect of turning them into dynamic allocas. That breaks all sorts of things. Change to split after the initial allocas, and also add a comment explaining why the block is split. llvm-svn: 200515
* [Sparc] Save and restore float registers that may be used for parameter passing.Venkatraman Govindaraju2014-01-311-2/+44
| | | | llvm-svn: 200509
* This patch teaches the DAGCombiner how to fold insert_subvector nodesManman Ren2014-01-312-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | when the input is a concat_vectors and the insert replaces one of the concat halves: Lower half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors Z, Y) Upper half: fold (insert_subvector (concat_vectors X, Y), Z) -> (concat_vectors X, Z) This can be seen with the following IR: define <8 x float> @lower_half(<4 x float> %v1, <4 x float> %v2, <4 x float> %v3) { %1 = shufflevector <4 x float> %v1, <4 x float> %v2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> %2 = tail call <8 x float> @llvm.x86.avx.vinsertf128.ps.256(<8 x float> %1, <4 x float> %v3, i8 0) The vinsertf128 intrinsic is converted into an insert_subvector node in SelectionDAGBuilder.cpp. Using AVX, without the patch this generates two vinsertf128 instructions: vinsertf128 $1, %xmm1, %ymm0, %ymm0 vinsertf128 $0, %xmm2, %ymm0, %ymm0 With the patch this is optimized into: vinsertf128 $1, %xmm1, %ymm2, %ymm0 Patch by Robert Lougher. llvm-svn: 200506
* DAGCombine should not produce ISD::OR nodes after operation legalization if ↵Owen Anderson2014-01-311-2/+4
| | | | | | they're not legal. llvm-svn: 200503
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-314-13/+100
| | | | | | | | | | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. The previous attempt at r200431 was reverted at r200434 because of two testing case failures. I modified my patch a little, but forgot to re-run "make check-all". Testing case CodeGen/ARM/lsr-unfolded-offset.ll is updated because of the patch's impact on branch probability which causes changes in spill placement. llvm-svn: 200502
* Allow speculating llvm.sqrt, fma and fmuladdMatt Arsenault2014-01-313-2/+67
| | | | | | | | This doesn't set errno, so this should be OK. Also update the documentation to explicitly state that errno are not set. llvm-svn: 200501
* Add a link to a bug to a couple of FIXMEsTimur Iskhodzhanov2014-01-301-1/+2
| | | | llvm-svn: 200500
* [CMake] llvm_update_compile_flags: Honor LLVM_COMPILE_FLAGS.NAKAMURA Takumi2014-01-301-5/+10
| | | | | | I accidentally mis-dropped LLVM_COMPILE_FLAGS in r200301. Sorry for that. llvm-svn: 200499
* HandleLLVMOptions.cmake: Typo in comment.NAKAMURA Takumi2014-01-301-1/+1
| | | | llvm-svn: 200498
* [x86] Fix signed relocations for i64i32imm operandsDavid Woodhouse2014-01-306-55/+100
| | | | | | | | | These should end up (in ELF) as R_X86_64_32S relocs, not R_X86_64_32. Kill the horrid and incomplete special case and FIXME in EncodeInstruction() and set things up so it can infer the signedness from the ImmType just like it can the size and whether it's PC-relative. llvm-svn: 200495
* This file already has a "using namespace object;", use it.Rafael Espindola2014-01-301-22/+20
| | | | llvm-svn: 200493
* [AArch64] Custom lower concat_vector patterns with v4i16, v4i32, v8i8, ↵Chad Rosier2014-01-303-0/+153
| | | | | | v8i16, v16i8 types. llvm-svn: 200491
* Fix PR18381 - print a minimal diagnostic rather than assert on unresolved ↵Timur Iskhodzhanov2014-01-303-0/+17
| | | | | | .secidx target llvm-svn: 200490
* Only ELF has a dynamic symbol table. Remove it from ObjectFile.Rafael Espindola2014-01-308-34/+41
| | | | | | | | | COFF has only one symbol table. MachO has a LC_DYSYMTAB, but that is not a symbol table, just extra info about the one symbol table (LC_SYMTAB). IR (coming soon) also has only one table. llvm-svn: 200488
* This has been fixed.Rafael Espindola2014-01-301-3/+0
| | | | llvm-svn: 200487
* Use early returns and factor the object::Binary creation.Rafael Espindola2014-01-301-69/+59
| | | | llvm-svn: 200484
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-306-26/+112
| | | | | | | | | | stackmap/patchpoint intrinsic. Re-applying the patch, but this time without using AsmPrinter methods. Reviewed by Andy llvm-svn: 200481
* Comment out unused macro because of warningRenato Golin2014-01-301-0/+3
| | | | | | | | Modern compilers (Clang 3.4, GCC 4.8) warn on variadic macros being introduced in C99, which produces a huge number of useless diagnostics since this macro is unused in the whole project. llvm-svn: 200479
* Explicitly specify the CPU to avoid Atom-specific assembly mismatchTimur Iskhodzhanov2014-01-304-16/+16
| | | | llvm-svn: 200473
* Reenable ARM EHABI on Android.Evgeniy Stepanov2014-01-302-1/+18
| | | | | | Broken in r200388. llvm-svn: 200466
* [mips] Fix typo.Matheus Almeida2014-01-301-1/+1
| | | | llvm-svn: 200465
* Remove duplicate patternsCraig Topper2014-01-301-5/+0
| | | | llvm-svn: 200461
* Couple minor formatting fixes to the XXXGenDAGISel.inc files.Craig Topper2014-01-301-2/+1
| | | | llvm-svn: 200459
* Remove some AddedComplexity tags that were forcing priority for AVX over ↵Craig Topper2014-01-301-36/+36
| | | | | | SSE. Use predicates instead. llvm-svn: 200458
* tools: fix Twine abuseSaleem Abdulrasool2014-01-301-10/+10
| | | | | | | utohexstr provides a temporary string, making it unsafe to use with the Twine interface which will not copy the string. Switch to using std::string. llvm-svn: 200457
* tools: remove unnecessary typenameSaleem Abdulrasool2014-01-301-2/+2
| | | | | | | This is acceptted by clang and gcc, but MSVC seems to balk at it. As it is unneeded, simply drop it. Fixes MSVC buildbots. llvm-svn: 200456
* Remove duplicate pattern and add predicate checks on other patterns.Craig Topper2014-01-301-1/+2
| | | | llvm-svn: 200455
* tools: repair Windows buildSaleem Abdulrasool2014-01-301-2/+2
| | | | | | | | | exp2 is not available on Windows. Fortunately, we are calculating powers of 2 with expontents within the range of [4,12]. Simply use an equivalent bitshift operation to repair compilation with MSVC which does not provide this standard function. llvm-svn: 200454
* Implement SPARCv9 atomic_swap_64 with a pseudo.Jakob Stoklund Olesen2014-01-303-3/+24
| | | | | | | | The SWAP instruction only exists in a 32-bit variant, but the 64-bit atomic swap can be implemented in terms of CASX, like the other atomic rmw primitives. llvm-svn: 200453
* ARM IAS: support .object_archSaleem Abdulrasool2014-01-307-3/+138
| | | | | | | | | | The .object_arch directive indicates an alternative architecture to be specified in the object file. The directive does *not* effect the enabled feature bits for the object file generation. This is particularly useful when the code performs runtime detection and would like to indicate a lower architecture as the requirements than the actual instructions used. llvm-svn: 200451
* tools: add support for decoding ARM attributesSaleem Abdulrasool2014-01-309-0/+1121
| | | | | | | | Enhance the ARM specific parsing support in llvm-readobj to support attributes. This allows for simpler tests to validate encoding of the build attributes as specified in the ARM ELF specification. llvm-svn: 200450
* ARM IAS: support .movspSaleem Abdulrasool2014-01-306-6/+249
| | | | | | | | .movsp is an ARM unwinding directive that indicates to the unwinder that a register contains an offset from the current stack pointer. If the offset is unspecified, it defaults to zero. llvm-svn: 200449
* ARM: suuport .tlsdescseq directiveSaleem Abdulrasool2014-01-308-0/+122
| | | | | | | | | | | This enhances the ARMAsmParser to handle .tlsdescseq directives. This is a slightly special relocation. We must be able to generate them, but not consume them in assembly. The relocation is meant to assist the linker in generating a TLS descriptor sequence. The ELF target streamer is enhanced to append additional fixups into the current segment and that is used to emit the new R_ARM_TLS_DESCSEQ relocations. llvm-svn: 200448
* ARM: support TLS descriptor relocationsSaleem Abdulrasool2014-01-304-0/+13
| | | | | | | | Add support for tlsdesc relocations which are part of the ABI, marked as experimental. These relocations permit the linker to perform TLS reference optimizations. llvm-svn: 200447
* ARM: support tlscall relocationsSaleem Abdulrasool2014-01-305-1/+31
| | | | | | | | | | | | | | This adds support for TLS CALL relocations. TLS CALL relocations are used to indicate to the linker to generate appropriate entries to resolve TLS references via an appropriate function invocation (e.g. __tls_get_addr(PLT)). In order to accomodate the linker relaxation of the TLS access model for the references (GD/LD -> IE, IE -> LE), the relocation addend must be incomplete. This requires that the partial inplace value is also incomplete (i.e. 0). We simply avoid the offset value calculation at the time of the fixup adjustment in the ARM assembler backend. llvm-svn: 200446
* Revert "[Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-306-112/+26
| | | | | | | | stackmap/patchpoint intrinsic." This reverts commit r200444 to unbreak buildbots. llvm-svn: 200445
* [Stackmaps] Record the stack size of each function that contains a ↵Juergen Ributzka2014-01-306-26/+112
| | | | | | | | stackmap/patchpoint intrinsic. Reviewed by Andy llvm-svn: 200444
* Simplify the handling of iterators in ObjectFile.Rafael Espindola2014-01-3025-365/+147
| | | | | | | | | | | | None of the object file formats reported error on iterator increment. In retrospect, that is not too surprising: no object format stores symbols or sections in a linked list or other structure that requires chasing pointers. As a consequence, all error checking can be done on begin() and end(). This reduces the text segment of bin/llvm-readobj in my machine from 521233 to 518526 bytes. llvm-svn: 200442
* Extend the preserve_most/all calling convention description in LangRef about theJuergen Ributzka2014-01-301-2/+7
| | | | | | fact that the argument registers will be preserved too. llvm-svn: 200441
* Reland r200340 - 'Add line table debug info to COFF files when using a win32 ↵Timur Iskhodzhanov2014-01-3040-59/+1577
| | | | | | | | triple' This incorporates a couple of fixes reviewed at http://llvm-reviews.chandlerc.com/D2651 llvm-svn: 200440
* add a bunch of LLVM_OVERRIDE before I start refactoring these.Rafael Espindola2014-01-303-177/+227
| | | | llvm-svn: 200439
* Remove dead code.Rafael Espindola2014-01-301-1/+0
| | | | llvm-svn: 200436
* Revert r200431 due to bot failures.Manman Ren2014-01-303-99/+12
| | | | llvm-svn: 200434
* Fix TLS handling in ELF's getAddress and llvm-nm to print 'D' for it.Rafael Espindola2014-01-303-2/+4
| | | | llvm-svn: 200433
* PGO branch weight: update edge weights in SelectionDAGBuilder.Manman Ren2014-01-303-12/+99
| | | | | | | | When converting from "or + br" to two branches, or converting from "and + br" to two branches, we correctly update the edge weights of the two branches. llvm-svn: 200431
* PGO branch weight: update edge weights in IfConverter.Manman Ren2014-01-295-1/+101
| | | | | | | | | | | | | This commit only handles IfConvertTriangle. To update edge weights of a successor, one interface is added to MachineBasicBlock: /// Set successor weight of a given iterator. setSuccWeight(succ_iterator I, uint32_t weight) An existing testing case test/CodeGen/Thumb2/v8_IT_5.ll is updated, since we now correctly update the edge weights, the cold block is placed at the end of the function and we jump to the cold block. llvm-svn: 200428
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