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* R600/SI: Fix select on i1Matt Arsenault2014-07-155-8/+51
| | | | llvm-svn: 213096
* Try out FileCheck's new (in r212810) -implicit-check-not in a DebugInfo test.David Blaikie2014-07-151-9/+1
| | | | | | | | | | | | Just tried this on a few tests and this was the only one that was easily ported to use the new feature, so we'll go with that for now. Hopefully can act as inspiration/reminder for other tests. Not all debug info tests need to check for every DW_TAG or NULL child terminator, but perhaps they should (just to ensure they don't accidentally end up with tags nested inside other tags without the test failing, for example) llvm-svn: 213092
* CMake: fix cross-compilation with external source directoriesAlp Toker2014-07-151-1/+11
| | | | | | | | This adds support for building native artifacts when cross-compiling using the popular side-by-side source directory layout (no symlinks, no nested repositories). llvm-svn: 213091
* ADT: Add MapVector::remove_ifDuncan P. N. Exon Smith2014-07-153-2/+53
| | | | | | | Add a `MapVector::remove_if()` that erases items in bulk in linear time, as opposed to quadratic time for repeated calls to `MapVector::erase()`. llvm-svn: 213090
* R600/SI: Implement less wrong f32 fdivMatt Arsenault2014-07-156-42/+148
| | | | | | | Assuming single precision denormals and accurate sqrt/div are not reported, this passes the OpenCL conformance test. llvm-svn: 213089
* R600: Add predicate for UnsafeFPMathMatt Arsenault2014-07-151-0/+1
| | | | llvm-svn: 213088
* R600: Remove intrinsics that appear to be unusedMatt Arsenault2014-07-151-3/+0
| | | | llvm-svn: 213087
* [RuntimeDyld] Revert r211652 - MachO object GDB registration support.Lang Hames2014-07-154-153/+24
| | | | | | | | The registration scheme used in r211652 violated the read-only contract of MemoryBuffer. This caused crashes in llvm-rtdyld where macho objects were backed by read-only mmap'd memory. llvm-svn: 213086
* ADT: Fix MapVector::erase()Duncan P. N. Exon Smith2014-07-153-4/+33
| | | | | | | | | | | | Actually update the changed indexes in the map portion of `MapVector` when erasing from the middle. Add a unit test that checks for this. Note that `MapVector::erase()` is a linear time operation (it was and still is). I'll commit a new method in a moment called `MapVector::remove_if()` that deletes multiple entries in linear time, which should be slightly less painful. llvm-svn: 213084
* ADT: Add "end namespace" commentDuncan P. N. Exon Smith2014-07-151-1/+1
| | | | | | This keeps clang-format from deleting the preceding newline. llvm-svn: 213082
* [RegisterCoalescer] Add new subtarget hook allowing targets to opt-out of ↵Chris Bieneman2014-07-158-4/+180
| | | | | | | | | | coalescing. The coalescer is very aggressive at propagating constraints on the register classes, and the register allocator doesn’t know how to split sub-registers later to recover. This patch provides an escape valve for targets that encounter this problem to limit coalescing. This patch also implements such for ARM to lower register pressure when using lots of large register classes. This works around PR18825. llvm-svn: 213078
* [AArch64] Add negative tests for the SIMD & FP LDP instructions.Tilmann Scheller2014-07-151-0/+36
| | | | | | LDP is unpredictable if the registers in the pair are identical, these tests check that we don't assemble instructions like that and error out instead. llvm-svn: 213074
* Revert r213070. It's breaking the build in MCELFStreamer::EmitInstToData(...).Cameron McInally2014-07-153-40/+2
| | | | llvm-svn: 213073
* R600: Implement zero undef variants of ctlz/cttzJan Vesely2014-07-155-0/+43
| | | | | | | | | v2: use ffbh/l if available v3: Rebase on top of Matt's SI patches Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu> Reviewed-by: Tom Stellard <tom@stellard.net> llvm-svn: 213072
* [mips] Correct .MIPS.abiflags fp_abi field for -mfpxx and without .moduleDaniel Sanders2014-07-152-1/+5
| | | | | | | | Summary: Previously all the test cases set it after initialization with '.module fp=xx'. Differential Revision: http://reviews.llvm.org/D4489 llvm-svn: 213071
* Add x86 patterns to match a specific add-with-carry. Cameron McInally2014-07-153-2/+40
| | | | llvm-svn: 213070
* [DAGCombiner] Add more rules to fold shuffles.Andrea Di Biagio2014-07-152-7/+139
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds two new rules to the DAGCombiner: 1. shuffle (shuffle A, Undef, M0), B, M1 -> shuffle A, B, M2 2. shuffle (shuffle A, Undef, M0), A, M1 -> shuffle A, Undef, M2 We only do this if the combined shuffle is legal for the target. Example: ;; define <4 x float> @test(<4 x float> %a, <4 x float> %b) { %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32><i32 6, i32 0, i32 1, i32 7> %2 = shufflevector <4 x float> %1, <4 x float> %b, <4 x i32><i32 1, i32 2, i32 4, i32 5> ret <4 x i32> %2 } ;; (using llc -mcpu=corei7 -march=x86-64) Before, the x86 backend generated: pshufd $120, %xmm0, %xmm0 shufps $-108, %xmm0, %xmm1 movaps %xmm1, %xmm0 Now the x86 backend generates: movsd %xmm1, %xmm0 llvm-svn: 213069
* Prune Redundant libdeps in CMake's target_link_libraries and LLVMBuild.txt.NAKAMURA Takumi2014-07-155-5/+4
| | | | | | I checked this with Release+Asserts on x86_64-mingw32. Please restore partially if this were overkill. llvm-svn: 213064
* Silence a warning in conditional expression.Andrea Di Biagio2014-07-151-1/+1
| | | | | | | | Fixes a gcc warning caused by a typo. A redundant assignment operation was accidentally used as the third operand of a conditional expression. No functional change intended. llvm-svn: 213061
* MergeFunc patch from Björn Steinbrink.Stepan Dyatkovskiy2014-07-152-2/+103
| | | | | | | Phabricator ticket: D4246, Don't merge functions with different range metadata on call/invoke. Thanks! llvm-svn: 213060
* AArch64: fall back to generic code for out of range extract/insert.Tim Northover2014-07-152-6/+25
| | | | | | rdar://problem/17624784 llvm-svn: 213059
* Fix typo in commentDavid Majnemer2014-07-151-1/+1
| | | | | | No functionality changed. llvm-svn: 213052
* [FastISel][X86] Remove no longer needed functions.Juergen Ributzka2014-07-151-462/+0
| | | | llvm-svn: 213051
* [FastISel][X86] Implement the FastLowerIntrinsicCall hook.Juergen Ributzka2014-07-151-41/+41
| | | | | | | Rename X86VisitIntrinsicCall -> FastLowerIntrinsicCall, which effectively implements the target hook. llvm-svn: 213050
* [FastISel][X86] Implement the FastLowerCall hook.Juergen Ributzka2014-07-151-9/+400
| | | | | | | | | | | | This implements the FastLowerCall hook, which is based on the DoSelectCall function. The implementation is very similar, but the target-independent call lowering part has been factored out. This should also enable patchpoint intrinsic lowering for FastISel on X86. Related to <rdar://problem/17427052>. llvm-svn: 213049
* Revert "[FastISel][X86] Remove no longer needed functions."Juergen Ributzka2014-07-151-244/+315
| | | | | | | | | | Revert "[FastISel][X86] Implement the FastLowerIntrinsicCall hook." Revert "[FastISel][X86] Implement the FastLowerCall hook." This reverts commit r213035, r213036, and r213037 to make the buildbots happy again. llvm-svn: 213048
* [dfsan] Introduce an optimization to reduce the number of union queries.Peter Collingbourne2014-07-152-1/+75
| | | | | | | Specifically, when building a union query, if we are dominated by an identical query then use the result of that query instead. llvm-svn: 213047
* [dfsan] Move combineShadows to DFSanFunction in preparation for it to use a ↵Peter Collingbourne2014-07-151-18/+16
| | | | | | domtree. llvm-svn: 213046
* Give SplitBlockAndInsertIfThen the ability to update a domtree.Peter Collingbourne2014-07-152-2/+21
| | | | llvm-svn: 213045
* Some targets don't prefix private symbols with dotDavid Majnemer2014-07-151-1/+1
| | | | llvm-svn: 213042
* Specify a more specific triple for constant-pool-remat-0.llDavid Majnemer2014-07-151-1/+1
| | | | | | | | | Instead of specifying 32-bit x86, specify 32-bit x86 linux. This test is testing a very specific behavior which changed with WinCOFF's constant pools. llvm-svn: 213041
* Relax tests expecting to see CPI symbolsDavid Majnemer2014-07-152-2/+3
| | | | | | | WinCOFF doesn't use CPI symbols, it has a different scheme for naming constant pool entries. Update tests to handle either appearing. llvm-svn: 213039
* CodeGen: Handle ConstantVector and undef in WinCOFF constant poolsDavid Majnemer2014-07-152-13/+38
| | | | | | | | | | | | The constant pool entry code for WinCOFF assumed that vector constants would be formed using ConstantDataVector, it did not expect to see a ConstantVector. Furthermore, it did not expect undef as one of the elements of the vector. ConstantVectors should be handled like ConstantDataVectors, treat Undef as zero. llvm-svn: 213038
* [FastISel][X86] Remove no longer needed functions.Juergen Ributzka2014-07-151-462/+0
| | | | llvm-svn: 213037
* [FastISel][X86] Implement the FastLowerIntrinsicCall hook.Juergen Ributzka2014-07-151-41/+41
| | | | | | | Rename X86VisitIntrinsicCall -> FastLowerIntrinsicCall, which effectively implements the target hook. llvm-svn: 213036
* [FastISel][X86] Implement the FastLowerCall hook.Juergen Ributzka2014-07-151-9/+400
| | | | | | | | | | | | This implements the FastLowerCall hook, which is based on the DoSelectCall function. The implementation is very similar, but the target-independent call lowering part has been factored out. This should also enable patchpoint intrinsic lowering for FastISel on X86. Related to <rdar://problem/17427052>. llvm-svn: 213035
* [FastISel] Insert patchpoint instruction before the target generated call ↵Juergen Ributzka2014-07-151-1/+2
| | | | | | | | | | instruction. The patchpoint instruction should have been inserted before the target generated call instruction to be inside the ADJSTACKDOWN/ADJSTACKUP call sequence window. llvm-svn: 213034
* [FastISel] Fix patchpoint lowering to set the result register.Juergen Ributzka2014-07-151-5/+6
| | | | | | | | Always update the value map with the result register (if there is one), for the patchpoint instruction we created to replace the target-specific call instruction. llvm-svn: 213033
* R600: Add dag combine for copy of an illegal type.Matt Arsenault2014-07-155-13/+240
| | | | | | | | | This helps avoid redundant instructions to unpack, and repack the vectors. Ideally we could recognize that pattern and eliminate it. Currently v4i8 and other small element type vectors are scalarized, so this has the added bonus of avoiding that. llvm-svn: 213031
* Teach computeKnownBits to look through addrspacecast.Matt Arsenault2014-07-152-1/+32
| | | | | | This fixes inferring alignment through an addrspacecast. llvm-svn: 213030
* Improve test 'CodeGen/X86/combine-vec-shuffle-3.ll'.Andrea Di Biagio2014-07-151-9/+9
| | | | | | | | | | Now functions 'test4', 'test9', 'test14' and 'test19' correctly perform a move of two packed values from the high quadword of vector %b to the low quadword of vector %a (movhlps idiom). No functional change intended. llvm-svn: 213029
* Document the maximum LLVM IR alignment, which is 1 << 29 or 0.5 GiBReid Kleckner2014-07-152-6/+16
| | | | | | | Add verifier checks. We already check these in the assembly parser, but a frontend producing IR in memory wouldn't hit those checks. llvm-svn: 213027
* Teach GetUnderlyingObject / BasicAA about addrspacecastMatt Arsenault2014-07-154-5/+40
| | | | llvm-svn: 213025
* Revert r212572 "improve BasicAA CS-CS queries", it causes PR20303.Nick Lewycky2014-07-155-371/+126
| | | | llvm-svn: 213024
* Convert test to FileCheck.Matt Arsenault2014-07-151-13/+35
| | | | | | Check the individual test functions for more useful failure errors. llvm-svn: 213021
* [DAGCombiner] Avoid calling method 'isShuffleMaskLegal' on illegal vector types.Andrea Di Biagio2014-07-152-0/+14
| | | | | | | | | | | | | | | | | | This patch fixes a crasher in method 'DAGCombiner::visitOR' due to an invalid call to method 'isShuffleMaskLegal'. On x86, method 'isShuffleMaskLegal' always expects a legal vector value type in input. With this patch, we immediately check if the input OR dag node has a legal vector type; we only try to fold a OR dag node into a single shufflevector if we know that the resulting shuffle will have a legal type. This is to avoid calling method 'isShuffleMaskLegal' on a potentially illegal vector value type. Added a new test-case to file 'CodeGen/X86/combine-or.ll' to verify that DAGCombiner doesn't crash in the attempt to check/combine an OR between shuffles with illegal types. llvm-svn: 213020
* R600: Add denormal handling subtarget features.Matt Arsenault2014-07-146-8/+79
| | | | llvm-svn: 213018
* R600/SI: Default to no single precision denormals.Matt Arsenault2014-07-142-2/+10
| | | | llvm-svn: 213017
* Revert "Revert "Move clang feature flags settings out of LLVM core and into ↵Alp Toker2014-07-141-16/+0
| | | | | | | | | | cfe"" It turns out this commit was fine. The problem was in the legacy build system (fixed r213010). This reverts commit r213005. llvm-svn: 213015
* [RuntimeDyld] Handle endiannes differences between the host and target whileLang Hames2014-07-141-14/+19
| | | | | | | | | | reading MachO files magic numbers in RuntimeDyld. This is required now that we're testing cross-platform JITing (via RuntimeDyldChecker), and should fix some issues that David Fang has seen on PPC builds. llvm-svn: 213012
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