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* [InstCombine] Pass a proper context instruction to all of the calls into ↵Craig Topper2017-06-099-45/+66
| | | | | | | | | | | | | | | | InstSimplify Summary: This matches the behavior we already had for compares and makes us consistent everywhere. Reviewers: dberlin, hfinkel, spatel Reviewed By: dberlin Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33604 llvm-svn: 305049
* [codeview] use 32-bit integer for RelocOffset in DebugLinesSubsectionBob Haarman2017-06-093-4/+4
| | | | | | | | | | | | | | | | | Summary: RelocOffset is a 32-bit value, but we previously truncated it to 16 bits. Fixes PR33335. Reviewers: zturner, hiraditya! Reviewed By: zturner Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D33968 llvm-svn: 305043
* [pdb] Don't crash on unknown debug subsections.Zachary Turner2017-06-094-14/+15
| | | | | | | | More and more unknown debug subsection kinds are being discovered so we should make it possible to dump these and display the bytes. llvm-svn: 305041
* sink DebugCompressionType into MC for exposing to clangSaleem Abdulrasool2017-06-096-32/+33
| | | | | | | | | | | | | | This is a preparatory change to expose the debug compression style to clang. It requires exposing the enumeration and passing the actual value through to the backend from the frontend in actual value form rather than a boolean that selects the GNU style of debug info compression. Minor tweak to the ELF Object Writer to use a variable for re-used values. Add an assertion that debug information format is one of the two currently known types if debug information is being compressed. llvm-svn: 305038
* [CodeView] Support remaining debug subsection typesZachary Turner2017-06-0919-132/+637
| | | | | | | | | | | | | | | | This adds support for Symbols, StringTable, and FrameData subsection types. Even though these subsections rarely if ever appear in a PDB file (they are usually in object files), there's no theoretical reason why they *couldn't* appear in a PDB. The real issue though is that in order to add support for dumping and writing them (which will be useful for object files), we need a way to test them. And since there is no support for reading and writing them to / from object files yet, making PDB support them is the best way to both add support for the underlying format and add support for tests at the same time. Later, when we go to add support for reading / writing them from object files, we'll need only minimal changes in the underlying read/write code. llvm-svn: 305037
* Fix build by adding includes.Zachary Turner2017-06-081-0/+2
| | | | llvm-svn: 305036
* [llvm-pdbdump] Support native ordering of subsections in raw mode.Zachary Turner2017-06-0812-392/+343
| | | | | | | | | | | | | This is the same change for the YAML Output style applied to the raw output style. Previously we would queue up all subsections until every one had been read, and then output them in a pre- determined order. This was because some subsections need to be read first in order to properly dump later subsections. This patch allows them to be dumped in the order they appear. Differential Revision: https://reviews.llvm.org/D34015 llvm-svn: 305034
* [llvm-pdbdump] Improve consistency among subcommands.Zachary Turner2017-06-0816-341/+362
| | | | | | | | | | | | | | | The pdb2yaml and raw subcommands did something very similar but with a different output format, and they used a lot of the same command line options, but each one re-implemented the command line option with slightly different spellings / options. This patch merges them together into a single definition which is shared by both subcommands. This new syntax also allows for more flexibility in the way debug subsections are dumped. Differential Revision: https://reviews.llvm.org/D33996 llvm-svn: 305032
* [CFI] Remove LinkerSubsectionsViaSymbols.Evgeniy Stepanov2017-06-082-38/+13
| | | | | | | | | | | | Since D17854 LinkerSubsectionsViaSymbols is unnecessary. It is interfering with ThinLTO implementation of CFI-ICall, where the aliases used on the !LinkerSubsectionsViaSymbols branch are needed to export jump tables to ThinLTO backends. This is the second attempt to land this change after fixing PR33316. llvm-svn: 305031
* [ExtractGV] Fix the doxygen comment on the constructor and the class to ↵Craig Topper2017-06-081-6/+6
| | | | | | refer to global values instead of functions. While there fix an 80 column violation. NFC llvm-svn: 305030
* Fixed warning: dereferencing type-punned pointer will break strict-aliasing ↵Galina Kistanova2017-06-081-7/+7
| | | | | | | | | rules. No need in reinterpret_cast<StringTableOffset &> here, as struct coff_symbol Name is a unin with the member StringTableOffset Offset. This union member could be accessed directly. llvm-svn: 305029
* [IR] Remove getNumSuccessorsV/getSuccessorV/setSuccessorV from the ↵Craig Topper2017-06-082-179/+42
| | | | | | | | | | | | TerminatorInst subclasses as much as possible now that Value has been de-virtualized These used to be virtual methods that would enable doing the right thing with only a TerminatorInst pointer. I believe they were also acting as vtable anchors in my cases. I think the fact that they had a separate name ending in V was to allow a version without V to be called without a virtual call in a pre-C++11 final keyword world. Where possible the base methods in TerminatorInst dispatch directly to the public methods in the classes that have the same signature. For some classes this wasn't possible so I've left private method versions that match the name and signature of the version in TerminatorInst. All versions have been moved into the class definitions since we no longer need vtable anchors here. Differential Revision: https://reviews.llvm.org/D34011 llvm-svn: 305028
* Write summaries for merged modules when splitting modules for ThinLTO.Peter Collingbourne2017-06-086-3/+38
| | | | | | | | | This is to prepare to allow for dead stripping of globals in the merged modules. Differential Revision: https://reviews.llvm.org/D33921 llvm-svn: 305027
* [sanitizer-coverage] one more flavor of coverage: ↵Kostya Serebryany2017-06-083-9/+57
| | | | | | -fsanitize-coverage=inline-8bit-counters. Experimental so far, not documenting yet. Reapplying revisions 304630, 304631, 304632, 304673, see PR33308 llvm-svn: 305026
* Object: Move datalayout check into irsymtab::build. NFCI.Peter Collingbourne2017-06-081-4/+4
| | | | | | | | | This check is a requirement of the irsymtab builder, not of any particular caller. Differential Revision: https://reviews.llvm.org/D33970 llvm-svn: 305023
* Bitcode: Introduce a BitcodeFileContents data type. NFCI.Peter Collingbourne2017-06-086-21/+47
| | | | | | | | | | This data type includes the contents of a bitcode file. Right now a bitcode file can only contain modules, but a later change will add a symbol table. Differential Revision: https://reviews.llvm.org/D33969 llvm-svn: 305019
* test-release.sh: Remove workaround for test-suite buildTom Stellard2017-06-081-12/+17
| | | | | | | | | | | | | | Summary: We aren't actually building the test suite, so this isn't needed. Reviewers: rengolin, hansw Reviewed By: rengolin Subscribers: rengolin, llvm-commits Differential Revision: https://reviews.llvm.org/D29840 llvm-svn: 305017
* RegAllocPBQP: Do not assign reserved physical registerMatthias Braun2017-06-085-13/+61
| | | | | | | | | | | | | | | | (0) RegAllocPBQP: Since getRawAllocationOrder() may return a collection that includes reserved physical registers, iterate to find an un-reserved physical register. (1) VirtRegMap: Enforce the invariant: "no reserved physical registers" in assignVirt2Phys(). Previously, this was checked only after the fact in VirtRegRewriter::rewrite. (2) MachineVerifier: updated the test per MatzeB's review. (3) +testcase Patch by Nick Johnson<Nicholas.Paul.Johnson@deshawresearch.com>! Differential Revision: https://reviews.llvm.org/D33947 llvm-svn: 305016
* [Hexagon] Re-enable machine verifier after codegen passesKrzysztof Parzyszek2017-06-081-17/+17
| | | | | | | Remove "false" from the arguments to "addPass" in Hexagon's target pass config. llvm-svn: 305015
* [Hexagon] Skip mux generation when predicate register is undefinedKrzysztof Parzyszek2017-06-082-1/+31
| | | | llvm-svn: 305014
* [MachO] Fix codegen of alias of alias.Evgeniy Stepanov2017-06-083-4/+20
| | | | | | Fixes PR33316. llvm-svn: 305012
* [CGP, x86] add tests for potential memcmp expansion; NFCSanjay Patel2017-06-081-0/+337
| | | | | | | | | | | | No IR tests were added with rL304313 ( https://reviews.llvm.org/D28637 ), so I want these for extra coverage if we enable memcmp expansion for x86. As shown, nothing is expanded for x86 in CGP yet. Also fundamentally, we're doing an IR transform, so we should have IR tests for just that part. If something goes wrong, we need to know if the bug is in CGP or later lowering. llvm-svn: 305011
* Do not early-inline recursive calls in sample profile loader.Dehao Chen2017-06-083-0/+23
| | | | | | | | | | | | | | Summary: Early-inlining of recursive call makes the code size bloat exponentially. We should not disable it. Reviewers: davidxl, dnovillo, iteratee Reviewed By: iteratee Subscribers: iteratee, llvm-commits, sanjoy Differential Revision: https://reviews.llvm.org/D34017 llvm-svn: 305009
* fix formatting; NFCSanjay Patel2017-06-082-7/+7
| | | | llvm-svn: 305008
* [CGP] don't expand a memcmp with nobuiltin attributeSanjay Patel2017-06-083-12/+27
| | | | | | | | | | | | | | | | This matches the behavior used in the SDAG when expanding memcmp. For reference, we're intentionally treating the earlier fortified call transforms differently after: https://bugs.llvm.org/show_bug.cgi?id=23093 https://reviews.llvm.org/rL233776 One motivation for not transforming nobuiltin calls is that it can interfere with sanitizers: https://reviews.llvm.org/D19781 https://reviews.llvm.org/D19801 Differential Revision: https://reviews.llvm.org/D34043 llvm-svn: 305007
* AMDGPU: Work around build special casing .inc filesMatt Arsenault2017-06-083-1/+7
| | | | | | | It complains because it assumes these were autogenerated files in the source directory. llvm-svn: 305005
* AMDGPU: Use correct register names in inline assemblyMatt Arsenault2017-06-0817-401/+811
| | | | | | Fixes using physical registers in inline asm from clang. llvm-svn: 305004
* [Hexagon] Speedup NumNodesBlocking calculation. NFCI.Nirav Dave2017-06-081-32/+25
| | | | llvm-svn: 305003
* [PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64Guozhi Wei2017-06-083-26/+59
| | | | | | | | | | In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64. This patch fixed PR32442. Differential Revision: https://reviews.llvm.org/D31407 llvm-svn: 305001
* [AMDGPU] Force qsads instrs to use different dest register than source registersMark Searles2017-06-084-37/+73
| | | | | | | | The V_MQSAD_PK_U16_U8, V_QSAD_PK_U16_U8, and V_MQSAD_U32_U8 take more than 1 pass in hardware. For these three instructions, the destination registers must be different than all sources, so that the first pass does not overwrite sources for the following passes. Differential Revision: https://reviews.llvm.org/D33783 llvm-svn: 304998
* Update release notes for BinaryFormat library.Zachary Turner2017-06-081-0/+7
| | | | | | Differential Revision: https://reviews.llvm.org/D34001 llvm-svn: 304995
* Changed a comparison operator for std::stable_sort to implement strict weak ↵Galina Kistanova2017-06-082-30/+33
| | | | | | | | | ordering. This is a temporarily fix which needs additional work, as it triggers a test3 failure. test3 is commented out till then. llvm-svn: 304993
* [Power9] Exploit vector integer extend instructionsZaara Syeda2017-06-082-0/+141
| | | | | | | | | | | | | | This patch adds build vector patterns to exploit the vector integer extend instructions: vextsb2w - Vector Extend Sign Byte To Word vextsb2d - Vector Extend Sign Byte To Doubleword vextsh2w - Vector Extend Sign Halfword To Word vextsh2d - Vector Extend Sign Halfword To Doubleword vextsw2d - Vector Extend Sign Word To Doubleword Differential Revision: https://reviews.llvm.org/D33510 llvm-svn: 304992
* [PowerPC] add memcmp test with nobuiltin attr; NFCSanjay Patel2017-06-081-0/+15
| | | | | | | | | | | In SDAG, we don't expand libcalls with a nobuiltin attribute. It's not clear if that's correct from the existing code comment: "Don't do the check if marked as nobuiltin for some reason." ...adding a test here either way to show that there is currently a different behavior implemented in the CGP-based expansion. llvm-svn: 304991
* [LazyValueInfo] Make LVILatticeVal intersect method take arguments by ↵Craig Topper2017-06-081-1/+1
| | | | | | reference so we don't copy ConstantRanges unless we need to. llvm-svn: 304990
* [x86] remove unused param from tests; NFCSanjay Patel2017-06-081-10/+10
| | | | llvm-svn: 304989
* [CGP / PowerPC] avoid multi-block overhead for simple memcmp expansionSanjay Patel2017-06-082-26/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The test diff for PowerPC shows we can better optimize if this case is one block. For x86, there's would be a substantial difference if CGP expansion was enabled because branches are assumed cheap and SDAG can't optimize across blocks. Instead of this: _cmp_eq8: movq (%rdi), %rax cmpq (%rsi), %rax je LBB23_1 ## BB#2: ## %res_block movl $1, %ecx jmp LBB23_3 LBB23_1: xorl %ecx, %ecx LBB23_3: ## %endblock xorl %eax, %eax testl %ecx, %ecx sete %al retq We get this: cmp_eq8: movq (%rdi), %rcx xorl %eax, %eax cmpq (%rsi), %rcx sete %al retq And that matches the optimal codegen that we get from the current expansion in SelectionDAGBuilder::visitMemCmpCall(). If this looks right, then I just need to confirm that vector-sized expansion will work from here, and we can enable CGP memcmp() expansion for x86. Ie, we'll bypass the power-of-2 special cases currently optimized in SDAG because we can lower the IR produced here optimally. Differential Revision: https://reviews.llvm.org/D34005 llvm-svn: 304987
* Add scheduler classes to integer/float horizontal operations.Andrew V. Tischenko2017-06-087-21/+142
| | | | | | | This patch will close PR32801. Differential Revision: https://reviews.llvm.org/D33203 llvm-svn: 304986
* [SLP] More comments fix, NFC.Alexey Bataev2017-06-081-3/+3
| | | | | | Fixed spelling errors on function description. llvm-svn: 304985
* [PDB] Don't crash on /debug:fastlink PDBs.Zachary Turner2017-06-083-66/+77
| | | | | | | | | | Apparently support for /debug:fastlink PDBs isn't part of the DIA SDK (!), and it was causing llvm-pdbdump to crash because we weren't checking for a null pointer return value. This manifests when calling findChildren on the IDiaSymbol, and it returns E_NOTIMPL. llvm-svn: 304982
* [x86] add tests for memcmp expansion; NFCSanjay Patel2017-06-081-37/+293
| | | | | | | | | | | | We already had a test to demonstrate PR33325: https://bugs.llvm.org/show_bug.cgi?id=33325 I'm adding tests for general memcmp expansion (see D34005 / D33963) and: https://bugs.llvm.org/show_bug.cgi?id=33329 ...plus non-power-of-2 sizes, so we can see what that looks like currently or if expanded. llvm-svn: 304979
* InferAddressSpaces: Avoid assertion failure with replacing identicalNirav Dave2017-06-082-0/+43
| | | | | | | | | | | | | | | cloned constexpr Have cloneConstantExprWithNewAddressSpaces return nullptr when returning initial ConstantExpr. Reviewers: arsenm Subscribers: jholewinski, wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D33995 llvm-svn: 304975
* Regenerate testSimon Pilgrim2017-06-081-24/+24
| | | | llvm-svn: 304973
* This patch closes PR28513: an optimization of multiplication by different ↵Andrew V. Tischenko2017-06-085-361/+4334
| | | | | | | | constants. The initial patch was rejected: I fixed the issue and re-apply it. llvm-svn: 304972
* [ARM] GlobalISel: Add more tests. NFCDiana Picus2017-06-081-0/+149
| | | | | | | | Add a couple of tests to increase coverage for the TableGen'erated code, in particular for rules where 2 generic instructions may be combined into a single machine instruction. llvm-svn: 304971
* [BPI] Don't assume that strcmp returning >0 is more likely than <0John Brawn2017-06-086-16/+327
| | | | | | | | | | | | | | | | | | | | The zero heuristic assumes that integers are more likely positive than negative, but this also has the effect of assuming that strcmp return values are more likely positive than negative. Given that for nonzero strcmp return values it's the ordering of arguments that determines the sign of the result there's no reason to assume that's true. Fix this by inspecting the LHS of the compare and using TargetLibraryInfo to decide if it's strcmp-like, and if so only assume that nonzero is more likely than zero i.e. strings are more often different than the same. This causes a slight code generation change in the spec2006 benchmark 403.gcc, but with no noticeable performance impact. The intent of this patch is to allow better optimisation of dhrystone on Cortex-M cpus, but currently it won't as there are also some changes that need to be made to if-conversion. Differential Revision: https://reviews.llvm.org/D33934 llvm-svn: 304970
* [Go] Subtypes functionAndrew Wilkins2017-06-082-0/+32
| | | | | | | | | | This patch adds LLVMGetSubtypes to Go API (as Type.Subtypes), tests included. Patch by Ekaterina Vaartis! Differential Revision: https://reviews.llvm.org/D33901 llvm-svn: 304968
* Correct AMDGPU Hawaii and Kabini target namesTony Tye2017-06-081-3/+3
| | | | | | | | The FirePro and Radeon versions of Hawaii have different 64 bit floating point configurations so use distinct target names for them. Rename the target name for Kabini to accommodate. Differential Revision: https://reviews.llvm.org/D34016 llvm-svn: 304959
* Object: Factor out the code for creating the irsymtab for an arbitrary ↵Peter Collingbourne2017-06-085-45/+96
| | | | | | | | | | | bitcode file. This code now lives in lib/Object. The idea is that it can now be reused by IRObjectFile among other things. Differential Revision: https://reviews.llvm.org/D31921 llvm-svn: 304958
* [CodeGen] Fix some Clang-tidy modernize-use-using and Include What You Use ↵Eugene Zelenko2017-06-0720-195/+286
| | | | | | warnings; other minor fixes (NFC). llvm-svn: 304954
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