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* ARM VFP support 'flds/fldd' aliases for 'vldr'Jim Grosbach2011-12-082-1/+7
| | | | llvm-svn: 146115
* ARM optional destination operand variants for VEXT instructions.Jim Grosbach2011-12-082-0/+32
| | | | llvm-svn: 146114
* Tidy up.Jim Grosbach2011-12-081-22/+29
| | | | llvm-svn: 146113
* Fix 80-column.Chad Rosier2011-12-082-11/+14
| | | | | | Simplify code. llvm-svn: 146112
* ARM assembler aliases for "add Rd, #-imm" to "sub Rd, #imm".Jim Grosbach2011-12-084-11/+62
| | | | llvm-svn: 146111
* Add Tsan annotations to the pass system.Nick Lewycky2011-12-081-1/+6
| | | | | | Perhaps once(&func) should be hoisted into lib/Support. llvm-svn: 146110
* Fix comments.Chad Rosier2011-12-082-1/+2
| | | | llvm-svn: 146109
* EngineBuilder: support for custom TargetOptions. Fixes thePeter Collingbourne2011-12-074-3/+19
| | | | | | ExceptionDemo example. llvm-svn: 146108
* Fix comments.Chad Rosier2011-12-072-3/+3
| | | | llvm-svn: 146107
* ARM assembly, allow 'asl' as a synonym for 'lsl' in shifted-register operands.Jim Grosbach2011-12-072-1/+5
| | | | | | For 'gas' compatibility. llvm-svn: 146106
* Modify class ReadHardware and add definition of 64-bit version of instructionAkira Hatanaka2011-12-072-3/+6
| | | | | | RDHWR. llvm-svn: 146101
* Add newline.Akira Hatanaka2011-12-071-1/+2
| | | | llvm-svn: 146100
* Add 64-bit HWR29 register.Akira Hatanaka2011-12-071-0/+2
| | | | llvm-svn: 146099
* 32 to 64-bit anyext pattern.Akira Hatanaka2011-12-071-0/+4
| | | | llvm-svn: 146097
* 32 to 64-bit zext pattern.Akira Hatanaka2011-12-072-0/+16
| | | | llvm-svn: 146096
* ARM two-operand aliases for VAND/VEOR/VORR instructions.Jim Grosbach2011-12-072-0/+57
| | | | llvm-svn: 146095
* ARM two-operand aliases for VADDW instructions.Jim Grosbach2011-12-072-0/+31
| | | | llvm-svn: 146093
* ARM two-operand aliases for VADD instructions.Jim Grosbach2011-12-072-0/+47
| | | | llvm-svn: 146091
* Flesh out a bit more of the bitcode use-list ordering preservation code.Chad Rosier2011-12-071-5/+87
| | | | | | | Nothing too interesting at this point, but comments are welcome. Part of rdar://9860654 and PR5680. llvm-svn: 146090
* Variable cleanup. Based on past patch submittals variable names haveBruno Cardoso Lopes2011-12-072-55/+60
| | | | | | | been normalized and more descriptive comments added. Patch by Reed Kotler and Jack Carter. llvm-svn: 146088
* Make sure we correctly set LiveRegGens when a call is unscheduled. ↵Eli Friedman2011-12-071-1/+8
| | | | | | <rdar://problem/10460321>. No testcase because this is very sensitive to scheduling. llvm-svn: 146087
* 64-bit WrapperPICPat patterns.Akira Hatanaka2011-12-072-8/+21
| | | | llvm-svn: 146086
* configure: Don't warn about compiler-rt checked out into projects/.Daniel Dunbar2011-12-072-5/+3
| | | | llvm-svn: 146084
* Fix an assertion in the scheduler. PR11386. No testcase included because ↵Eli Friedman2011-12-071-3/+2
| | | | | | it's rather delicate. llvm-svn: 146083
* Define base class for WrapperPICPat.Akira Hatanaka2011-12-071-7/+7
| | | | llvm-svn: 146081
* Modify LowerFCOPYSIGN to handle Mips64.Akira Hatanaka2011-12-072-52/+68
| | | | llvm-svn: 146080
* Update bcanalyzer to handle new USELIST_BLOCK/USELIST_CODE_ENTRY.Chad Rosier2011-12-071-0/+6
| | | | llvm-svn: 146079
* Begin adding experimental support for preserving use-list ordering of bitcodeChad Rosier2011-12-074-1/+85
| | | | | | | | | | files. First, add a new block USELIST_BLOCK to the bitcode format. This is where USELIST_CODE_ENTRYs will be stored. The format of the USELIST_CODE_ENTRYs have not yet been defined. Add support in the BitcodeReader for parsing the USELIST_BLOCK. Part of rdar://9860654 and PR5680. llvm-svn: 146078
* These global variables aren't thread-safe, STATISTIC is. Andy Trick tells meNick Lewycky2011-12-071-66/+12
| | | | | | that he isn't using these any more, so just delete them. llvm-svn: 146076
* Have cmake build llvm-cov. Patch by arrowdodger.Duncan Sands2011-12-071-0/+1
| | | | llvm-svn: 146071
* ValueEnumerator - debug dump().Chad Rosier2011-12-072-1/+43
| | | | llvm-svn: 146070
* Fix comment.Akira Hatanaka2011-12-071-2/+1
| | | | llvm-svn: 146063
* Fix comment.Akira Hatanaka2011-12-071-1/+1
| | | | llvm-svn: 146062
* Fix 64-bit immediate patterns.Akira Hatanaka2011-12-074-6/+60
| | | | llvm-svn: 146059
* Nuke inadvertant debugging commit.Jim Grosbach2011-12-071-3/+0
| | | | llvm-svn: 146057
* Darwin assembler improved relocs when w/o subsections_via_symbols.Jim Grosbach2011-12-075-2/+16
| | | | | | | | When the file isn't being built with subsections-via-symbols, symbol differences involving non-local symbols can be resolved more aggressively. Needed for gas compatibility. llvm-svn: 146054
* Remove unneeded semicolon.Jakub Staszak2011-12-071-3/+3
| | | | | | Skip two looking up at BlockChain. llvm-svn: 146053
* Thumb2 alias for long-form pop and friends.Jim Grosbach2011-12-072-0/+14
| | | | | | rdar://10542474 llvm-svn: 146046
* Also pass in correct initializer here.Bill Wendling2011-12-071-1/+1
| | | | llvm-svn: 146044
* ARM support the .arm and .thumb directives for assembly mode switching.Jim Grosbach2011-12-072-3/+30
| | | | llvm-svn: 146042
* Correct initializer in example.Bill Wendling2011-12-071-1/+1
| | | | llvm-svn: 146041
* ARM NEON VCLT(register) is a pseudo aliasing VCGT(register).Jim Grosbach2011-12-072-0/+64
| | | | llvm-svn: 146039
* Tidy up. Move MachO tests to MachO directory.Jim Grosbach2011-12-077-0/+0
| | | | llvm-svn: 146038
* Remove unused include.Duncan Sands2011-12-071-1/+0
| | | | llvm-svn: 146037
* When doing "opt -O2" verify the bitcode like is done forDuncan Sands2011-12-071-0/+2
| | | | | | "opt -std-compile-opts". llvm-svn: 146036
* Fix a bunch of SSE/AVX patterns to use proper memop types. In particular, ↵Craig Topper2011-12-071-68/+46
| | | | | | not using integer loads other than v2i64/v4i64 since the others are all promoted. llvm-svn: 146031
* Adjust the stack by one pointer size for all frameless stacks.Bill Wendling2011-12-071-1/+2
| | | | llvm-svn: 146030
* Fix off-by-one error when encoding the stack size for a frameless stack.Bill Wendling2011-12-071-1/+1
| | | | llvm-svn: 146029
* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-0769-353/+595
| | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. llvm-svn: 146026
* Adding missing anchor to DATDeltaAlgorithm.David Blaikie2011-12-072-0/+4
| | | | llvm-svn: 146025
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