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* [X86] Register and initialize the FixupBW pass.Ahmed Bougacha2016-05-073-8/+19
| | | | | | That lets us use it in MIR tests. llvm-svn: 268830
* [libFuzzer] modify the docs for startup/initKostya Serebryany2016-05-061-3/+7
| | | | llvm-svn: 268824
* [libFuzzer] tweak the documentation about rss_limitKostya Serebryany2016-05-061-3/+1
| | | | llvm-svn: 268822
* [libFuzzer] enhance -rss_limit_mb and enable by default. Now it will print ↵Kostya Serebryany2016-05-069-15/+88
| | | | | | the OOM reproducer. llvm-svn: 268821
* [PGO] Use rsplit to parse value-data line in text profile file.Rong Xu2016-05-061-1/+1
| | | | | | | | | The value-data line is <PGOFuncName>:<Count_Value>. PGOFuncName might contain ':' for the internal linkage functions. We therefore need to use rsplit, rather split, to extract the data from the line. This fixes the error when merging a text profile file to an indexed profile file. llvm-svn: 268818
* Implement a safer bitcode upgrade for DISubprogram.Adrian Prantl2016-05-062-6/+9
| | | | | | | | | | | | | | | | | | The bitcode upgrade I added for DISubprogram in r266446 was based on the assumption that the CU node for the subprogram was already materialized by the time the DISubprogram is visited. This assumption may not hold true as future versions of LLVM may decide to write out bitcode in a different order. This patch corrects this by introducing a versioning bit next to the distinct flag to unambiguously differentiate the new from the old record layouts. Note for people stabilizing LLVM out-of-tree: This patch introduces a bitcode incompatibility with llvm trunk revisions from r266446 — this commit. (But D19987 will ensure that it degrades gracefully). http://reviews.llvm.org/D20004 rdar://problem/26074194 llvm-svn: 268816
* DetectDeadLanes: Increase precision when detecting undef inputsMatthias Braun2016-05-063-57/+145
| | | | | | | | | | | | | In case of COPY-like instruction we may be able to deduce that a certain input is unused, based on the used lanes of the register defined by the instruction. This even works accross otherwise incompatible copies (no need to have compatible lanemasks, completely unused operands are still completely unused). It even makes sense to redo the analysis in this case since we gained information for a case we previously stopped at because of the incompatible masks. llvm-svn: 268815
* DetectDeadLanes: Cleanup, assert on some impossible cases.Matthias Braun2016-05-061-9/+8
| | | | llvm-svn: 268814
* Drop error when trying to fallback from PDB to DWARF.Zachary Turner2016-05-061-0/+4
| | | | llvm-svn: 268813
* cmake: Avoid continue, apparently that's newJustin Bogner2016-05-061-8/+7
| | | | llvm-svn: 268812
* [SLPVectorizer][X86] Regenerated SEXT/ZEXT cast vectorization testsSimon Pilgrim2016-05-061-8/+94
| | | | | | Added 256-bit vector test as well llvm-svn: 268811
* [ARM] Fix Scavenger assert due to underestimated stack sizeWeiming Zhao2016-05-062-5/+217
| | | | | | | | | | | | | | | | | | | (this is resubmit of r268529 with minor refactoring. r268529 was reverted at r268536 due a memory sanitizer failure. I have not been able to reproduce that failure and I checked all the variable used in my change but I could not spot an issue. I did some refactoring and see if it will give a clearer hint) Summary: Currently, when checking if a stack is "BigStack" or not, it doesn't count into spills and arguments. Therefore, LLVM won't reserve spill slot for this actually "BigStack". This may cause scavenger failure. Reviewers: rengolin Subscribers: vitalybuka, aemerson, rengolin, tberghammer, danalbert, srhines, llvm-commits Differential Revision: http://reviews.llvm.org/D19896 llvm-svn: 268810
* Reapply 267210 with fix for PR27490Philip Reames2016-05-062-8/+71
| | | | | | | | | | | Original Commit Message Extend load/store type canonicalization to handle unordered operations Extend the type canonicalization logic to work for unordered atomic loads and stores. Note that while this change itself is fairly simple and low risk, there's a reasonable chance this will expose problems in the backends by suddenly generating IR they wouldn't have seen before. Anything of this nature will be an existing bug in the backend (you could write an atomic float load), but this will definitely change the frequency with which such cases are encountered. If you see problems, feel free to revert this change, but please make sure you collect a test case. Note that the concern about lowering is now much less likely. PR27490 proved that we already *were* mucking with the types of ordered atomics and volatiles. As a result, this change doesn't introduce as much new behavior as originally thought. llvm-svn: 268809
* Make llvm-pdbdump print CV type recordsZachary Turner2016-05-067-56/+122
| | | | | | | | | | This reuses the CVTypeDumper from libcodeview to dump full information about type records within a PDB file. Differential Revision: http://reviews.llvm.org/D20022 Reviewed By: rnk llvm-svn: 268808
* [libFuzzer] add exeprimental -rss_limit_mb flag to fight against OOMsKostya Serebryany2016-05-064-0/+31
| | | | llvm-svn: 268807
* CMake: generate check targets for lit suites without their own lit.cfgsJustin Bogner2016-05-061-6/+21
| | | | | | | | | | | | | Currently our cmake generates targets like check-llvm-unit and check-llvm-transforms-loopunroll-x86, but not check-llvm-transforms or check-llvm-transforms-adce. This is because the search for test suites only lists the ones with a custom lit.cfg or lit.local.cfg. Instead, we can do something a little smarter - any directory under test that isn't called Inputs or inside a directory called Inputs is a test suite. llvm-svn: 268806
* LiveIntervalAnalysis: Fix handleMove() extending liverange for undef inputsMatthias Braun2016-05-062-3/+17
| | | | | | | Fix handleMove() incorrectly extending liveranges when an undef input of a vreg was moved past the (current) end of the liverange. llvm-svn: 268805
* [GVN] PRE of unordered loadsPhilip Reames2016-05-062-8/+113
| | | | | | Again, fairly simple. Only change is ensuring that we actually copy the property of the load correctly. The aliasing legality constraints were already handled by the FRE patches. There's nothing special about unorder atomics from the perspective of the PRE algorithm itself. llvm-svn: 268804
* [SLPVectorizer][X86] Added BSWAP/BITREVERSE vectorization testsSimon Pilgrim2016-05-062-0/+934
| | | | llvm-svn: 268803
* [SLPVectorizer][X86] Added CTPOP/CTLZ/CTTZ vectorization testsSimon Pilgrim2016-05-063-0/+2847
| | | | llvm-svn: 268800
* Revert "[X86] Add a new LOW32_ADDR_ACCESS_RBP register class."Quentin Colombet2016-05-063-17/+4
| | | | | | | | This reverts commit r268796. I believe it breaks test/CodeGen/X86/asm-mismatched-types.ll with: Cannot emit physreg copy instruction llvm-svn: 268799
* Fix failing test due to merge conflict.Zachary Turner2016-05-061-1/+1
| | | | llvm-svn: 268798
* [X86] Add a new LOW32_ADDR_ACCESS_RBP register class.Quentin Colombet2016-05-063-4/+17
| | | | | | | | ABIs like NaCl uses 32-bit addresses but have 64-bit frame. The new register class reflects those constraints when choosing a register class for a address access. llvm-svn: 268796
* [X86] Rename the X32_ADDR_ACCESS register class into LOW32_ADDR_ACCESS.Quentin Colombet2016-05-062-8/+12
| | | | | | | | This register class may be used by any ABIs that uses x86_64 ISA while using 32-bit addresses, not just in X32 cases. Make sure the name reflects that. llvm-svn: 268795
* Revert r268760, it caused PR27670.Nico Weber2016-05-0617-350/+227
| | | | llvm-svn: 268794
* Add missing include.Zachary Turner2016-05-061-0/+1
| | | | llvm-svn: 268792
* Port DebugInfoPDB over to using llvm::Error.Zachary Turner2016-05-0637-348/+751
| | | | | | | Differential Revision: http://reviews.llvm.org/D19940 Reviewed By: rnk llvm-svn: 268791
* [RS4GC] Fix typo in commentSanjoy Das2016-05-061-1/+1
| | | | llvm-svn: 268790
* Change GenericBinaryError to no longer include a FileName, which is then notKevin Enderby2016-05-063-36/+32
| | | | | | | | | | | | | | | | | | part of the error message. As the caller is the one that needs to add the name of where the "object file" comes from to the error message as the object file could be in an archive, or coming from a slice of a Mach-O universal file or a buffer created by a JIT. In the cases of a Mach-O universal file the architecture name may or may not also need to be printed which is up to the tool code. For example if the tool code is only selecting the host architecture slice then that architecture name is never printed. This patch is the change to the libObject code and there will be follow on commits for changes to the code for each tool. llvm-svn: 268789
* [libFuzzer] more trophiesKostya Serebryany2016-05-061-0/+2
| | | | llvm-svn: 268788
* [X86] Accept imp-defs of GR64 super-registers in FixupBW MOVrr.Ahmed Bougacha2016-05-061-5/+11
| | | | | | Testcase will follow shortly. llvm-svn: 268787
* [MSan] [X86] Fix vararg helper for fixed arguments in overflow area.Marcin Koscielnicki2016-05-062-2/+12
| | | | | | | | This fixes http://llvm.org/PR27646 on x86_64. Differential Revision: http://reviews.llvm.org/D19997 llvm-svn: 268783
* [AMDGPU][llvm-mc] Some refactoring of .td filesArtem Tamazov2016-05-062-27/+27
| | | | | | | | | Some custom Operands and AsmOperandClasses moved to proper place. No functional changes. Differential Revision: http://reviews.llvm.org/D20012 llvm-svn: 268780
* Refactor the Verifier so it can diagnose IR validation errors and debugAdrian Prantl2016-05-061-159/+195
| | | | | | | | | | | | | | | | | | | | | | | info metadata errors separately. (NFC) This patch refactors the Verifier so it can diagnose IR validation errors and debug info metadata errors separately. The motivation behind this change is that broken (or outdated) debug info can be "recovered" from by stripping the debug info. The problem I'm trying to solve with this sequence of patches is that historically we've done a really bad job at verifying debug info. We want to be able to make the verifier stricter without having to worry about breaking bitcode compatibility with existing producers. For example, we don't necessarily want IR produced by an older version of clang to be rejected by an LTO link just because of malformed debug info, and rather provide an option to strip it. Note that merely outdated (but well-formed) debug info would continue to be auto-upgraded in this scenario. http://reviews.llvm.org/D19986 rdar://problem/25818489 llvm-svn: 268778
* [Hexagon] Be careful about anti-dependencies with a call in packetizerKrzysztof Parzyszek2016-05-061-2/+24
| | | | | | | | | | | In a case like J2_callr <ga:@foo>, %R0<imp-use>, ... R0<def> = ... the anti-dependency on R0 cannot be ignored and the two instructions cannot be packetized together, since if they were, the assignment to R0 would take place before the call. llvm-svn: 268776
* [GVN] Handle unordered atomics in cross block FREPhilip Reames2016-05-062-5/+60
| | | | | | You'll note there are essentially no code changes here. Cross block FRE heavily reuses code from the block local FRE. All of the tricky parts were done as part of the previous patch and the refactoring that removed the original code duplication. llvm-svn: 268775
* SDAG: Don't leave dangling dead nodes after SelectCodeCommonJustin Bogner2016-05-061-1/+3
| | | | | | | Relying on the caller to clean up after we've replaced all uses of a node won't work when we've migrated to the `void Select(...)` API. llvm-svn: 268774
* The associated PR for this test was PR27135 not PR27132.Eric Christopher2016-05-061-2/+2
| | | | llvm-svn: 268772
* [X86] Get rid of X32_NOREX_ADDR_ACCESS register class.Quentin Colombet2016-05-062-4/+1
| | | | | | | According to H.J. Lu <hjl.tools@gmail.com>, this register class is never used. llvm-svn: 268771
* [GVN] Do local FRE for unordered atomic loadsPhilip Reames2016-05-062-4/+251
| | | | | | | | | | This patch is the first in a small series teaching GVN to optimize unordered loads aggressively. This change just handles block local FRE because that's the simplest thing which lets me test MDA, and the AvailableValue pieces. Somewhat suprisingly, MDA appears fine and only a couple of small changes are needed in GVN. Once this is in, I'll tackle non-local FRE and PRE. The former looks like a natural extension of this, the later will require a couple of minor changes. Differential Revision: http://reviews.llvm.org/D19440 llvm-svn: 268770
* Tweak the ThinLTO pass pipelineMehdi Amini2016-05-061-17/+7
| | | | | | | | | | | | | | | | | | | | | Summary: The original ThinLTO pipeline was derived from some work I did tuning FullLTO on the test suite and SPEC. This patch reduces the amount of work done in the "linker phase" of the build, and extend the function simplifications passes performed during the "compile phase". This helps the build time by reducing the IR as much as possible during the compile phase and limiting the work to be performed during the "link phase", while keeping the performance "on par" with the existing pipeline. Reviewers: tejohnson Subscribers: llvm-commits, joker.eph Differential Revision: http://reviews.llvm.org/D19773 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 268769
* [SimplifyCFG] propagate branch metadata when creating select (retry r268550 ↵Sanjay Patel2016-05-062-9/+60
| | | | | | | | | | | | | | | | / r268751 with possible fix) Retrying r268550/r268751 which were reverted at r268577/r268765 due a memory sanitizer failure. I have not been able to reproduce that failure, but I've taken another guess at fixing the problem in this version of the patch and will watch for another failure. Original commit message: Unlike earlier similar fixes, we need to recalculate the branch weights in this case. Differential Revision: http://reviews.llvm.org/D19674 llvm-svn: 268767
* revert r268751 - caused same failures on msan botSanjay Patel2016-05-062-63/+17
| | | | llvm-svn: 268765
* [CostModel][X86] Tweak 'SSE2-only' test CPU as it was only disabling SSE41 ↵Simon Pilgrim2016-05-061-1/+1
| | | | | | not SSE3/SSSE3 etc. llvm-svn: 268763
* [AMDGPU][llvm-mc] Add support for sendmsg(...) syntax.Artem Tamazov2016-05-0610-36/+559
| | | | | | | | | | | | | | | | | | | Added support for sendmsg(MSG[, OP[, STREAM_ID]]) syntax in s_sendmsg and s_sendmsghalt instructions. The syntax matches the SP3 assembler/disassembler rules. That is why implicit inputs (like M0 and EXEC) are not printed to disassembly output anymore. sendmsg(...) allows only known message types and attributes, even if literals are used instead of symbolic names. However, raw literal (without "sendmsg") still can be used, and that allows for any 16-bit value. Tests updated/added. Differential Revision: http://reviews.llvm.org/D19596 llvm-svn: 268762
* [CostModel][X86] Added ctlz/cttz undef-zero costmodel testsSimon Pilgrim2016-05-061-32/+209
| | | | llvm-svn: 268761
* [X86] Teach X86FixupBWInsts to promote MOV8rr/MOV16rr to MOV32rr.Ahmed Bougacha2016-05-0617-227/+344
| | | | | | | | Codesize is less (16) or equal (8), and we avoid partial dependencies. Differential Revision: http://reviews.llvm.org/D19999 llvm-svn: 268760
* [X86] Remove \brief in FixupBW. NFC.Ahmed Bougacha2016-05-061-13/+11
| | | | llvm-svn: 268754
* [X86] Simplify FixupBW sub_8bit_hi-related logic. NFC.Ahmed Bougacha2016-05-061-17/+12
| | | | | | | | | Instead of passing around sizes and asking for subregs, we can check the subreg indices we care about: sub_8bit_hi and sub_8bit. Differential Revision: http://reviews.llvm.org/D20006 llvm-svn: 268753
* [AArch64] Fix test to specify triple and disable post-RA scheduling.Geoff Berry2016-05-061-1/+1
| | | | | | | This should fix bot breakage caused by r268746: [AArch64] Combine callee-save and local stack SP adjustment instructions. llvm-svn: 268752
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