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* Don't use EnforceSmallerThan for EnforceVectorSubVectorTypeIs. ↵Craig Topper2014-01-251-2/+53
| | | | | | EnforceSmallerThan doesn't handle vectors quite right and should really enforce that vectors have the same number of elements. Add explicit checks for vector element count differing in EnforceVectorSubVectorTypeIs instead. This removes some unnecessary type checks in X86GenDAGISel.inc. llvm-svn: 200091
* Fix typo in commment tyep->type.Craig Topper2014-01-251-1/+1
| | | | llvm-svn: 200089
* Use isConcrete and getConcrete instead of using TypeVec directly.Craig Topper2014-01-251-3/+3
| | | | llvm-svn: 200071
* Fix EnforceSmallerThan to check !hasVectorTypes on the other type instead of ↵Craig Topper2014-01-251-1/+1
| | | | | | this type to force this type to be scalar. llvm-svn: 200070
* Remove TGValueTypes.cpp from CMakeLists.txt which I forgot to do in r200036.Craig Topper2014-01-241-1/+0
| | | | llvm-svn: 200037
* Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to ↵Craig Topper2014-01-244-137/+8
| | | | | | facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before). llvm-svn: 200036
* Fix known typosAlp Toker2014-01-244-5/+5
| | | | | | | Sweep the codebase for common typos. Includes some changes to visible function names that were misspelt. llvm-svn: 200018
* ]x86] Allow segment and address-size overrides for CMPS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+5
| | | | llvm-svn: 199806
* [x86] Allow address-size overrides for STOS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+12
| | | | llvm-svn: 199804
* [x86] Allow segment and address-size overrides for LODS[BWLQ] (PR9385)David Woodhouse2014-01-221-0/+12
| | | | llvm-svn: 199803
* Use ArrayRef to simplify some code.Craig Topper2014-01-214-38/+32
| | | | llvm-svn: 199712
* [x86] Fix disassembly of MOV16ao16 et al.David Woodhouse2014-01-202-6/+10
| | | | | | | | | | The addition of IC_OPSIZE_ADSIZE in r198759 wasn't quite complete. It also turns out to have been unnecessary. The disassembler handles the AdSize prefix for itself, and doesn't care about the difference between (e.g.) MOV8ao8 and MOB8ao8_16 definitions. So just let them coexist and don't worry about it. llvm-svn: 199654
* Allow x86 mov instructions to/from memory with absolute address to be ↵Craig Topper2014-01-161-2/+30
| | | | | | encoded and disassembled with a segment override prefix. Fixes PR16962. llvm-svn: 199364
* replace LeakSanitizerIsTurnedOffForTheCurrentProcess with ↵Kostya Serebryany2014-01-151-5/+7
| | | | | | __lsan_is_turned_off, but this time hide it under __has_feature(address_sanitizer); also include <sanitizer/lsan_interface.h> llvm-svn: 199303
* Simplify x86 disassembler table handling of when to use ↵Craig Topper2014-01-152-25/+20
| | | | | | TYPE_Rv/TYPE_R16/TYPE_R32 now that HasOpSizePrefix only means 16-bit instructions. llvm-svn: 199295
* Add the lld root to llvm-lit, so llvm-lit can be usedJoey Gouly2014-01-141-0/+5
| | | | | | to run lld tests individually. llvm-svn: 199264
* Add FPExt option to CCValAssign::LocInfo. When generating calling-conventionLang Hames2014-01-141-7/+12
| | | | | | | | | | promotion code, Tablegen will now select FPExt for floating point promotions (previously it had returned AExt, which is not valid for floating point types). Any out-of-tree targets that were relying on AExt being returned for FP promotions will need to update their code check for FPExt instead. llvm-svn: 199252
* Remove stray comma in enum to satisfy -Wpedantic.Craig Topper2014-01-141-1/+1
| | | | llvm-svn: 199194
* Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix ↵Craig Topper2014-01-141-17/+36
| | | | | | | | and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode. This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke. llvm-svn: 199193
* AVX-512: Embedded Rounding Control - encoding and printingElena Demikhovsky2014-01-131-2/+3
| | | | | | Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC. llvm-svn: 199102
* lit: Provide source locations in cfg files with older Python versionsAlp Toker2014-01-111-7/+8
| | | | | | | | | This commit prospectively brings the benefits of r198766 to older supported Python versions (2.5+). Tested with Python 2.6, 2.7, 3.1 and 3.3 (!) llvm-svn: 199009
* lit: execfile() isn't present in Python 3.3Alp Toker2014-01-111-9/+8
| | | | | | | | | | | | On the other hand, exec(compile()) doesn't work in older Python versions in the 2.x series. This commit introduces exec(compile()) with a fallback to plain exec(). That'll hopefully hit the sweet spot in terms of version support. Followup to r198766 which added enhanced source locations for lit cfg parsing. llvm-svn: 199006
* Constant propagate MachineInstrClassName.Roman Divacky2014-01-101-3/+1
| | | | llvm-svn: 198969
* All backends use MC now.Rafael Espindola2014-01-101-5/+1
| | | | llvm-svn: 198959
* Sink add_llvm_library(gtest_main) to UnitTestMain/CMakeLists.txt.NAKAMURA Takumi2014-01-102-3/+4
| | | | llvm-svn: 198933
* reapply r198858: Disable LeakSanitizer in TableGen binaries, see PR18325; ↵Kostya Serebryany2014-01-101-0/+7
| | | | | | this time LeakSanitizerIsTurnedOffForTheCurrentProcess is used instead of __lsan_is_turned_off llvm-svn: 198922
* Revert "Disable LeakSanitizer in TableGen binaries, see PR18325"Alp Toker2014-01-091-7/+0
| | | | | | | | | | | To declare or define reserved identifers is undefined behaviour in standard C++. This needs to be addressed in compiler-rt before it can be used in LLVM. See the list discussion for details. This reverts commit r198858. llvm-svn: 198884
* Disable LeakSanitizer in TableGen binaries, see PR18325Kostya Serebryany2014-01-091-0/+7
| | | | llvm-svn: 198858
* lit: Provide file location in cfg error messagesAlp Toker2014-01-081-9/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | Python doesn't do a good job at diagnosing string exec() so use execfile() where available. This should be a timesaver when trying to get to the bottom of build bot failures. Before: File "llvm/utils/lit/lit/TestingConfig.py", line 93, in load_from_path exec("exec data in cfg_globals") File "<string>", line 1, in <module> File "<string>", line 194, in <module> NameError: name 'typo' is not defined After: File "llvm/utils/lit/lit/TestingConfig.py", line 95, in load_from_path execfile(path, cfg_globals) File "clang/test/lit.cfg", line 194, in <module> typo ^~~~ NameError: name 'typo' is not defined llvm-svn: 198766
* [x86] Fix MOV8ao8 et al for 16-bit mode, fix up disassembler to understandDavid Woodhouse2014-01-082-1/+6
| | | | | | | | | | It seems there is no separate instruction class for having AdSize *and* OpSize bits set, which is required in order to disambiguate between all these instructions. So add that to the disassembler. Hm, perhaps we do need an AdSize16 bit after all? llvm-svn: 198759
* The rest of r198588. Remove SegOvrBits from X86 TSFlags since they weren't ↵Craig Topper2014-01-062-9/+0
| | | | | | being used. llvm-svn: 198589
* Use patterns to remove some duplicate instructions.Craig Topper2014-01-051-3/+1
| | | | llvm-svn: 198550
* Fix encoding for PUSH64i16. Add In64BitMode Predicate. Remove disassembler hack.Craig Topper2014-01-051-2/+1
| | | | llvm-svn: 198547
* Remove no longer needed x86 disassembler hack.Craig Topper2014-01-051-6/+0
| | | | llvm-svn: 198546
* Mark x86 _alt instructions as AsmParserOnly so they will be omitted from ↵Craig Topper2014-01-051-2/+1
| | | | | | disassembler without string matches. llvm-svn: 198545
* Use new ForceDisassemble flag on the 2-byte forms of INC/DEC for 32-bit mode ↵Craig Topper2014-01-051-3/+1
| | | | | | and remove disassmbler table emitter hack. llvm-svn: 198544
* Add a new x86 specific instruction flag to force some isCodeGenOnly ↵Craig Topper2014-01-052-2/+5
| | | | | | instructions to go through to the disassembler tables without resorting to string matches. Apply flag to all _REV instructions. llvm-svn: 198543
* Mark the 64-bit x86 push/pop instructions as In64BitMode. Mark the ↵Craig Topper2014-01-051-3/+0
| | | | | | corresponding 32-bit versions with the same encodings Not64BitMode. Remove hack from tablegen disassembler table emitter. Fix bad test. llvm-svn: 198530
* Don't use PrintFatalError(which calls exit) for 'Primary decode conflict'. ↵Craig Topper2014-01-051-3/+4
| | | | | | Just skip emitting the table. This way the main function will delete the output file instead of it remaining empty and confusing dependency checks if build is invoked a second time. llvm-svn: 198529
* Tag x86 move to/from debug/control registers with Not64BitMode/In64BitMode. ↵Craig Topper2014-01-041-2/+1
| | | | | | Remove disassembler hack. llvm-svn: 198515
* Remove JMP64pcrel32 (jmpq ). There are no tests for it. I'm pretty sure it ↵Craig Topper2014-01-041-2/+1
| | | | | | won't be emitted correctly since it was set to NoImm. And I can't prove that gas accepts 'jmpq' with an immediate either. Remove the special case for it from the disassembler table generator. llvm-svn: 198475
* FileCheck: Print a nice error message for missing closing ']' in regex vars.Adrian Prantl2014-01-031-4/+9
| | | | llvm-svn: 198449
* [TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResultsHal Finkel2014-01-021-0/+3
| | | | | | | | | | | | A ValueType in a pattern dag is a type cast, and GetNumNodeResults should handle it (the type cast has only one result). This comes up, for example, during the type checking of pattern fragments, for example, AArch64's Neon_combine_2d fragment is: dag Operands = (ops node:$Rm, node:$Rn); dag Fragment = (v2f64 (concat_vectors (v1f64 node:$Rm), (v1f64 node:$Rn))); llvm-svn: 198347
* Mark REX64_PREFIX as In64BitMode, remove hack from X86RecognizableInstr.Craig Topper2014-01-021-1/+0
| | | | llvm-svn: 198336
* Remove unused HasFROperands field from disassembler.Craig Topper2014-01-022-17/+0
| | | | llvm-svn: 198332
* Mark PUSHFS64/PUSHGS64/POPFS64/POPGS64 as In64BitMode and remove the hack ↵Craig Topper2014-01-021-4/+0
| | | | | | from the disassembler table builder. llvm-svn: 198327
* Remove unnecessary stirng comparison from disassembler.Craig Topper2014-01-021-1/+0
| | | | llvm-svn: 198325
* Mark all x86 Int_ and _Int patterns as isCodeGenOnly so the disassembler ↵Craig Topper2014-01-021-4/+0
| | | | | | table builder doesn't need to string match them to exclude them. llvm-svn: 198323
* Remove unused function argument.Craig Topper2014-01-022-5/+3
| | | | llvm-svn: 198291
* Remove modifierType/Base from X86 disassembler tables as they are no longer ↵Craig Topper2014-01-013-28/+0
| | | | | | used. Removes ~11.5K from static tables. llvm-svn: 198284
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