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* [lit] - Allow 1 test to report multiple micro-test results to provide ↵Brian Homerding2018-03-137-0/+201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | support for microbenchmarks. Summary: These changes are to allow to a Result object to have nested Result objects in order to support microbenchmarks. Currently lit is restricted to reporting one result object for one test, this change provides support tests that want to report individual timings for individual kernels. This revision is the result of the discussions in https://reviews.llvm.org/D32272#794759, https://reviews.llvm.org/D37421#f8003b27 and https://reviews.llvm.org/D38496. It is a separation of the changes purposed in https://reviews.llvm.org/D40077. This change will enable adding LCALS (Livermore Compiler Analysis Loop Suite) collection of loop kernels to the llvm test suite using the google benchmark library (https://reviews.llvm.org/D43319) with tracking of individual kernel timings. Previously microbenchmarks had been handled by using macros to section groups of microbenchmarks together and build many executables while still getting a grouped timing (MultiSource/TSVC). Recently the google benchmark library was added to the test suite and utilized with a litsupport plugin. However the limitation of 1 test 1 result limited its use to passing a runtime option to run only 1 microbenchmark with several hand written tests (MicroBenchmarks/XRay). This runs the same executable many times with different hand-written tests. I will update the litsupport plugin to utilize the new functionality (https://reviews.llvm.org/D43316). These changes allow lit to report micro test results if desired in order to get many precise timing results from 1 run of 1 test executable. Reviewers: MatzeB, hfinkel, rengolin, delcypher Differential Revision: https://reviews.llvm.org/D43314 llvm-svn: 327422
* update_mir_test_checks: Fix handling of IR input after r326284Justin Bogner2018-03-121-2/+2
| | | | llvm-svn: 327305
* [X86] Add all of the MRM_C0-MRM_FF forms to the switch in ↵Craig Topper2018-03-121-27/+20
| | | | | | | | | | RecognizableInstr::emitInstructionSpecifier. NFC Remove the special casing for MRM_F8 by using HANDLE_OPTIONAL. This should be NFC as the forms that were missing aren't used by any instructions today. They exist in the enum so that we didn't have to put them in one at a time when instructions are added. But looks like we failed here. llvm-svn: 327298
* utils: add a helper class to lit for captured substitutionsSaleem Abdulrasool2018-03-091-0/+19
| | | | | | | | | On Windows, if the substitution contains a back reference, it would removed due to the replacement of the escape character in lit. Create a helper class to avoid this which will simply ignore the replacement and mark the substitution as having capture groups being referenced. llvm-svn: 327082
* merge-request.sh: Update 6.0 metabug for 6.0.1Tom Stellard2018-03-081-1/+1
| | | | llvm-svn: 327024
* [MCSchedule] Always generate processor resource names.Andrea Di Biagio2018-03-081-2/+2
| | | | | | | | | | | | With this patch, the tablegen 'SubtargetEmitter' always generates processor resource names. The impact of this patch on the code size of other llvm tools is small. I have observed an average increase of 0.03% in code size when doing a release build of LLVM (on windows, using MSVC) with all the default backends. This change is done in preparation for the upcoming llvm-mca patch. llvm-svn: 326993
* [WebAssembly] Add except_ref as a first-class typeHeejin Ahn2018-03-081-0/+1
| | | | | | | | | | | | Summary: Add except_ref as a first-class type, according to the [[https://github.com/WebAssembly/exception-handling/blob/master/proposals/Level-1.md | Level 1 exception handling proposal ]]. Reviewers: dschuff Subscribers: jfb, sbc100, llvm-commits Differential Revision: https://reviews.llvm.org/D43706 llvm-svn: 326985
* Add attributes and fix some keywords in llvm-mode.elFangrui Song2018-03-081-5/+23
| | | | | | | | | | | | Reviewers: rafael, echristo Reviewed By: echristo Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44135 llvm-svn: 326978
* TableGen: Use DefInit::getDef() instead of the type's getRecord()Nicolai Haehnle2018-03-051-14/+11
| | | | | | | | | | | The former simply makes more sense: we want to access the data here in the backend, not information about the type. More importantly, removing users of RecordRecTy::getRecord() allows us more freedom to refactor the frontend. Change-Id: Iee8905fd22cdb9b11c42ca03246c03d8fe4dd77f llvm-svn: 326699
* [utils] Add utils/update_cc_test_checks.pyFangrui Song2018-03-023-3/+251
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A utility to update LLVM IR in C/C++ FileCheck test files. Example RUN lines in .c/.cc test files: // RUN: %clang -S -Os -DXX %s -o - | FileCheck %s // RUN: %clangxx -S -Os %s -o - | FileCheck -check-prefix=IR %s Usage: % utils/update_cc_test_checks.py --llvm-bin=release/bin test/a.cc % utils/update_cc_test_checks.py --c-index-test=release/bin/c-index-test --clang=release/bin/clang /tmp/c/a.cc // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang -emit-llvm -S -Os -DXX %s -o - | FileCheck -check-prefix=AA %s // RUN: %clangxx -emit-llvm -S -Os %s -o - | FileCheck -check-prefix=BB %s using T = #ifdef XX int __attribute__((vector_size(16))) #else short __attribute__((vector_size(16))) #endif ; // AA-LABEL: _Z3fooDv4_i: // AA: entry: // AA-NEXT: %add = shl <4 x i32> %a, <i32 1, i32 1, i32 1, i32 1> // AA-NEXT: ret <4 x i32> %add // // BB-LABEL: _Z3fooDv8_s: // BB: entry: // BB-NEXT: %add = shl <8 x i16> %a, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1> // BB-NEXT: ret <8 x i16> %add T foo(T a) { return a + a; } Differential Revision: https://reviews.llvm.org/D42712 llvm-svn: 326591
* Losen time contraint to accommodate system loadsLei Huang2018-02-281-1/+1
| | | | llvm-svn: 326359
* update_mir_test_checks: Use the regexes from UpdateTestChecks.commonJustin Bogner2018-02-282-18/+17
| | | | | | | | | Some of the update_*_test_checks regexes have been moved into a library, so we might as well use them in update_mir_test_checks. Also includes minor bugfixes to the regexes that are there so we don't regress update_mir_test_checks llvm-svn: 326288
* update_mir_test_checks: Drop support for vreg block checksJustin Bogner2018-02-281-24/+9
| | | | | | | | | | Since vregs are printed in the instruction stream now, checking the vreg block is always redundant. Remove the temporary feature that allowed us to do that. This reverts r316134 llvm-svn: 326284
* Revert r326092: [gtest] Add PrintTo overload for StringRef.Ilya Biryukov2018-02-261-13/+0
| | | | | | | | | It seems to break the following buildbot: http://lab.llvm.org:8011/builders/sanitizer-windows/builds/24729 Will resubmit after investigating and fixing it. llvm-svn: 326096
* [gtest] Add PrintTo overload for StringRef.Ilya Biryukov2018-02-261-0/+13
| | | | | | | | | | | | | | | | Summary: It was printed using code for generic containers before, resulting in unreadable output. Reviewers: sammccall, labath Reviewed By: sammccall, labath Subscribers: labath, zturner, llvm-commits Differential Revision: https://reviews.llvm.org/D43330 llvm-svn: 326092
* Shrink various scheduling tables by using narrower types.Benjamin Kramer2018-02-231-7/+12
| | | | | | 16 bits ought to be enough for everyone. This shrinks clang by ~1MB. llvm-svn: 325941
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-233-3/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Add a target option AllowRegisterRenaming that is used to opt in to post-register-allocation renaming of registers. This is set to 0 by default, which causes the hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq fields of all opcodes to be set to 1, causing MachineOperand::isRenamable to always return false. Set the AllowRegisterRenaming flag to 1 for all in-tree targets that have lit tests that were effected by enabling COPY forwarding in MachineCopyPropagation (AArch64, AMDGPU, ARM, Hexagon, Mips, PowerPC, RISCV, Sparc, SystemZ and X86). Add some more comments describing the semantics of the MachineOperand::isRenamable function and how it is set and maintained. Change isRenamable to check the operand's opcode hasExtraSrcRegAllocReq/hasExtraDstRegAllocReq bit directly instead of relying on it being consistently reflected in the IsRenamable bit setting. Clear the IsRenamable bit when changing an operand's register value. Remove target code that was clearing the IsRenamable bit when changing registers/opcodes now that this is done conservatively by default. Change setting of hasExtraSrcRegAllocReq in AMDGPU target to be done in one place covering all opcodes that have constant pipe read limit restrictions. Reviewers: qcolombet, MatzeB Subscribers: aemerson, arsenm, jyknight, mcrosier, sdardis, nhaehnle, javed.absar, tpr, arichardson, kristof.beyls, kbarton, fedor.sergeev, asb, rbar, johnrusso, simoncook, jordy.potman.lists, apazos, sabuasal, niosHD, escha, nemanjai, llvm-commits Differential Revision: https://reviews.llvm.org/D43042 llvm-svn: 325931
* Resubmit r325107 (case folding DJB hash)Pavel Labath2018-02-211-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The issue was that the has function was generating different results depending on the signedness of char on the host platform. This commit fixes the issue by explicitly using an unsigned char type to prevent sign extension and adds some extra tests. The original commit message was: This patch implements a variant of the DJB hash function which folds the input according to the algorithm in the Dwarf 5 specification (Section 6.1.1.4.5), which in turn references the Unicode Standard (Section 5.18, "Case Mappings"). To achieve this, I have added a llvm::sys::unicode::foldCharSimple function, which performs this mapping. The implementation of this function was generated from the CaseMatching.txt file from the Unicode spec using a python script (which is also included in this patch). The script tries to optimize the function by coalescing adjecant mappings with the same shift and stride (terms I made up). Theoretically, it could be made a bit smarter and merge adjecant blocks that were interrupted by only one or two characters with exceptional mapping, but this would save only a couple of branches, while it would greatly complicate the implementation, so I deemed it was not worth it. Since we assume that the vast majority of the input characters will be US-ASCII, the folding hash function has a fast-path for handling these, and only whips out the full decode+fold+encode logic if we encounter a character outside of this range. It might be possible to implement the folding directly on utf8 sequences, but this would also bring a lot of complexity for the few cases where we will actually need to process non-ascii characters. Reviewers: JDevlieghere, aprantl, probinson, dblaikie Subscribers: mgorny, hintonda, echristo, clayborg, vleschuk, llvm-commits Differential Revision: https://reviews.llvm.org/D42740 llvm-svn: 325732
* [vim] Recognize more FileCheck commentsMikhail Maltsev2018-02-201-0/+1
| | | | | | | | | | | | | | | | | Summary: Currently vim syntax highlighting recognizes 'CHECK:' as a special comment, but not CHECK-DAG, CHECK-NOT and other CHECKs. This patch adds rules for these comments. Reviewers: chandlerc, compnerd, rogfer01 Reviewed By: rogfer01 Subscribers: rogfer01, llvm-commits Differential Revision: https://reviews.llvm.org/D43289 llvm-svn: 325599
* Fix signed/unsigned comparison warning in AsmGenMatcher generated code. NFCI.Simon Pilgrim2018-02-171-4/+4
| | | | llvm-svn: 325428
* Remove "--full-shutdown" and instead use an environment variable LLD_IN_TEST.Rui Ueyama2018-02-161-3/+0
| | | | | | | | | | | | | | | | | We are running lld tests with "--full-shutdown" option because we don't want to call _exit() in lld if it is running tests. Regular shutdown is needed for leak sanitizer. This patch changes the way how we tell lld that it is running tests. Now "--full-shutdown" is removed, and LLD_IN_TEST environment variable is used instead. This patch enables full shutdown on all ports, e.g. ELF, COFF and wasm. Previously, we enabled it only for ELF. Differential Revision: https://reviews.llvm.org/D43410 llvm-svn: 325413
* [GISel]: Make GlobalISelEmitter rule prioritization compatible with selectionDAGAditya Nandakumar2018-02-161-0/+12
| | | | | | | | | | | | This patch changes GlobalISelEmitter to rank patterns similar to how the DAG does it (ie it computes a score for a pattern and adds the added complexity to it). This is so that the decision tree for GISelSelector remains compatible with that of SelectionDAG. https://reviews.llvm.org/D43270 llvm-svn: 325401
* Make sure we invoke ld64.lld and ld-wasm in the build directory.Rui Ueyama2018-02-161-1/+1
| | | | llvm-svn: 325397
* [X86][3DNOW] Teach decoder about AMD 3DNow! instrsRafael Auler2018-02-153-21/+30
| | | | | | | | | | | | | | | | | | | Summary: This patch makes the decoder understand old AMD 3DNow! instructions that have never been properly supported in the X86 disassembler, despite being supported in other subsystems. Hopefully this should make the X86 decoder more complete with respect to binaries containing legacy code. Reviewers: craig.topper Reviewed By: craig.topper Subscribers: llvm-commits, maksfb, bruno Differential Revision: https://reviews.llvm.org/D43311 llvm-svn: 325295
* Revert r325107 (case folding DJB hash) and subsequent build fixPavel Labath2018-02-141-137/+0
| | | | | | | The "knownValuesUnicode" test in the patch fails on ppc64 and arm64 bots. Reverting while I investigate. llvm-svn: 325115
* Implement a case-folding version of DJB hashPavel Labath2018-02-141-0/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This patch implements a variant of the DJB hash function which folds the input according to the algorithm in the Dwarf 5 specification (Section 6.1.1.4.5), which in turn references the Unicode Standard (Section 5.18, "Case Mappings"). To achieve this, I have added a llvm::sys::unicode::foldCharSimple function, which performs this mapping. The implementation of this function was generated from the CaseMatching.txt file from the Unicode spec using a python script (which is also included in this patch). The script tries to optimize the function by coalescing adjecant mappings with the same shift and stride (terms I made up). Theoretically, it could be made a bit smarter and merge adjecant blocks that were interrupted by only one or two characters with exceptional mapping, but this would save only a couple of branches, while it would greatly complicate the implementation, so I deemed it was not worth it. Since we assume that the vast majority of the input characters will be US-ASCII, the folding hash function has a fast-path for handling these, and only whips out the full decode+fold+encode logic if we encounter a character outside of this range. It might be possible to implement the folding directly on utf8 sequences, but this would also bring a lot of complexity for the few cases where we will actually need to process non-ascii characters. Reviewers: JDevlieghere, aprantl, probinson, dblaikie Subscribers: mgorny, hintonda, echristo, clayborg, vleschuk, llvm-commits Differential Revision: https://reviews.llvm.org/D42740 llvm-svn: 325107
* [X86] Teach EVEX->VEX pass to turn VRNDSCALE into VROUND when bits 7:4 of ↵Craig Topper2018-02-131-1/+19
| | | | | | | | | | the immediate are 0 and the regular EVEX->VEX checks pass. Bits 7:4 control the scale part of the operation. If the scale is 0 the behavior is equivalent to VROUND. Fixes PR36246 llvm-svn: 324985
* [gtest] Support raw_ostream printing functions more comprehensively.Sam McCall2018-02-123-41/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: These are functions like operator<<(raw_ostream&, Foo). Previously these were only supported for messages. In the assertion EXPECT_EQ(A, B) << C; the local modifications would explicitly try to use raw_ostream printing for C. However A and B would look for a std::ostream printing function, and often fall back to gtest's default "168 byte object <00 01 FE 42 ...>". This patch pulls out the raw_ostream support into a new header under `custom/`. I changed the mechanism: instead of a convertible stream, we wrap the printed value in a proxy object to allow it to be sent to a std::ostream. I think the new way is clearer. I also changed the policy: we prefer raw_ostream printers over std::ostream ones. This is because the fallback printers are defined using std::ostream, while all the raw_ostream printers should be "good". Reviewers: ilya-biryukov, chandlerc Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43091 llvm-svn: 324876
* [utils] Refactor utils/update_{,llc_}test_checks.py to share more codeFangrui Song2018-02-104-166/+190
| | | | | | | | | | | | | | Summary: This revision refactors 1. parser 2. CHECK line adder of utils/update_{,llc_}test_checks.py so that thir functionality can be re-used by other utility scripts (e.g. D42712) Reviewers: asb, craig.topper, RKSimon, echristo Subscribers: llvm-commits, spatel Differential Revision: https://reviews.llvm.org/D42805 llvm-svn: 324803
* [TargetSchedule] Fix r324582.Clement Courbet2018-02-091-1/+1
| | | | | | | Increment was using the wrong NumUnits (the one from the ProcResGroup and not the subunit). llvm-svn: 324727
* [lit] Pass CLANG env var to testing configurationVictor Leschuk2018-02-091-1/+1
| | | | | | | | Allow CLANG environment variable be copied into the testing configuration and proper support testing with a custom path to the clang executable. Signed-off-by: Vladimir Vereschaka <vvereschaka@accesssoftek.com> llvm-svn: 324706
* Fix missing field initializer warning in TableGen SubtargetEmitterDavid Blaikie2018-02-081-3/+4
| | | | llvm-svn: 324643
* [TargetSchedule] Expose sub-units of a ProcResGroup in MCProcResourceDesc.Clement Courbet2018-02-081-3/+39
| | | | | | | | | | | | | | | | | | Summary: Right now using a ProcResource automatically counts as usage of all super ProcResGroups. All this is done during codegen, so there is no way for schedulers to get this information at runtime. This adds the information of which individual ProcRes units are contained in a ProcResGroup in MCProcResourceDesc. Reviewers: gchatelet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D43023 llvm-svn: 324582
* [CodeGenSchedule][NFC] Always emit ProcResourceUnits.Clement Courbet2018-02-051-0/+8
| | | | | | | | | | | | | | | | | Summary: Right now only the ProcResourceUnits that are directly referenced by instructions are emitted. This change emits all of them, so that analysis passes can use the information. This has no functional impact. It typically adds a few entries (e.g. 4 for X86/haswell) to the generated ProcRes table. Reviewers: gchatelet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42903 llvm-svn: 324228
* [TableGen][AsmMatcherEmitter] Fix tied-constraint checking for InstAliasesSander de Smalen2018-02-041-154/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a bit of a reimplementation the work done in https://reviews.llvm.org/D41446, since that patch only really works for tied operands of instructions, not aliases. Instead of checking the constraints based on the matched instruction's opcode, this patch uses the match-info's convert function to check the operand constraints for that specific instruction/alias. This is based on the matched operands for the instruction, not the resulting opcode of the MCInst. This patch adds the following enum/table to the *GenAsmMatcher.inc file: enum { Tie0_1_1, Tie0_1_2, Tie0_1_5, ... }; const char TiedAsmOperandTable[][3] = { /* Tie0_1_1 */ { 0, 1, 1 }, /* Tie0_1_2 */ { 0, 1, 2 }, /* Tie0_1_5 */ { 0, 1, 5 }, ... }; And it is referenced directly in the ConversionTable, like this: static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = { ... { CVT_95_addRegOperands, 1, CVT_95_addRegOperands, 2, CVT_Tied, Tie0_1_5, CVT_95_addRegOperands, 6, CVT_Done }, ... The Tie0_1_5 (and corresponding table) encodes that: * Result operand 0 is the operand to copy (which is e.g. done when building up the operands to the MCInst in convertToMCInst()) * Asm operands 1 and 5 should be the same operands (which is checked in checkAsmTiedOperandConstraints()). Reviewers: olista01, rengolin, fhahn, craig.topper, echristo, apazos, dsanders Reviewed By: olista01 Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42293 llvm-svn: 324196
* Make utils/UpdateTestChecks/common.py Python 2/3 compatible and fix print ↵Fangrui Song2018-02-021-6/+9
| | | | | | | | | | statements. Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42674 llvm-svn: 324104
* [utils] De-duplicate utils/update_{llc_,}test_checks.pyFangrui Song2018-01-305-333/+296
| | | | | | | | Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D42654 llvm-svn: 323718
* Fix some regular expressions in llvm-mode.el.Rafael Espindola2018-01-291-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | In some cases it was using "\" unnecessarily. In another case it needed an additional "\" to properly indicate a numbered sub-match. Make comment-start buffer-local in llvm-mode.el llvm-mode was setting comment-start globally. However, it is better to only set it locally in the current buffer. Don't use purecopy in llvm-mode.el There's no reason to use purecopy in llvm-mode.el. purecopy is only needed for files that are dumped in emacs. Add a version header to llvm-mode.el Adding a version header to llvm-mode.el allows it to be installed by the Emacs package manager. There are not many requirements on the version number; however it is useful to users to bump it when something significant changes. Here I've chosen just to start at 1.0. Patch by Tom Tromey! llvm-svn: 323705
* [ARM][GISel] PR35965 Constrain RegClasses of nested instructions built from ↵Daniel Sanders2018-01-291-6/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Dst Pattern Summary: Apparently, we missed on constraining register classes of VReg-operands of all the instructions built from a destination pattern but the root (top-level) one. The issue exposed itself while selecting G_FPTOSI for armv7: the corresponding pattern generates VTOSIZS wrapped into COPY_TO_REGCLASS, so top-level COPY_TO_REGCLASS gets properly constrained, while nested VTOSIZS (or rather its destination virtual register to be exact) does not. Fixing this by issuing GIR_ConstrainSelectedInstOperands for every nested GIR_BuildMI. https://bugs.llvm.org/show_bug.cgi?id=35965 rdar://problem/36886530 Patch by Roman Tereshin Reviewers: dsanders, qcolombet, rovka, bogner, aditya_nandakumar, volkan Reviewed By: dsanders, qcolombet, rovka Subscribers: aemerson, javed.absar, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D42565 llvm-svn: 323692
* [NFC] fix trivial typos in comments and documentsHiroshi Inoue2018-01-291-1/+1
| | | | | | "to to" -> "to" llvm-svn: 323628
* update_mir_test_checks: Accept "." in function namesJustin Bogner2018-01-261-1/+1
| | | | llvm-svn: 323573
* [TableGen][NFC]Remove dead variable.Clement Courbet2018-01-261-1/+0
| | | | llvm-svn: 323525
* Update build_llvm_package.batHans Wennborg2018-01-251-5/+9
| | | | | | | | | | | | | | I moved to a new machine and had to adjust a few things: - Use %USERNAME% instead of %USER% (not sure why %USER% didn't work anymore) - Update paths for using Python 3.6 instead of 3.5 - Skip building OpenMP which seems broken on Windows - Work around new vsdevcmd.bat changing paths: https://developercommunity.visualstudio.com/content/problem/26780/vsdevcmdbat-changes-the-current-working-directory.html - Build stage-0 compiler with MinSizeRel to work around VS 2017 bug: https://developercommunity.visualstudio.com/content/problem/139043/miscompile-in-trivial-c-program-with-155-preview-2.html llvm-svn: 323427
* [GlobalISel][TableGen] Fix the statistics for emitted pattersVolkan Keles2018-01-251-3/+3
| | | | | | | | | Collected statistics for the number of patterns emitted can be incorrect because rules can be grouped if OptimizeMatchTable is enabled. Increase the counter in RuleMatcher::emit(...) to avoid that. llvm-svn: 323391
* [TableGen] Add a way of getting the number of generic opcodes without ↵Benjamin Kramer2018-01-243-9/+18
| | | | | | | | | | including modular CodeGen headers. This is a bit of a hack, but removes a cycle that broke modular builds of LLVM. Of course the cycle is still there in form of a dependency on the .def file. llvm-svn: 323383
* Fix typos of occurred and occurrenceMalcolm Parsons2018-01-243-4/+4
| | | | llvm-svn: 323318
* [NFC] fix trivial typos in commentsHiroshi Inoue2018-01-241-1/+1
| | | | | | "the the" -> "the" llvm-svn: 323302
* [TableGen] Optimize the regex search.Benjamin Kramer2018-01-231-20/+76
| | | | | | | | | | | | | | | | llvm::Regex is still the slowest regex engine on earth, running it over all instructions on X86 takes a while. Extract a prefix and use a binary search to reduce the search space before we resort to regex matching. There are a couple of caveats here: - The generic opcodes are outside of the sorted enum. They're handled in an extra loop. - If there's a top-level bar we can't use the prefix trick. - We bail on top-level ?. This could be handled, but it's rare. This brings the time to generate X86GenInstrInfo.inc from 21s to 4.7s on my machine. llvm-svn: 323277
* Add a utility to reduce GlobalISel testsVolkan Keles2018-01-231-0/+146
| | | | | | | | | | | | | | Summary: This patch adds a script to reduce GlobalISel failures using bugpoint. Reviewers: bogner Reviewed By: bogner Subscribers: MatzeB, qcolombet, rovka, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D41876 llvm-svn: 323248
* update_mir_test_checks: Improve the check for LLVM IR in MIR filesJustin Bogner2018-01-231-1/+1
| | | | | | | | | The LLVM IR section of a MIR document can start with "--- |" rather than just "---", because "|" is a sigil for a freeform document in YAML. We need to handle this so that we don't try to add check lines to the LLVM IR functions in a MIR file. llvm-svn: 323178
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