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* lit: Fix infinite recursion when an out-of-tree test root is located inside ↵Daniel Dunbar2013-04-125-9/+47
| | | | | | the source test root. llvm-svn: 179402
* lit: Add a test for discovery w/ test_exec_root (out-of-tree test root).Daniel Dunbar2013-04-123-9/+60
| | | | llvm-svn: 179401
* Add CLAC/STAC instruction encoding/decoding supportMichael Liao2013-04-111-17/+19
| | | | | | | As these two instructions in AVX extension are privileged instructions for special purpose, it's only expected to be used in inlined assembly. llvm-svn: 179266
* lit: Don't descend into .git directories during test discovery.Daniel Dunbar2013-04-111-1/+1
| | | | llvm-svn: 179249
* lit: Shorten a metavar to make --help look nicer.Daniel Dunbar2013-04-111-1/+1
| | | | llvm-svn: 179248
* lit: Add a test for discovery when exact test names are given.Daniel Dunbar2013-04-111-0/+15
| | | | llvm-svn: 179247
* lit: Add a trivial test of the basic progress bar.Daniel Dunbar2013-04-116-0/+22
| | | | llvm-svn: 179243
* Move yaml2obj to tools too.Rafael Espindola2013-04-054-733/+1
| | | | llvm-svn: 178904
* Use ScalarBitSetTraits.Rafael Espindola2013-04-051-83/+84
| | | | | | What was missing was were the type strong operator|. llvm-svn: 178879
* Move obj2yaml to tools to sort out make's dependencies.Rafael Espindola2013-04-056-509/+1
| | | | llvm-svn: 178835
* Build obj2yaml with configure+make.Rafael Espindola2013-04-051-1/+1
| | | | llvm-svn: 178833
* Add back parsing of header charactestics.Rafael Espindola2013-04-041-1/+37
| | | | | | | | It had been dropped during the switch to yaml::IO. Also add a test going from yaml2obj to llvm-readobj. It can be extended as we add more fields/formats to yaml2obj. llvm-svn: 178786
* Remove anonymous namespace.Rafael Espindola2013-04-031-4/+0
| | | | | | | | | | | Looks like the gcc in http://lab.llvm.org:8011/builders/clang-x86_64-darwin11-self-mingw32/ doesn't like "not external linkage": /Volumes/Macintosh_HD2/buildbots/clang-x86_64-darwin11-self-mingw32/llvm.src/include/llvm/Support/YAMLTraits.h: In instantiation of 'const bool llvm::yaml::has_SequenceMethodTraits<std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> > >::value': /Volumes/Macintosh_HD2/buildbots/clang-x86_64-darwin11-self-mingw32/llvm.src/include/llvm/Support/YAMLTraits.h:281: instantiated from 'llvm::yaml::has_SequenceTraits<std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> > >' /Volumes/Macintosh_HD2/buildbots/clang-x86_64-darwin11-self-mingw32/llvm.src/utils/yaml2obj/yaml2obj.cpp:627: instantiated from here /Volumes/Macintosh_HD2/buildbots/clang-x86_64-darwin11-self-mingw32/llvm.src/include/llvm/Support/YAMLTraits.h:243: error: 'llvm::yaml::SequenceTraits<std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> > >::size' is not a valid template argument for type 'size_t (*)(llvm::yaml::IO&, std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> >&)' because function 'static size_t llvm::yaml::SequenceTraits<std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> > >::size(llvm::yaml::IO&, std::vector<<unnamed>::COFFYAML::Relocation, std::allocator<<unnamed>::COFFYAML::Relocation> >&)' has not external linkage llvm-svn: 178600
* Use yaml::IO in yaml2obj.cpp.Rafael Espindola2013-04-021-551/+346
| | | | | | | The generic structs and specializations will be refactored when obj2yaml is changed to use yaml::IO. llvm-svn: 178593
* Fix TableGen subtarget-emitter to handle A9/Swift.Andrew Trick2013-03-291-5/+11
| | | | | | | | A9 uses itinerary classes, Swift uses RW lists. This tripped some verification when we're expanding variants. I had to refine the verification a bit. llvm-svn: 178357
* Revert r178166. According to Howard, this code is actually ok.Dan Gohman2013-03-291-3/+1
| | | | llvm-svn: 178319
* Avoid undefined behavior from passing a std::vector's own contentsDan Gohman2013-03-271-1/+3
| | | | | | in as an argument to push_back. llvm-svn: 178166
* TableGen SubtargetEmitter fix to allow A9 and Swift to coexist.Andrew Trick2013-03-262-2/+24
| | | | | | Allow variants to be defined only for some processors on a target. llvm-svn: 178074
* x86 -- add the XTEST instructionDave Zarzycki2013-03-251-8/+9
| | | | llvm-svn: 177888
* Allow types to be omitted in output patterns.Jakob Stoklund Olesen2013-03-242-0/+16
| | | | | | | | | | This syntax is now preferred: def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>; There is no reason to repeat the types in the output pattern. llvm-svn: 177844
* Allow direct value types to be used in instruction 'set' patterns.Jakob Stoklund Olesen2013-03-241-2/+24
| | | | | | | | | | | | This makes it possible to define instruction patterns like this: def LDri : F3_2<3, 0b000000, (outs IntRegs:$dst), (ins MEMri:$addr), "ld [$addr], $dst", [(set i32:$dst, (load ADDRri:$addr))]>; ~~~ llvm-svn: 177834
* Allow direct value types in pattern definitions.Jakob Stoklund Olesen2013-03-232-5/+29
| | | | | | | | | | | | | | | | | Just like register classes, value types can be used in two ways in patterns: (sext_inreg i32:$src, i16) In a named leaf node like i32:$src, the value type simply provides the type of the node directly. This simplifies type inference a lot compared to the current practice of specifiying types indirectly with register classes. As an unnamed leaf node, like i16 above, the value type represents itself as an MVT::Other immediate. llvm-svn: 177828
* Make all unnamed RegisterClass TreePatternNodes typed MVT::i32.Jakob Stoklund Olesen2013-03-232-21/+21
| | | | | | | | | | | | | | | | | | | | | A register class can appear as a leaf TreePatternNode with and without a name: (COPY_TO_REGCLASS GPR:$src, F8RC) In a named leaf node like GPR:$src, the register class provides type information for the named variable represented by the node. The TypeSet for such a node is the set of value types that the register class can represent. In an unnamed leaf node like F8RC above, the register class represents itself as a kind of immediate. Such a node has the type MVT::i32, we'll never create a virtual register representing it. This change makes it possible to remove the special handling of COPY_TO_REGCLASS in CodeGenDAGPatterns.cpp. llvm-svn: 177825
* Plug a memory leak in FileCheck when the input file is empty.Benjamin Kramer2013-03-231-6/+6
| | | | llvm-svn: 177822
* Add TableGen ctags(1) emitter and helper script.Sean Silva2013-03-215-1/+561
| | | | | | | | | | | | | | | | | | | | | To use this in conjunction with exuberant ctags to generate a single combined tags file, run tblgen first and then $ ctags --append [...] Since some identifiers have corresponding definitions in C++ code, it can be useful (if using vim) to also use cscope, and :set cscopetagorder=1 so that :tag X will preferentially select the tablegen symbol, while :cscope find g X will always find the C++ symbol. Patch by Kevin Schoedel! (a couple small formatting changes courtesy of clang-format) llvm-svn: 177682
* [lit] Avoid CRLFs in bash scripts on WindowsReid Kleckner2013-03-201-1/+4
| | | | | | | | Native Windows Python will do line ending translation by default, which we don't want in bash scripts. If we're not native Windows Python, then 'b' is ignored. llvm-svn: 177602
* Extend TableGen instruction selection matcher to improve handlingUlrich Weigand2013-03-192-11/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of complex instruction operands (e.g. address modes). Currently, if a Pat pattern creates an instruction that has a complex operand (i.e. one that consists of multiple sub-operands at the MI level), this operand must match a ComplexPattern DAG pattern with the correct number of output operands. This commit extends TableGen to alternatively allow match a complex operands against multiple separate operands at the DAG level. This allows using Pat patterns to match pre-increment nodes like pre_store (which must have separate operands at the DAG level) onto an instruction pattern that uses a multi-operand memory operand, like the following example on PowerPC (will be committed as a follow-on patch): def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst), "stwu $rS, $dst", LdStStoreUpd, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff), (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>; Here, the pair of "ptroff" and "ptrreg" operands is matched onto the complex operand "dst" of class "memri" in the "STWU" instruction. Approved by Jakob Stoklund Olesen. llvm-svn: 177428
* TableGen fix for the new machine model.Andrew Trick2013-03-181-4/+6
| | | | | | | | Properly handle cases where a group of instructions have different SchedRW lists with the same itinerary class. This was supposed to work, but I left in an early break. llvm-svn: 177317
* Extract a method.Jakob Stoklund Olesen2013-03-182-41/+42
| | | | | | | This computes the type of an instruction operand or result based on the records in the instruction's ins and outs lists. llvm-svn: 177244
* Use ArrayRef<MVT::SimpleValueType> when possible.Jakob Stoklund Olesen2013-03-176-10/+10
| | | | | | | Not passing vector references around makes it possible to use SmallVector in most places. llvm-svn: 177235
* Machine model. Allow mixed itinerary classes and SchedRW lists.Andrew Trick2013-03-163-205/+174
| | | | | | | | | | | | | We always supported a mixture of the old itinerary model and new per-operand model, but it required a level of indirection to map itinerary classes to SchedRW lists. This was done for ARM A9. Now we want to define x86 SchedRW lists, with the goal of removing its itinerary classes, but still support the itineraries in the mean time. When I original developed the model, Atom did not have itineraries, so there was no reason to expect this requirement. llvm-svn: 177226
* Add SchedRW as an Instruction field.Jakob Stoklund Olesen2013-03-151-6/+6
| | | | | | | | | | | | | Don't require instructions to inherit Sched<...>. Sometimes it is more convenient to say: let SchedRW = ... in { ... } Which is now possible. llvm-svn: 177199
* Fix r177112: Add ProcResGroup.Andrew Trick2013-03-141-1/+3
| | | | | | This is the other half of r177122 that I meant to commit at the same time. llvm-svn: 177123
* MachineModel: Add a ProcResGroup class.Andrew Trick2013-03-142-12/+92
| | | | | | | | | | | | | | | | | This allows abitrary groups of processor resources. Using something in a subset automatically counts againts the superset. Currently, this only works if the superset is also a ProcResGroup as opposed to a SuperUnit. This allows SandyBridge to be expressed naturally, which will be checked in shortly. def SBPort01 : ProcResGroup<[SBPort0, SBPort1]>; def SBPort15 : ProcResGroup<[SBPort1, SBPort5]>; def SBPort23 : ProcResGroup<[SBPort2, SBPort3]>; def SBPort015 : ProcResGroup<[SBPort0, SBPort1, SBPort5]>; llvm-svn: 177112
* lit.TestFormats.GoogleTest: Honor LitConfig.noExecute, or --no-execute were ↵NAKAMURA Takumi2013-03-131-0/+3
| | | | | | ignored. llvm-svn: 176930
* Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby2013-03-111-0/+11
| | | | | | rdar://13318048 llvm-svn: 176828
* MIsched machine model: tablegen subtarget emitter improvement.Andrew Trick2013-03-011-1/+14
| | | | | | | | Fix the way resources are counted. I'm taking some time to cleanup the way MachineScheduler handles in-order machine resources. Eventually we'll need more PPC/Atom test cases in tree. llvm-svn: 176390
* Enable syntax highlighting for reStructuredText files.Bill Wendling2013-02-281-0/+7
| | | | | | Patch by Journeyer J. Joh! llvm-svn: 176235
* [TableGen] Fix ICE on MSVC 2012 Release builds.Michael J. Spencer2013-02-261-1/+3
| | | | llvm-svn: 176125
* Unify clang/llvm attributes for asan/tsan/msan (LLVM part)Kostya Serebryany2013-02-262-5/+5
| | | | | | | | | | | | | | | | | | | These are two related changes (one in llvm, one in clang). LLVM: - rename address_safety => sanitize_address (the enum value is the same, so we preserve binary compatibility with old bitcode) - rename thread_safety => sanitize_thread - rename no_uninitialized_checks -> sanitize_memory CLANG: - add __attribute__((no_sanitize_address)) as a synonym for __attribute__((no_address_safety_analysis)) - add __attribute__((no_sanitize_thread)) - add __attribute__((no_sanitize_memory)) for S in address thread memory If -fsanitize=S is present and __attribute__((no_sanitize_S)) is not set llvm attribute sanitize_S llvm-svn: 176075
* 'Hexadecimal' has two 'a's and only one 'i'.Matt Beaumont-Gay2013-02-251-2/+2
| | | | llvm-svn: 176031
* Fix for bug 15246 -- out-of-bound error in the TableGen backend, ↵Jyotsna Verma2013-02-141-5/+4
| | | | | | CodeGenMapTable.cpp. llvm-svn: 175185
* PR14992 - Tablegen incorrectly converts ARM tLDMIA_UPD pseudo to tLDMIADavid Peixotto2013-02-131-0/+1
| | | | | | | Fixed bug in tablegen conversion when source pseudo instruction has a different number of arguments than the destination instruction. llvm-svn: 175066
* Add static cast to unsigned char whenever a character classification ↵Guy Benyei2013-02-121-1/+1
| | | | | | function is called with a signed char argument, in order to avoid assertions in Windows Debug configuration. llvm-svn: 175006
* Added 0x0D to 2-byte opcode extension table for prefetch* variantsKay Tiong Khoo2013-02-121-0/+1
| | | | | | | Fixed decode of existing 3dNow prefetchw instruction Intel is scheduled to add a compatible prefetchw (same encoding) to future CPUs llvm-svn: 174920
* [tsan/msan] adding thread_safety and uninitialized_checks attributesKostya Serebryany2013-02-112-0/+3
| | | | llvm-svn: 174864
* [lit] Add a display function for lit.Test.TestResult.Daniel Dunbar2013-02-071-0/+4
| | | | llvm-svn: 174667
* Canonicalize line endings to Linux style also when the --strict-whitespace ↵Guy Benyei2013-02-061-10/+14
| | | | | | flag is in use. This flag is supposed to affect horizontal whitespaces only. llvm-svn: 174541
* Allow targets to add custom asm operand matching logic.Jim Grosbach2013-02-061-0/+9
| | | | | | | | | | For example, ARM has several instructions with a literal '#0' immediate in the syntax that's not represented as an actual operand. The asm matcher is expected a token operand, but the parser will have created an immediate operand. This is currently handled by dedicated per-instruction C++ munging of the ParsedAsmOperand list, but will be better handled by this hook. llvm-svn: 174487
* Preprocess Apple llvmCore headers to reflect NDEBUG setting. <rdar://12568983>Bob Wilson2013-02-051-0/+10
| | | | | | | | | | If an Apple llvmCore build is done without assertions, and a client uses the llvmCore headers with assertions enabled, or vice versa, then things will break because some of the structure sizes in the API are different. Use the unifdef tool to make the headers unconditionally match the way the llvmCore libraries were built. llvm-svn: 174460
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