summaryrefslogtreecommitdiffstats
path: root/llvm/utils
Commit message (Collapse)AuthorAgeFilesLines
* Add initial support for fast isel of instructions that have inputs pinned to ↵Owen Anderson2008-08-291-19/+107
| | | | | | physical registers. llvm-svn: 55545
* Add a target callback for FastISel.Dan Gohman2008-08-281-0/+8
| | | | llvm-svn: 55512
* just a brain dump for a small toolGabor Greif2008-08-281-0/+5
| | | | | | | | | | | | that brings us to 80-col violations or tabs. Usage: visit-violations <file> At the moment it outputs editor invocations. llvm-svn: 55509
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-34/+34
| | | | | | Node to reflect semantics llvm-svn: 55504
* Add support for fast-isel of opcodes that require use of extract_subreg. ↵Owen Anderson2008-08-281-21/+43
| | | | | | Because of how extract_subreg is treated, it requires special case handling. llvm-svn: 55480
* Update a comment to reflect recent changes.Dan Gohman2008-08-271-1/+1
| | | | llvm-svn: 55418
* Basic FastISel support for floating-point constants.Dan Gohman2008-08-271-0/+13
| | | | llvm-svn: 55401
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-2/+2
| | | | llvm-svn: 55394
* Refactor a bunch of FastISelEmitter code into a helper class, andDan Gohman2008-08-262-29/+63
| | | | | | | put each major step in a separate function. This makes the high level sequence of events easier to follow. llvm-svn: 55385
* - small bug corrected: incorrect iterator type.Cedric Venet2008-08-261-2/+2
| | | | | | - fix to please VS: add a return after an assert. llvm-svn: 55380
* We need to check that the return type is correct, even in cases where we don'tOwen Anderson2008-08-261-0/+3
| | | | | | have a return type that differs from the operand types. llvm-svn: 55376
* code simplification, no functionality change.Chris Lattner2008-08-261-11/+1
| | | | llvm-svn: 55363
* stabilize more printing, this doesn't cause a problemChris Lattner2008-08-261-10/+8
| | | | | | in the example attached to PR2590, but is a problem in general. llvm-svn: 55361
* stablize SubRegsSet printing, part of PR2590Chris Lattner2008-08-261-6/+8
| | | | llvm-svn: 55360
* Stabilize 'getDwarfRegNumFull' output to not depend on random memory Chris Lattner2008-08-263-22/+25
| | | | | | orders, part of PR2590 llvm-svn: 55359
* Throw the switch to allow FastISel to emit instructions whose return types ↵Owen Anderson2008-08-261-9/+16
| | | | | | different from their inputs. Next step: adding lowering pattens in FastISel that actually use these newly available opcodes. llvm-svn: 55349
* Enhance TableGen to emit code for FastISel of opcodes with variadic return ↵Owen Anderson2008-08-261-13/+97
| | | | | | types without slowing down opcodes that are not variadic. No such opcodes are currently generated, but in theory it should be a matter of just hitting the switch. llvm-svn: 55347
* Add a RetVT parameter to emitted FastISel methods, so that we will be able ↵Owen Anderson2008-08-251-8/+14
| | | | | | | | to pass the desired return type down. This is not currently used. llvm-svn: 55345
* Deepen the map structure tablegen uses to compute FastISel patterns, in ↵Owen Anderson2008-08-251-54/+61
| | | | | | | | preparation for having patterns with return types that differ from their input types. This is not yet used. llvm-svn: 55344
* Add support for fast isel of (integer) immediate materialization pattens, ↵Owen Anderson2008-08-251-3/+6
| | | | | | | | and use them to support bitcast of constants in fast isel. llvm-svn: 55325
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-1/+1
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Add a few comments.Dan Gohman2008-08-221-0/+4
| | | | llvm-svn: 55157
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-224-48/+99
| | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. llvm-svn: 55156
* Basic fast-isel support for instructions with constant int operands.Dan Gohman2008-08-211-13/+40
| | | | llvm-svn: 55099
* Remove the code that limited FastISel to certain fixed signatures.Dan Gohman2008-08-211-19/+5
| | | | llvm-svn: 55096
* Begin making more use of the FastISelEmitter class.Dan Gohman2008-08-212-28/+28
| | | | llvm-svn: 55093
* Remove an obsolete todo comment.Dan Gohman2008-08-201-2/+0
| | | | llvm-svn: 55080
* Factor the code for determining the target-specific instructionDan Gohman2008-08-204-18/+22
| | | | | | namespace out of the isel emitters and into common code. llvm-svn: 55079
* Simplify FastISel's constructor argument list, make the FastISelDan Gohman2008-08-201-5/+3
| | | | | | | | class hold a MachineRegisterInfo member, and make the MachineBasicBlock be passed in to SelectInstructions rather than the FastISel constructor. llvm-svn: 55076
* Fix the string for MVT::isVoid.Dan Gohman2008-08-201-1/+1
| | | | llvm-svn: 55034
* For now, restrict FastISel to instructions that only involve oneDan Gohman2008-08-191-2/+6
| | | | | | register class. llvm-svn: 55008
* Factor out the code to scan an instruction's operands into aDan Gohman2008-08-191-26/+36
| | | | | | helper function. llvm-svn: 55007
* Add more comments.Dan Gohman2008-08-191-1/+8
| | | | llvm-svn: 55004
* Fix indentation in FastISel tablegen-emitted code.Dan Gohman2008-08-191-1/+1
| | | | llvm-svn: 55003
* Add more checking to filter out more kinds of things thatDan Gohman2008-08-191-1/+11
| | | | | | FastISel doesn't support yet. llvm-svn: 55002
* 80 columns.Dan Gohman2008-08-191-2/+4
| | | | llvm-svn: 54998
* Add a few doxygen comments.Dan Gohman2008-08-191-0/+6
| | | | llvm-svn: 54997
* Remove an unneeded #include.Dan Gohman2008-08-191-1/+0
| | | | llvm-svn: 54996
* Compress manpages.Devang Patel2008-08-191-0/+4
| | | | llvm-svn: 54971
* Speed up addRegisterDead by adding more fast checks before performing the ↵Owen Anderson2008-08-141-3/+9
| | | | | | | | | expensive subregister query, and by increasing the size of the subregister hashtable so that there are fewer collisions. llvm-svn: 54781
* Update makellvm to return correct result code.Daniel Dunbar2008-08-131-0/+1
| | | | llvm-svn: 54756
* Initial checkin of the new "fast" instruction selection support. SeeDan Gohman2008-08-133-0/+407
| | | | | | | the comments in FastISelEmitter.cpp for details on what this is. This is currently experimental and unusable. llvm-svn: 54751
* Oops, check in these files too, for the FastISel -> Fast rename.Dan Gohman2008-08-131-1/+1
| | | | llvm-svn: 54750
* remove obsolete filesChris Lattner2008-08-111-7/+0
| | | | llvm-svn: 54630
* Add ARM to the targets to build.Bill Wendling2008-08-051-1/+1
| | | | llvm-svn: 54386
* Added support for overloading intrinsics (atomics) based on pointersMon P Wang2008-07-305-9/+26
| | | | | | | to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
* Don't build with 4.0.Bill Wendling2008-07-281-2/+1
| | | | llvm-svn: 54137
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-76/+76
| | | | llvm-svn: 54128
* 'Previously, the emacs tablegen mode would highlight constants even if Chris Lattner2008-07-231-4/+4
| | | | | | | | | | they appear in words. This would cause things like the "128" in "VR128" to be highlighted. This patch fixes the highlighting by only recognizing constants when they have word breaks around them.' Patch by Stefanus Du Toit! llvm-svn: 53944
* Temporary hack to build with GCC 4.0 instead of 4.2.Bill Wendling2008-07-211-1/+2
| | | | llvm-svn: 53860
OpenPOWER on IntegriCloud