summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen
Commit message (Collapse)AuthorAgeFilesLines
* Clean up.Jim Laskey2006-07-131-1/+4
| | | | llvm-svn: 29137
* 1. Simplfy bit operations.Jim Laskey2006-07-132-181/+116
| | | | | | 2. Coalesce instruction cases. llvm-svn: 29135
* Move base value of instruction to lookup table to prepare for case reduction.Jim Laskey2006-07-121-17/+37
| | | | llvm-svn: 29122
* It was pointed out that DEBUG() is only available with -debug.Jim Laskey2006-07-111-4/+12
| | | | llvm-svn: 29106
* Ensure that dump calls that are associated with asserts are removed fromJim Laskey2006-07-111-4/+4
| | | | | | non-debug build. llvm-svn: 29105
* Reduce bloat in target libraries by removing per machine instruction assertionJim Laskey2006-07-111-3/+1
| | | | | | from code emitter generation. llvm-svn: 29097
* tblgen uses EHChris Lattner2006-07-071-0/+2
| | | | llvm-svn: 29034
* Ugly hack! Add helper functions InsertInFlightSetEntry andEvan Cheng2006-06-291-4/+8
| | | | | | | RemoveInFlightSetEntry. They are used in place of direct set operators to reduce instruction selection function stack size. llvm-svn: 28987
* Fix an error message regression. Print:Chris Lattner2006-06-201-1/+8
| | | | | | | | LI8: (LI8:i64 (imm:i64):$imm) instead of: LI8: (LI8:MVT::i64 (imm:MVT::i64):$imm) llvm-svn: 28868
* Don't require src/dst patterns to be able to fully resolve their types,Chris Lattner2006-06-201-5/+11
| | | | | | | | | | | | | | | | | because information about one can help refine the other. This allows us to write: def : Pat<(i32 (extload xaddr:$src, i8)), (LBZX xaddr:$src)>; as: def : Pat<(extload xaddr:$src, i8), (LBZX xaddr:$src)>; because tblgen knows LBZX returns i32. llvm-svn: 28865
* Make sure to use the result of the pattern to infer the result type of theChris Lattner2006-06-201-22/+34
| | | | | | | | | | | | | | instruction, and the result type of the instruction to refine the pattern. This allows us to write things like this: def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (v2i64 VR128:$src)>; as: def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (VR128:$src)> and fixes a ppc64 issue. llvm-svn: 28863
* Improve a comment.Chris Lattner2006-06-161-1/+1
| | | | llvm-svn: 28833
* Instructions with variable operands (variable_ops) can have a number requiredEvan Cheng2006-06-151-10/+7
| | | | | | | | | | | | | operands. e.g. def CALL32r : I<0xFF, MRM2r, (ops GR32:$dst, variable_ops), "call {*}$dst", [(X86call GR32:$dst)]>; TableGen should emit operand informations for the "required" operands. Added a target instruction info flag M_VARIABLE_OPS to indicate the target instruction may have more operands in addition to the minimum required operands. llvm-svn: 28791
* Allow more use of iPTR in patterns.Evan Cheng2006-06-153-24/+24
| | | | llvm-svn: 28790
* Added support for variable_ops.Evan Cheng2006-06-141-88/+81
| | | | llvm-svn: 28788
* Fix support for optional input flag.Evan Cheng2006-06-141-17/+11
| | | | llvm-svn: 28784
* getOperandNum(): error if specified operand number is out of range.Evan Cheng2006-06-131-0/+7
| | | | llvm-svn: 28775
* Wrap to 80 colsChris Lattner2006-06-091-4/+5
| | | | llvm-svn: 28743
* Don't build tblgen with -pedantic or -Wno-long-longReid Spencer2006-06-011-0/+4
| | | | llvm-svn: 28638
* Can't trust NodeDepth when checking for possibility of load folding creatingEvan Cheng2006-05-251-7/+5
| | | | | | | | a cycle. This increase the search space and will increase compile time (in practice it appears to be small, e.g. 176.gcc goes from 62 sec to 65 sec) that will be addressed later. llvm-svn: 28476
* Fixed a really ugly bug. The TableGen'd isel is not freeing the "inflight set"Evan Cheng2006-05-251-9/+21
| | | | | | | correctly. That is causing non-deterministic behavior (and possibly preventing some load folding from happening). llvm-svn: 28458
* Don't make zero-sized static arraysChris Lattner2006-05-241-1/+1
| | | | llvm-svn: 28448
* Patches to make the LLVM sources more -pedantic clean. Patch providedChris Lattner2006-05-241-1/+1
| | | | | | by Anton Korobeynikov! This is a step towards closing PR786. llvm-svn: 28447
* Now that iPTR is a fully resolved type. We end up losing the type check forEvan Cheng2006-05-191-1/+1
| | | | | | | | | | | patterns that look like this: def : Pat<(i32 (X86Wrapper tconstpool :$dst)), (MOV32ri tconstpool :$dst)>; InsertOneTypeCheck should copy the type from the resolved pattern to the unresolved one as long as there types are different. llvm-svn: 28389
* lib/Target/Target.tdEvan Cheng2006-05-181-5/+7
| | | | llvm-svn: 28386
* Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.Evan Cheng2006-05-183-40/+0
| | | | llvm-svn: 28376
* TypoEvan Cheng2006-05-171-2/+2
| | | | llvm-svn: 28366
* Remove PointerType from target definition. Use abstract type MVT::iPTR toEvan Cheng2006-05-174-65/+93
| | | | | | represent pointer type. llvm-svn: 28363
* Allow patterns to refer to physical registers that belong to multipleEvan Cheng2006-05-163-6/+26
| | | | | | register classes. llvm-svn: 28323
* Noop instructionEvan Cheng2006-05-121-2/+0
| | | | llvm-svn: 28241
* Unused instructionEvan Cheng2006-05-121-1/+0
| | | | llvm-svn: 28240
* Also add super- register classes info.Evan Cheng2006-05-111-0/+38
| | | | llvm-svn: 28221
* Watch out for the following case:Evan Cheng2006-05-101-11/+37
| | | | | | | | 1. Use expects a chain output. 2. Node is expanded into multiple target ops. 3. One of the inner node produces a chain, the outer most one doesn't. llvm-svn: 28209
* Fix a load folding bug. It is exposed by a multi- resulting instructionsEvan Cheng2006-05-101-59/+63
| | | | | | def : Pat<> pattern. llvm-svn: 28208
* Add sub-register class information.Evan Cheng2006-05-091-3/+49
| | | | llvm-svn: 28195
* Set isStore of instructions with ISD::TRUNCSTORE root node.Evan Cheng2006-05-031-3/+5
| | | | llvm-svn: 28075
* Put instruction names into the first non TargetInstrInfo namespace found.Chris Lattner2006-05-011-10/+18
| | | | llvm-svn: 28043
* instructions can be in different namespaces. Make sure to use the rightChris Lattner2006-05-011-8/+4
| | | | | | one for each instruction. llvm-svn: 28038
* FormatingEvan Cheng2006-05-011-1/+1
| | | | llvm-svn: 28036
* Mark instructions whose pattern is (store ...) isStore.Evan Cheng2006-05-011-1/+17
| | | | llvm-svn: 28032
* Remove the temporary option: -no-isel-fold-inflightEvan Cheng2006-04-281-2/+1
| | | | llvm-svn: 28012
* When isel'ing a node, mark its operands "InFlight" before selecting them. TheseEvan Cheng2006-04-281-2/+34
| | | | | | | | nodes should not be folded into other nodes. This fixes the miscompilation of PR 749. Temporarily under flag control. llvm-svn: 28002
* JumpTable support! What this represents is working asm and jit support forNate Begeman2006-04-221-0/+1
| | | | | | | | x86 and ppc for 100% dense switch statements when relocations are non-PIC. This support will be extended and enhanced in the coming days to support PIC, and less dense forms of jump tables. llvm-svn: 27947
* Don't fill in fields that no longer exist.Chris Lattner2006-04-201-2/+1
| | | | llvm-svn: 27898
* Rename AddedCost to AddedComplexity.Evan Cheng2006-04-192-13/+15
| | | | llvm-svn: 27841
* Allow "let AddedCost = n in" to increase pattern complexity.Evan Cheng2006-04-192-7/+21
| | | | llvm-svn: 27834
* Add missing things to the distribution.Reid Spencer2006-04-131-0/+2
| | | | llvm-svn: 27650
* Fix a typo: Instr* -> Intr*Chris Lattner2006-04-101-3/+3
| | | | llvm-svn: 27568
* Infer element types for shuffle masksChris Lattner2006-04-061-0/+20
| | | | llvm-svn: 27456
* rename a method, to avoid confusion with llvm intrinsics.Chris Lattner2006-04-061-4/+3
| | | | llvm-svn: 27455
OpenPOWER on IntegriCloud