summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen
Commit message (Collapse)AuthorAgeFilesLines
...
* TableGen: Use StringInit instead of std::string for DagInit nameMatthias Braun2016-12-051-4/+4
| | | | llvm-svn: 288643
* TableGen: Use StringRef instead of const std::string& in return vals.Matthias Braun2016-12-0418-37/+40
| | | | | | | This will allow to switch to a different string storage in an upcoming commit. llvm-svn: 288612
* [tablegen] Delete duplicates from a vector without skipping elementsVedant Kumar2016-12-011-0/+1
| | | | | | | | | | | | | | Tablegen's -gen-instr-info pass has a bug in its emitEnums() routine. The function intends for values in a vector to be deduplicated, but it accidentally skips over elements after performing a deletion. I think there are smarter ways of doing this deduplication, but we can do that in a follow-up commit if there's interest. See the thread: [PATCH] TableGen InstrMapping Bug fix. Patch by Tyler Kenney! llvm-svn: 288408
* Fix some Clang-tidy and Include What You Use warnings; other minor fixes (NFC).Eugene Zelenko2016-11-307-132/+219
| | | | | | This preparation to remove SetVector.h dependency on SmallSet.h. llvm-svn: 288256
* Apply clang-tidy's 'performance-faster-string-find' check to LLVM.Benjamin Kramer2016-11-301-1/+1
| | | | | | No functionality change intended. llvm-svn: 288235
* TableGen: Allow signed immediates for instruction aliasesJacob Baungard Hansen2016-11-241-1/+1
| | | | | | | | | | | | Patch by Daniel Cederman. Reviewers: stoklund, arsenm Subscribers: arsenm, llvm-commits Differential Revision: https://reviews.llvm.org/D27046 llvm-svn: 287856
* Add IntrInaccessibleMemOnly property for intrinsicsAndrew Kaylor2016-11-223-7/+60
| | | | | | Differential Revision: https://reviews.llvm.org/D26485 llvm-svn: 287680
* [TableGen][ISel] When factoring ScopeMatcher, if the child of the ↵Craig Topper2016-11-221-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ScopeMatcher we're working on is also a ScopeMatcher, merge all its children into the one we're working on. There were several cases in X86 where we were unable to fully factor a ScopeMatcher but created nested ScopeMatchers for some portions of it. Then we created a SwitchType that split it up and further factored it so that we ended up with something like this: SwitchType Scope Scope Sequence of matchers Some other sequence of matchers EndScope Another sequence of matchers EndScope ...Next type This change turns it into this: SwitchType Scope Sequence of matchers Some other sequence of matchers Another sequence of matchers EndScope ...Next type Several other in-tree targets had similar nested scopes like this. Overall this doesn't save many bytes, but makes the isel output a little more regular. llvm-svn: 287624
* [Sparc] Use target name instead of namespace as prefix for MCRegisterClasses ↵Jacob Baungard Hansen2016-11-211-1/+1
| | | | | | | | | | | | | | | | | | | array Summary: For Sparc the namespace (SP) is different from the target name (Sparc), which causes the name of the array in this declaration to differ from the name used in the definition. Patch by Daniel Cederman. Reviewers: jyknight Subscribers: llvm-commits, jyknight Differential Revision: https://reviews.llvm.org/D23650 llvm-svn: 287528
* [TableGen][ISel] Do a better job of factoring ScopeMatchers created during ↵Craig Topper2016-11-211-3/+11
| | | | | | | | | | creation of SwitchTypeMatcher. Previously we were factoring when the ScopeMatcher was initially created, but it might get more Matchers added to it later. Delay factoring until we have fully created/populated the ScopeMatchers. This reduces X86 isel tables by 154 bytes. llvm-svn: 287520
* Try again to fix unused variable warning on lld-x86_64-darwin13 after r287439.Daniel Sanders2016-11-191-1/+6
| | | | | | | The previous attempt didn't work. I assume LLVM_ATTRIBUTE_UNUSED isn't available on that machine. llvm-svn: 287442
* Check that emitted instructions meet their predicates on all targets except ↵Daniel Sanders2016-11-196-30/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | ARM, Mips, and X86. Summary: * ARM is omitted from this patch because this check appears to expose bugs in this target. * Mips is omitted from this patch because this check either detects bugs or deliberate emission of instructions that don't satisfy their predicates. One deliberate use is the SYNC instruction where the version with an operand is correctly defined as requiring MIPS32 while the version without an operand is defined as an alias of 'SYNC 0' and requires MIPS2. * X86 is omitted from this patch because it doesn't use the tablegen-erated MCCodeEmitter infrastructure. Patches for ARM and Mips will follow. Depends on D25617 Reviewers: tstellarAMD, jmolloy Subscribers: wdng, jmolloy, aemerson, rengolin, arsenm, jyknight, nemanjai, nhaehnle, tstellarAMD, llvm-commits Differential Revision: https://reviews.llvm.org/D25618 llvm-svn: 287439
* [tablegen] Merge duplicate definitions of getMinimalTypeForRange. NFC.Daniel Sanders2016-11-196-37/+72
| | | | | | | | | | | | Summary: Depends on D25614 Reviewers: qcolombet Subscribers: qcolombet, beanz, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D25617 llvm-svn: 287438
* Fix -Wunused introduced in r286945 for release builds.Daniel Sanders2016-11-151-0/+2
| | | | llvm-svn: 286946
* [tablegen] Extract portions of AsmMatcherEmitter for re-use by another ↵Daniel Sanders2016-11-154-89/+158
| | | | | | | | | | | | | | | | | | | generator. NFC. Summary: This change is preparation for a change that will allow targets to verify that the instructions they emit meet the predicates they specify. This is useful to ensure that C++ legalization/lowering/instruction-selection doesn't incorrectly select code for a different subtarget than intended. Such cases are not caught by the integrated assembler when emitting instructions directly to an object file. Reviewers: qcolombet Subscribers: qcolombet, beanz, mgorny, llvm-commits, modocache Differential Revision: https://reviews.llvm.org/D25614 llvm-svn: 286945
* Re-apply r286384, "X86: Introduce the "relocImm" ComplexPattern, which ↵Peter Collingbourne2016-11-093-7/+13
| | | | | | | | | represents a relocatable immediate.", with a fix for 32-bit x86. Teach X86InstrInfo::analyzeCompare() not to crash on CMP and SUB instructions that take a global address operand. llvm-svn: 286420
* Revert r286384, "X86: Introduce the "relocImm" ComplexPattern, which ↵Peter Collingbourne2016-11-093-13/+7
| | | | | | | | | represents a relocatable immediate." Suspected to be the cause of a sanitizer-windows bot failure: Assertion failed: isImm() && "Wrong MachineOperand accessor", file C:\b\slave\sanitizer-windows\llvm\include\llvm/CodeGen/MachineOperand.h, line 420 llvm-svn: 286385
* X86: Introduce the "relocImm" ComplexPattern, which represents a relocatable ↵Peter Collingbourne2016-11-093-7/+13
| | | | | | | | | | | | | | | immediate. A relocatable immediate is either an immediate operand or an operand that can be relocated by the linker to an immediate, such as a regular symbol in non-PIC code. Start using relocImm for 32-bit and 64-bit MOV instructions, and for operands of type "imm32_su". Remove a number of now-redundant patterns. Differential Revision: https://reviews.llvm.org/D25812 llvm-svn: 286384
* Expandload and Compressstore intrinsicsElena Demikhovsky2016-11-032-6/+8
| | | | | | | | 2 new intrinsics covering AVX-512 compress/expand functionality. This implementation includes syntax, DAG builder, operation lowering and tests. Does not include: handling of illegal data types, codegen prepare pass and the cost model. llvm-svn: 285876
* [TableGen] Move OperandMatchResultTy enum to MCTargetAsmParser.hAlex Bradbury2016-11-011-9/+2
| | | | | | | | | | | | | | | As it stands, the OperandMatchResultTy is only included in the generated header if there is custom operand parsing. However, almost all backends make use of MatchOperand_Success and friends from OperandMatchResultTy for e.g. parseRegister. This is a pain when starting an AsmParser for a new backend that doesn't yet have custom operand parsing. Move the enum to MCTargetAsmParser.h. This patch is a prerequisite for D23563 Differential Revision: https://reviews.llvm.org/D23496 llvm-svn: 285705
* Fix per-processor model scheduler definition completeness checkUlrich Weigand2016-10-311-1/+2
| | | | | | | | | | | | | | | The CodeGenSchedModels::checkCompleteness routine in TableGen/ CodeGenSchedule.cpp is supposed to verify for each processor model that is marked as "complete" that it actually defines a scheduling class for each instruction. However, this did not work correctly due to an incorrect check whether a scheduling class has an itinerary. Reviewer: atrick Differential revision: https://reviews.llvm.org/D26156 llvm-svn: 285622
* Revert 285087.Nico Weber2016-10-251-0/+8
| | | | | | | | | | | | | The sanitizer-windows bot turned red with: FAILED: utils/TableGen/CMakeFiles/obj.llvm-tblgen.dir/IntrinsicEmitter.cpp.obj C:\PROGRA~2\MICROS~1.0\VC\bin\AMD64_~2\cl.exe ... -c C:\...\llvm\utils\TableGen\IntrinsicEmitter.cpp c:\...\llvm\utils\tablegen\intrinsicemitter.cpp(254) : fatal error C1001: An internal error has occurred in the compiler. http://lab.llvm.org:8011/builders/sanitizer-windows/builds/114/steps/build%20clang%20lld/logs/stdio llvm-svn: 285089
* Try removing an MSVC2010 workaround.Nico Weber2016-10-251-8/+0
| | | | | | | Things seem to build fine locally without this, so let's see what the bots think. llvm-svn: 285087
* Switch SmallSetVector to use DenseSet when it overflows its inline space.Justin Lebar2016-10-212-20/+23
| | | | | | | | | | | | | | | | | | | | Summary: SetVector already used DenseSet, but SmallSetVector used std::set. This leads to surprising performance differences. Moreover, it means that the set of key types accepted by SetVector and SmallSetVector are quite different! In order to make this change, we had to convert some callsites that used SmallSetVector<std::string, N> to use SmallSetVector<CachedHashString, N> instead. Reviewers: timshen Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D25648 llvm-svn: 284887
* Improve tablegen gen-subtarget diagnostics for missing machine models.Andrew Trick2016-10-181-5/+8
| | | | | | | | | | | | -debug-only=subtarget-emitter prints a lot of machine model diagnostics. This prunes the output so that the "No machine model for XXX on processor YYY" only appears when there is definitely no machine model for that opcode. Previously it was printing that error even if the opcode was covered by a more general scheduling class. <rdar://problem/15919845> [TableGen][CodeGenSchedule] Debug output does not help spotting the missing scheduling classes llvm-svn: 284452
* Revert r283690, "MC: Remove unused entities."Peter Collingbourne2016-10-101-1/+1
| | | | llvm-svn: 283814
* Use StringRef in TableGen generated Intrinsics.gen file (NFC)Mehdi Amini2016-10-101-7/+5
| | | | llvm-svn: 283792
* MC: Remove unused entities.Peter Collingbourne2016-10-091-1/+1
| | | | llvm-svn: 283691
* Turn cl::values() (for enum) from a vararg function to using C++ variadic ↵Mehdi Amini2016-10-081-2/+1
| | | | | | | | | | | | | | | template The core of the change is supposed to be NFC, however it also fixes what I believe was an undefined behavior when calling: va_start(ValueArgs, Desc); with Desc being a StringRef. Differential Revision: https://reviews.llvm.org/D25342 llvm-svn: 283671
* FastISel: Remove unused/un-overridden entry points. NFCI.Peter Collingbourne2016-10-051-2/+1
| | | | llvm-svn: 283366
* Use StringRef in TableGen (NFC)Mehdi Amini2016-10-042-3/+3
| | | | llvm-svn: 283273
* Use StringRef in TableGen emitted API for attribute (NFC)Mehdi Amini2016-10-041-1/+1
| | | | llvm-svn: 283268
* Use StringRef for MemoryBuffer identifier API (NFC)Mehdi Amini2016-10-011-1/+1
| | | | llvm-svn: 283043
* Revert "TableGen: Switch from a std::map to a DenseMap in ↵Justin Bogner2016-09-211-1/+2
| | | | | | | | | | | | | CodeGenSubRegIndex. NFC" It turns out we iterate over this map a fair amount and the order matters for clang to be deterministic. See: http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160919/391315.html This reverts r279875. llvm-svn: 282040
* This reapplies r281304. The issue was that I had missedSjoerd Meijer2016-09-143-0/+3
| | | | | | to copy the new isAdd field in the tablegen data structure. llvm-svn: 281447
* Revert of r281304 as it is causing build bot failures in hexagonSjoerd Meijer2016-09-132-2/+0
| | | | | | | hwloop regression tests. These tests pass locally; will be investigating where these differences come from. llvm-svn: 281306
* This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instructionSjoerd Meijer2016-09-132-0/+2
| | | | | | | | | | | descriptions now tag add instructions, and the Hexagon backend is using this to identify loop induction statements. Patch by Sam Parker and Sjoerd Meijer. Differential Revision: https://reviews.llvm.org/D23601 llvm-svn: 281304
* [TableGen] AsmMatcher: Add AsmVariantName to Instruction class.Sam Kolton2016-09-081-0/+11
| | | | | | | | | | | | | | Summary: This allows specifying instructions that are available only in specific assembler variant. If AsmVariantName is specified then instruction will be presented only in MatchTable for this variant. If not specified then assembler variants will be determined based on AsmString. Also this allows splitting assembler match tables in same way as it is done in dissasembler. Reviewers: ab, tstellarAMD, craig.topper, vpykhtin Subscribers: wdng Differential Revision: https://reviews.llvm.org/D24249 llvm-svn: 280952
* TableGen: Switch from a std::map to a DenseMap in CodeGenSubRegIndex. NFCJustin Bogner2016-08-261-2/+1
| | | | | | | | | This mapping is between pointers, which DenseMap is particularly good at. Most targets aren't really affected, but if there's a lot of subregister composition this can shave off a good chunk of time from generating registers. llvm-svn: 279875
* [X86] Create a new instruction format to handle 4VOp3 encoding. This saves ↵Craig Topper2016-08-222-18/+25
| | | | | | one bit in TSFlags and simplifies MRMSrcMem/MRMSrcReg format handling. llvm-svn: 279424
* [X86] Create a new instruction format to handle MemOp4 encoding. This saves ↵Craig Topper2016-08-222-17/+28
| | | | | | one bit in TSFlags and simplifies MRMSrcMem/MRMSrcReg format handling. llvm-svn: 279423
* [X86] Space out the encodings of X86 instruction formats. I plan to add some ↵Craig Topper2016-08-221-83/+83
| | | | | | | | new encodings in future commits and this will reduce the size of those commits. NFC This tries to keep all the ModRM memory and register forms in their own regions of the encodings. Hoping to make it simple on some of the switch statements that operate on these encodings. llvm-svn: 279422
* [X86] Merge small helper function into the switch that calls it since they ↵Craig Topper2016-08-221-17/+9
| | | | | | both operate on the same variable. NFC llvm-svn: 279421
* [X86] Explicitly list all X86 instruction forms in switch statement so its ↵Craig Topper2016-08-221-1/+10
| | | | | | easier to detect when one is missing. NFC llvm-svn: 279420
* Replace a few more "fall through" comments with LLVM_FALLTHROUGHJustin Bogner2016-08-171-4/+4
| | | | | | Follow up to r278902. I had missed "fall through", with a space. llvm-svn: 278970
* Use the range variant of remove_if instead of unpacking begin/endDavid Majnemer2016-08-122-58/+41
| | | | | | No functionality change is intended. llvm-svn: 278475
* Use the range variant of find/find_if instead of unpacking begin/endDavid Majnemer2016-08-124-27/+11
| | | | | | | | | If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278469
* Use the range variant of find_if instead of unpacking begin/endDavid Majnemer2016-08-122-16/+11
| | | | | | No functionality change is intended. llvm-svn: 278443
* Use the range variant of find instead of unpacking begin/endDavid Majnemer2016-08-116-19/+11
| | | | | | | | | If the result of the find is only used to compare against end(), just use is_contained instead. No functionality change is intended. llvm-svn: 278433
* Use range algorithms instead of unpacking begin/endDavid Majnemer2016-08-111-8/+7
| | | | | | No functionality change is intended. llvm-svn: 278417
OpenPOWER on IntegriCloud