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* [MVT][SVE] Scalable vector MVTs (2/3)Amara Emerson2017-04-201-0/+39
| | | | | | | | | | | Adds scalable vector machine value types, and updates the switch statements required for tablegen. Patch by Graham Hunter. Differential Revision: https://reviews.llvm.org/D32018 llvm-svn: 300840
* [tblgen] GCC/MS builtin to target intrisics map.Aditya Nandakumar2017-04-191-7/+15
| | | | | | | | | | | Patch by Ettore Speziale Allow TableGen to generate static functions to perform GCC/MS builtin name to target specific intrinsic ID mapping. https://reviews.llvm.org/D31150 llvm-svn: 300735
* [globalisel][tablegen] Report more detail in some SelectionDAG import ↵Daniel Sanders2017-04-131-19/+98
| | | | | | | | | | | | | | failures. NFC Reviewers: ab, t.p.northover, qcolombet, aditya_nandakumar, rovka Reviewed By: ab Subscribers: dberris, kristof.beyls, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D31325 llvm-svn: 300186
* [globalisel][tablegen] Add experimental support for OperandWithDefaultOps, ↵Daniel Sanders2017-04-121-4/+78
| | | | | | | | | | | | | | | | | | | | | | PredicateOperand, and OptionalDefOperand Summary: As far as instruction selection is concerned, all three appear to be same thing. Support for these operands is experimental since AArch64 doesn't make use of them and the in-tree targets that do use them (AMDGPU for OperandWithDefaultOps, AMDGPU/ARM/Hexagon/Lanai for PredicateOperand, and ARM for OperandWithDefaultOps) are not using tablegen-erated GlobalISel yet. Reviewers: rovka, aditya_nandakumar, t.p.northover, qcolombet, ab Reviewed By: rovka Subscribers: inglorion, aemerson, rengolin, mehdi_amini, dberris, kristof.beyls, igorb, tpr, llvm-commits Differential Revision: https://reviews.llvm.org/D31135 llvm-svn: 300037
* [globalisel][tablegen] Fix patterns involving multiple ComplexPatterns.Daniel Sanders2017-04-051-41/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Temporaries are now allocated to operands instead of predicates and this allocation is used to correctly pair up the rendered operands with the matched operands. Previously, ComplexPatterns were allocated temporaries independently in the Src Pattern and Dst Pattern, leading to mismatches. Additionally, the Dst Pattern failed to account for the allocated index and therefore always used temporary 0, 1, ... when it should have used base+0, base+1, ... Thanks to Aditya Nandakumar for noticing the bug. Depends on D30539 Reviewers: ab, t.p.northover, qcolombet, rovka, aditya_nandakumar Reviewed By: rovka Subscribers: igorb, dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D31054 llvm-svn: 299538
* [globalisel][tablegen] Fix non-determinism introduced in r299430.Daniel Sanders2017-04-041-2/+7
| | | | | | This should fix the last issue on llvm-clang-x86_64-expensive-checks-win. llvm-svn: 299436
* [globalisel][tablegen] Try to make MSVC happy with r299430Daniel Sanders2017-04-041-5/+5
| | | | | | | | Fix other cases of 'const StringRef' creeping back in at the same time. This should fix the llvm-clang-x86_64-expensive-checks-win buildbot. llvm-svn: 299433
* [tablegen][globalisel] Add support for nested instruction matching.Daniel Sanders2017-04-041-13/+180
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Lift the restrictions that prevented the tree walking introduced in the previous change and add support for patterns like: (G_ADD (G_MUL (G_SEXT $src1), (G_SEXT $src2)), $src3) -> SMADDWrrr $dst, $src1, $src2, $src3 Also adds support for G_SEXT and G_ZEXT to support these cases. One particular aspect of this that I should draw attention to is that I've tried to be overly conservative in determining the safety of matches that involve non-adjacent instructions and multiple basic blocks. This is intended to be used as a cheap initial check and we may add a more expensive check in the future. The current rules are: * Reject if any instruction may load/store (we'd need to check for intervening memory operations. * Reject if any instruction has implicit operands. * Reject if any instruction has unmodelled side-effects. See isObviouslySafeToFold(). Reviewers: t.p.northover, javed.absar, qcolombet, aditya_nandakumar, ab, rovka Reviewed By: ab Subscribers: igorb, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30539 llvm-svn: 299430
* Spelling mistakes in comments. NFCI.Simon Pilgrim2017-03-311-1/+1
| | | | llvm-svn: 299197
* [globalisel][tablegen] Change Expected<bool> to Error and rename functions.Daniel Sanders2017-03-301-45/+41
| | | | | | | | Functions that still return Expected<X> are now called createAndImport*() Changing the return type was requested in the review comments for r299001 llvm-svn: 299063
* [tablegen][globalisel] Convert the SelectionDAG importer to a tree walking ↵Daniel Sanders2017-03-291-161/+266
| | | | | | | | | | | | | | | | | | | approach. NFC Summary: But don't actually inspect the tree any deeper than we already do. This change is NFC but the next one will enable full traversal of the source/destination patterns. Depends on D30535 Reviewers: t.p.northover, qcolombet, aditya_nandakumar, rovka, ab Subscribers: igorb, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30536 llvm-svn: 299001
* Improve machine schedulers for in-order processorsJaved Absar2017-03-271-0/+2
| | | | | | | | | | | This patch enables schedulers to specify instructions that cannot be issued with any other instructions. It also fixes BeginGroup/EndGroup. Reviewed by: Andrew Trick Differential Revision: https://reviews.llvm.org/D30744 llvm-svn: 298885
* [TableGen] Print #nnn as a name of an non-native reg unit with id nnnKrzysztof Parzyszek2017-03-272-6/+17
| | | | | | | | | When using -debug with -gen-register-info, tablegen will crash when trying to print a name of a non-native register unit. This patch only affects the debug information generated while running llvm-tblgen, and has no impact on the compilable code coming out of it. llvm-svn: 298875
* [tablegen] Use categories on options that only matter to one emitter.Daniel Sanders2017-03-275-12/+25
| | | | | | | | | | | | | | | | Summary: The categories are emitted in a strange order in this patch due to a bug in the CommandLine library. Reviewers: ab Reviewed By: ab Subscribers: ab, llvm-commits Differential Revision: https://reviews.llvm.org/D30995 llvm-svn: 298843
* [TableGen] Make CodeGenMapTable understand the namespace field of an instructionKarl-Johan Karlsson2017-03-271-8/+8
| | | | | | | | | | | | | | | | Do not force the backends to use target name as namespace. Original patch by Mattias Eriksson Reviewers: stoklund, craig.topper Reviewed By: stoklund Subscribers: materi, llvm-commits Differential Revision: https://reviews.llvm.org/D31322 llvm-svn: 298834
* Move spill size and alignment info from MC to TargetRegisterInfoKrzysztof Parzyszek2017-03-241-7/+7
| | | | | | | | | | | | This is another step towards implementing register classes with parametrized register/spill sizes and value types. This is an updated version of r298652. The difference is that MCRegister- Class still contains register size, available as getPhysRegSize(). The old function getSize was retained as a temporary measure to avoid build breakage for out-of-tree targets. llvm-svn: 298739
* Revert r298652 on Quentin's requestKrzysztof Parzyszek2017-03-241-4/+4
| | | | llvm-svn: 298727
* Another instance where GCC doesn't understand implicit construction of ↵Benjamin Kramer2017-03-241-2/+2
| | | | | | StringLiteral. llvm-svn: 298703
* Make GCC happy again.Benjamin Kramer2017-03-241-1/+1
| | | | llvm-svn: 298702
* Don't build up std::vectors with constant sizes when an array suffices.Benjamin Kramer2017-03-241-75/+70
| | | | | | NFC. llvm-svn: 298701
* Move spill size and alignment info from MC to TargetRegisterInfoKrzysztof Parzyszek2017-03-231-4/+4
| | | | | | | | | This is another step towards implementing register classes with parametrized register/spill sizes. Differential Revision: https://reviews.llvm.org/D31299 llvm-svn: 298652
* Rename AttributeSet to AttributeListReid Kleckner2017-03-211-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | Summary: This class is a list of AttributeSetNodes corresponding the function prototype of a call or function declaration. This class used to be called ParamAttrListPtr, then AttrListPtr, then AttributeSet. It is typically accessed by parameter and return value index, so "AttributeList" seems like a more intuitive name. Rename AttributeSetImpl to AttributeListImpl to follow suit. It's useful to rename this class so that we can rename AttributeSetNode to AttributeSet later. AttributeSet is the set of attributes that apply to a single function, argument, or return value. Reviewers: sanjoy, javed.absar, chandlerc, pete Reviewed By: pete Subscribers: pete, jholewinski, arsenm, dschuff, mehdi_amini, jfb, nhaehnle, sbc100, void, llvm-commits Differential Revision: https://reviews.llvm.org/D31102 llvm-svn: 298393
* GlobalISel: add implicit defs & uses when mutating an instruction.Tim Northover2017-03-201-1/+18
| | | | | | Otherwise a scheduler might do bad things to the code we produce. llvm-svn: 298311
* Explicitly add move constructor/assignment operators.Zachary Turner2017-03-201-0/+2
| | | | | | | | | | These are needed due to some obscure rules in the standard about how std::vector selects between copy and move constructors, which can cause a conforming implementation to attempt to select the copy constructor of RuleMatcher, which will fail since std::unique_ptr<> isn't copyable. llvm-svn: 298294
* [tablegen][globalisel] Capture instructions into locals and related ↵Daniel Sanders2017-03-201-60/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | infrastructure for multiple instructions matches. Summary: Prepare the way for nested instruction matching support by having actions like CopyRenderer look up operands in the RuleMatcher rather than a specific InstructionMatcher. This allows actions to reference any operand from any matched instruction. It works by checking the 'shape' of the match and capturing each matched instruction to a local variable. If the shape is wrong (not enough operands, leaf nodes where non-leafs are expected, etc.), then the rule exits early without checking the predicates. Once we've captured the instructions, we then test the predicates as before (except using the local variables). If the match is successful, then we render the new instruction as before using the local variables. It's not noticable in this patch but by the time we support multiple instruction matching, this patch will also cause a significant improvement to readability of the emitted code since MRI.getVRegDef(I->getOperand(0).getReg()) will simply be MI1 after emitCxxCaptureStmts(). This isn't quite NFC because I've also fixed a bug that I'm surprised we haven't encountered yet. It now checks there are at least the expected number of operands before accessing them with getOperand(). Depends on D30531 Reviewers: t.p.northover, qcolombet, aditya_nandakumar, ab, rovka Reviewed By: rovka Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D30535 llvm-svn: 298257
* Removed unnecessary semicolon. NFCI.Simon Pilgrim2017-03-151-1/+1
| | | | llvm-svn: 297906
* [tablegen][globalisel] Trivial changes to reduce size of following patch. NFC.Daniel Sanders2017-03-151-77/+90
| | | | | | | | | | | | | | | | | | Summary: * Move namespace { * Trivial: Typo * RuleMatcher: Separate class and definition * Trivial: const findNodeEquiv Reviewers: t.p.northover, qcolombet, aditya_nandakumar, ab, rovka Reviewed By: rovka Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D30531 llvm-svn: 297884
* [globalisel][tblgen] Add support for ComplexPatternsDaniel Sanders2017-03-141-14/+245
| | | | | | | | | | | | | | | | | | | Summary: Adds a new kind of MachineOperand: MO_Placeholder. This operand must not appear in the MIR and only exists as a way of creating an 'uninitialized' operand until a matcher function overwrites it. Depends on D30046, D29712 Reviewers: t.p.northover, ab, rovka, aditya_nandakumar, javed.absar, qcolombet Reviewed By: qcolombet Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D30089 llvm-svn: 297782
* [SelectionDAG] Enhance SDTCisSameNumEltsAs to work with scalar types and use ↵Craig Topper2017-03-132-38/+57
| | | | | | | | | | | | it on extend/trunc/round operations. Currently we don't enforce that ISD::ANY_EXTEND, ZERO_EXTEND, SIGN_EXTEND, TRUNC, FP_ROUND, FP_EXTEND have the same number of elements(including scalar) between their input and output. Though we have them documented as such. Up until a few months ago x86 created nodes that violated this rule. That's all been fixed now, and we should enforce the rule going forward. In order to do this we need to allow SDTCisSameNumEltsAs to support scalar types and not enforce being a vector. If one type is scalar we will force the other type to also be scalar. Differential Revision: https://reviews.llvm.org/D30878 llvm-svn: 297648
* [ADT] Improve the genericity of llvm::enumerate().Zachary Turner2017-03-131-2/+2
| | | | | | | | | | | | | | There were some issues in the implementation of enumerate() preventing it from being used in various contexts. These were all related to the fact that it did not supporter llvm's iterator_facade_base class. So this patch adds support for that and additionally exposes a new helper method to_vector() that will evaluate an entire range and store the results in a vector. Differential Revision: https://reviews.llvm.org/D30853 llvm-svn: 297633
* Revert "[AVX-512] EVEX2VEX, don't reject intrinsic instructions when both ↵Craig Topper2017-03-131-3/+2
| | | | | | | | | | have a memory operand. We should just continue to check other operands instead." This reverts r297596. There were other issues that were making this not work that have been fixed now. Reverting this results in a more accurate table. llvm-svn: 297602
* [AVX-512] EVEX2VEX, don't reject intrinsic instructions when both have a ↵Craig Topper2017-03-131-2/+3
| | | | | | | | memory operand. We should just continue to check other operands instead. This exposed that we have several intrinsic instructions that have identical TSFlags to other instructions. We should merge their patterns and kill of the duplicate. I'll fix that in a follow up patch. llvm-svn: 297596
* [X86] Minor formatting tweaks in EVEX to VEX tables. NFCCraig Topper2017-03-131-45/+45
| | | | llvm-svn: 297595
* [SelectionDAG] Make SelectCode return voidJoey Gouly2017-03-091-2/+1
| | | | | | | | | | | SelectCode has been returning nullptr since 182dac0 ("SDAG: Make SelectCodeCommon return void", 2016-05-10). Make SelectCode also return void instead, as all callers have been updated. Patch by Sven van Haastregt. Review: https://reviews.llvm.org/D30497 llvm-svn: 297377
* Recommit: [globalisel] Change LLT constructor string into an LLT-based ↵Daniel Sanders2017-03-071-16/+35
| | | | | | | | | | | | | | | | | | | | object that knows how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. The problem with the previous commit appears to have been that TableGen was including CodeGen/LowLevelType.h instead of Support/LowLevelTypeImpl.h. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 297241
* Revert r297177: Change LLT constructor string into an LLT-based object ...Daniel Sanders2017-03-071-35/+16
| | | | | | | | | | More module problems. This time it only showed up in the stage 2 compile of clang-x86_64-linux-selfhost-modules-2 but not the stage 1 compile. Somehow, this change causes the build to need Attributes.gen before it's been generated. llvm-svn: 297188
* [globalisel] Change LLT constructor string into an LLT-based object that ↵Daniel Sanders2017-03-071-16/+35
| | | | | | | | | | | | | | | | | | knows how to generate it. Summary: This will allow future patches to inspect the details of the LLT. The implementation is now split between the Support and CodeGen libraries to allow TableGen to use this class without introducing layering concerns. Thanks to Ahmed Bougacha for finding a reasonable way to avoid the layering issue and providing the version of this patch without that problem. Reviewers: t.p.northover, qcolombet, rovka, aditya_nandakumar, ab, javed.absar Subscribers: arsenm, nhaehnle, mgorny, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D30046 llvm-svn: 297177
* [X86] Quick fix for build bot failure (r297127) due to unused variable.Ayman Musa2017-03-071-2/+1
| | | | llvm-svn: 297130
* [X86][AVX512] Adding new LLVM TableGen backend which generates the EVEX2VEX ↵Ayman Musa2017-03-074-0/+353
| | | | | | | | | | | | compressing tables. X86EvexToVex machine instruction pass compresses EVEX encoded instructions by replacing them with their identical VEX encoded instructions when possible. It uses manually supported 2 large tables that map the EVEX instructions to their VEX ideticals. This TableGen backend replaces the tables by automatically generating them. Differential Revision: https://reviews.llvm.org/D30451 llvm-svn: 297127
* [TableGen] Ensure proper ordering of subtarget feature namesKrzysztof Parzyszek2017-03-061-4/+17
| | | | | | | Recommit r297039 without the testcase. The MIR testcase did not work well with MC code emitter. llvm-svn: 297080
* Revert r297039, it's causing some mysterious buildbot failuresKrzysztof Parzyszek2017-03-061-17/+4
| | | | llvm-svn: 297062
* [TableGen] Ensure proper ordering of subtarget feature namesKrzysztof Parzyszek2017-03-061-4/+17
| | | | llvm-svn: 297039
* Fixed IntOperandMatcher::emitCxxPredicateExpr argumentsSimon Pilgrim2017-02-241-1/+1
| | | | | | Extra const in the StringRef argument meant that MSVC complained about it not correctly overriding from OperandPredicateMatcher::emitCxxPredicateExpr (which didn't have the const) llvm-svn: 296138
* [globalisel] Decouple src pattern operands from dst pattern operands.Daniel Sanders2017-02-241-53/+282
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This isn't testable for AArch64 by itself so this patch also adds support for constant immediates in the pattern and physical register uses in the result. The new IntOperandMatcher matches the constant in patterns such as '(set $rd:GPR32, (G_XOR $rs:GPR32, -1))'. It's always safe to fold immediates into an instruction so this is the first rule that will match across multiple BB's. The Renderer hierarchy is responsible for adding operands to the result instruction. Renderers can copy operands (CopyRenderer) or add physical registers (in particular %wzr and %xzr) to the result instruction in any order (OperandMatchers now import the operand names from SelectionDAG to allow renderers to access any operand). This allows us to emit the result instruction for: %1 = G_XOR %0, -1 --> %1 = ORNWrr %wzr, %0 %1 = G_XOR -1, %0 --> %1 = ORNWrr %wzr, %0 although the latter is untested since the matcher/importer has not been taught about commutativity yet. Added BuildMIAction which can build new instructions and mutate them where possible. W.r.t the mutation aspect, MatchActions are now told the name of an instruction they can recycle and BuildMIAction will emit mutation code when the renderers are appropriate. They are appropriate when all operands are rendered using CopyRenderer and the indices are the same as the matcher. This currently assumes that all operands have at least one matcher. Finally, this change also fixes a crash in AArch64InstructionSelector::select() caused by an immediate operand passing isImm() rather than isCImm(). This was uncovered by the other changes and was detected by existing tests. Depends on D29711 Reviewers: t.p.northover, ab, qcolombet, rovka, aditya_nandakumar, javed.absar Reviewed By: rovka Subscribers: aemerson, dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D29712 llvm-svn: 296131
* Fix missing call to base class constructor in r296121.Daniel Sanders2017-02-241-1/+3
| | | | | | | The 'Kind' member used in RTTI for InstructionPredicateMatcher was not initialized but went undetected since I always ended up with the correct value. llvm-svn: 296126
* [globalisel] Sort RuleMatchers by priority.Daniel Sanders2017-02-241-2/+165
| | | | | | | | | | | | | | | | | | | | | | Summary: This makes more important rules have priority over less important rules. For example, '%a = G_ADD $b:s64, $c:s64' has priority over '%a = G_ADD $b:s32, $c:s32'. Previously these rules were emitted in the correct order by chance. NFC in this patch but it is required to make the next patch work correctly. Depends on D29710 Reviewers: t.p.northover, ab, qcolombet, aditya_nandakumar, rovka Reviewed By: ab, rovka Subscribers: javed.absar, dberris, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D29711 llvm-svn: 296121
* tablegen: Fix android buildPavel Labath2017-02-211-1/+2
| | | | | | use llvm::to_string instead of std:: version. llvm-svn: 295711
* Add a wrapper around copy_if in STLExtras; NFCSanjoy Das2017-02-211-4/+3
| | | | | | I will add one more use for this in a later change. llvm-svn: 295685
* [globalisel] OperandPredicateMatcher's shouldn't need to generate the ↵Daniel Sanders2017-02-201-17/+18
| | | | | | | | | | | | | | | | | | | | | | | | MachineOperand expr. NFC Summary: Each OperandPredicateMatcher shouldn't need to know how to generate the expression to reference a MachineOperand. The OperandMatcher should provide it. In addition to separating responsibilities, this also lays some groundwork for decoupling source patterns from destination patterns to allow invented operands or operands provided by GlobalISel's equivalent to the ComplexPattern<> class. Depends on D29709 Reviewers: t.p.northover, ab, rovka, qcolombet, aditya_nandakumar Reviewed By: ab Subscribers: dberris, kristof.beyls, llvm-commits, igorb Differential Revision: https://reviews.llvm.org/D29710 llvm-svn: 295668
* [globalisel] Separate the SelectionDAG importer from the emitter. NFCDaniel Sanders2017-02-201-5/+11
| | | | | | | | | | | | | | | | Summary: In the near future the rules will be sorted between these two steps to ensure that more important rules are not prevented by less important ones. Reviewers: t.p.northover, ab, rovka, qcolombet, aditya_nandakumar Reviewed By: ab Subscribers: dberris, kristof.beyls, llvm-commits Differential Revision: https://reviews.llvm.org/D29709 llvm-svn: 295661
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