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* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-264-46/+41
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* This patch adds support for the vector quadword add/sub instructions introducedKit Barton2015-05-251-1/+3
| | | | | | | | | | | | | | | | | | | | in POWER8: vadduqm vaddeuqm vaddcuq vaddecuq vsubuqm vsubeuqm vsubcuq vsubecuq In addition to adding the instructions themselves, it also adds support for the v1i128 type for intrinsics (Intrinsics.td, Function.cpp, and IntrinsicEmitter.cpp). http://reviews.llvm.org/D9081 llvm-svn: 238144
* [TableGen] Remove ListInit::size() in favor of getSize() which does the same ↵Craig Topper2015-05-141-2/+2
| | | | | | thing and is already used in most places. NFC. llvm-svn: 237341
* [TableGen] Replace some calls to ListInit::getSize() with ListInit::empty() ↵Craig Topper2015-05-142-3/+3
| | | | | | if it was just comparing to 0. NFC. llvm-svn: 237340
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-133-5/+5
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-134-41/+46
| | | | | | | The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). llvm-svn: 237245
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-134-46/+41
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first two times this was committed (r229831, r233055), it caused several buildbot failures. At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed. llvm-svn: 237234
* Fix tablegen's PrintFatalError function to run registered fileJames Y Knight2015-05-115-28/+24
| | | | | | | | | | | | | | | cleanups. Also, change code in tablegen which printed a message and then called "exit(1)" to use PrintFatalError, instead. This fixes instances where an empty output file was left behind after a failed tablegen invocation, which would confuse subsequent ninja runs into not attempting to rebuild. Differential Revision: http://reviews.llvm.org/D9608 llvm-svn: 237058
* [TableGen] Don't leak Expanders and Operators in SetTheory.Craig Topper2015-04-242-3/+3
| | | | llvm-svn: 235697
* [TableGen] Use 'isa' to identify UnsetInits rather than comparing with the ↵Craig Topper2015-04-222-2/+2
| | | | | | singleton object created by UnsetInit::get(). Makes it more consistent with the other types. llvm-svn: 235465
* AVX-512: Added VPMOVx2M instructions for SKX,Elena Demikhovsky2015-04-211-0/+6
| | | | | | fixed encoding of VPMOVM2x. llvm-svn: 235385
* AVX-512: Added VPTESTM and VPTESTNM instructions for SKXElena Demikhovsky2015-04-211-0/+7
| | | | llvm-svn: 235383
* Add support for v1i128 type.Kit Barton2015-04-171-0/+1
| | | | | | | | | | | | The v1i128 type is needed for the quadword add/substract instructions introduced in POWER8. Futhermore, the PowerPC ABI specifies that parameters of type v1i128 are to be passed in a single vector register, while parameters of type i128 are passed in pairs of GPRs. Thus, it is necessary to be able to differentiate between v1i128 and i128 in LLVM. http://reviews.llvm.org/D8564 llvm-svn: 235198
* Change range-based for-loops to be -Wrange-loop-analysis clean.Richard Trieu2015-04-151-1/+1
| | | | | | No functionality change. llvm-svn: 234963
* Use 'override/final' instead of 'virtual' for overridden methodsAlexander Kornienko2015-04-111-3/+3
| | | | | | | | | | | | | | The patch is generated using clang-tidy misc-use-override check. This command was used: tools/clang/tools/extra/clang-tidy/tool/run-clang-tidy.py \ -checks='-*,misc-use-override' -header-filter='llvm|clang' \ -j=32 -fix -format http://reviews.llvm.org/D8925 llvm-svn: 234679
* Use SmallVector instead of std::vector for uniquing X86 disassembler operand ↵Craig Topper2015-04-091-1/+2
| | | | | | sets. The number of operands is a small fixed size. llvm-svn: 234465
* Simplify some printing code by combining new lines onto previous strings. ↵Craig Topper2015-04-091-9/+3
| | | | | | Don't work so hard not to print a comma on the last entry of an array. llvm-svn: 234464
* Don't convert enum to strings just to put them in the uniquing map. Use the ↵Craig Topper2015-04-091-15/+12
| | | | | | enum directly. Only convert to a string for printing. llvm-svn: 234463
* Revert r234389. It really was needed but really should have been cstring ↵Craig Topper2015-04-081-0/+1
| | | | | | instead of string.h llvm-svn: 234390
* Remove unnecessary include. NFCCraig Topper2015-04-081-1/+0
| | | | llvm-svn: 234389
* [TableGen] Prevent invalid code generation when emitting AssemblerPredicate ↵Toma Tabacu2015-04-071-1/+3
| | | | | | | | | | | | | | | | | | | conditions. Summary: The loop which emits AssemblerPredicate conditions also links them together by emitting a '&&'. If the 1st predicate is not an AssemblerPredicate, while the 2nd one is, nothing gets emitted for the 1st one, but we still emit the '&&' because of the 2nd predicate. This generated code looks like "( && Cond2)" and is invalid. Reviewers: dsanders Reviewed By: dsanders Subscribers: dsanders, llvm-commits Differential Revision: http://reviews.llvm.org/D8294 llvm-svn: 234312
* TableGen: Generate more const goodnessMatthias Braun2015-04-011-2/+2
| | | | llvm-svn: 233857
* Fix AllocationPriority not getting set for derived register classes.Matthias Braun2015-03-311-1/+3
| | | | llvm-svn: 233752
* RegAllocGreedy: Allow target to specify register class ordering.Matthias Braun2015-03-313-0/+6
| | | | | | | | | | Specify an allocation order with a register class. This is used by register allocators with a greedy heuristic. This is usefull as it is sometimes beneficial to color more constrained classes first. Differential Revision: http://reviews.llvm.org/D8626 llvm-svn: 233743
* [MCInstPrinter] Enable MCInstPrinter to change its behavior based on theAkira Hatanaka2015-03-273-12/+36
| | | | | | | | | | | | | | | | | | | | per-function subtarget. Currently, code-gen passes the default or generic subtarget to the constructors of MCInstPrinter subclasses (see LLVMTargetMachine::addPassesToEmitFile), which enables some targets (AArch64, ARM, and X86) to change their instprinter's behavior based on the subtarget feature bits. Since the backend can now use different subtargets for each function, instprinter has to be changed to use the per-function subtarget rather than the default subtarget. This patch takes the first step towards enabling instprinter to change its behavior based on the per-function subtarget. It adds a bit "PassSubtarget" to AsmWriter which tells table-gen to pass a reference to MCSubtargetInfo to the various print methods table-gen auto-generates. I will follow up with changes to instprinters of AArch64, ARM, and X86. llvm-svn: 233411
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-244-41/+46
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-244-46/+41
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* Another set of missing raw_ostream.h. Still no functional change.Benjamin Kramer2015-03-231-0/+1
| | | | llvm-svn: 232993
* [Tablegen] Attempt to add support for patterns containing nodes with ↵Craig Topper2015-03-201-22/+27
| | | | | | | | | | multiple results. This is needed for AVX512 masked scatter/gather support. The R600 change is necessary to remove a hack that was working around the lack of multiple results. llvm-svn: 232798
* Do not track subregister liveness when it brings no benefitsMatthias Braun2015-03-193-1/+17
| | | | | | | | | | | Some subregisters are only to indicate different access sizes, while not providing any way to actually divide the register up into multiple disjunct parts. Avoid tracking subregister liveness in these cases as it is not beneficial. Differential Revision: http://reviews.llvm.org/D8429 llvm-svn: 232695
* TableGen: Fix register class lane masks being too conservative.Matthias Braun2015-03-181-1/+1
| | | | | | | | | | | | | | When calculating the lanemask of a register class we have to include the masks of subregisters supported by any of the class members, not just the ones supported by all class members. This fixes problems when coalescing towards a subclass with additional subregisters available. The attached testcase works fine as is, but does crash if you enable subregister liveness on x86 without this change applied. llvm-svn: 232652
* Remove many superfluous SmallString::str() calls.Yaron Keren2015-03-181-1/+1
| | | | | | | | | | | | | | | Now that SmallString is a first-class citizen, most SmallString::str() calls are not required. This patch removes a whole bunch of them, yet there are lots more. There are two use cases where str() is really needed: 1) To use one of StringRef member functions which is not available in SmallString. 2) To convert to std::string, as StringRef implicitly converts while SmallString do not. We may wish to change this, but it may introduce ambiguity. llvm-svn: 232622
* Use the variable names from the TargetInstrInfo source when weEric Christopher2015-03-131-5/+7
| | | | | | | reference them in the generated files. A few characters aren't huge here and CFSetupOpcode is much more readable than S0. llvm-svn: 232132
* Add a return after the llvm namespace code for a little extraEric Christopher2015-03-131-3/+3
| | | | | | readability in generated files. llvm-svn: 232131
* Have getRegPressureSetLimit take a MachineFunction so that aEric Christopher2015-03-111-2/+3
| | | | | | we can inspect the subtarget and function when computing values. llvm-svn: 231951
* Teach raw_ostream to accept SmallString.Yaron Keren2015-03-102-3/+3
| | | | | | | | | | | | | | Saves adding .str() call to any raw_ostream << SmallString usage and a small step towards making .str() consistent in the ADTs by removing one of the SmallString::str() use cases, discussion at http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20141013/240026.html I'll update the Phabricator patch http://reviews.llvm.org/D6372 for review of the Twine SmallString support, it's more complex than this one. llvm-svn: 231763
* Improve and simplify EnforceSmallerThan for vector types.Craig Topper2015-03-101-54/+28
| | | | | | Explicitly compare the size of the scalar types and the whole vector size rather than just comparing enum encodings. llvm-svn: 231746
* Remove extra indentation of entire function body. NFC.Craig Topper2015-03-101-140/+140
| | | | llvm-svn: 231745
* TableGen: Use 'enum : uint64_t' for feature flags to fix -WmicrosoftReid Kleckner2015-03-091-29/+16
| | | | | | | | | | | | | clang-cl would warn that this value is not representable in 'int': enum { FeatureX = 1ULL << 31 }; All MS enums are 'ints' unless otherwise specified, so we have to use an explicit type. The AMDGPU target just hit 32 features, triggering this warning. Now that we have C++11 strong enum types, we can also eliminate the 'const uint64_t' codepath from tablegen and just use 'enum : uint64_t'. llvm-svn: 231697
* TableGen: Initialize ErrorInfo to ~0ULL in the MatchInstructionImplTom Stellard2015-03-051-1/+1
| | | | | | | | This is what all the targets check for and is consistent with the initialized value of MissingFeatures, which is sometimes assinged to ErrorInfo. llvm-svn: 231397
* Revert "[TableGen] Implement at least some support for multiple explicit ↵Craig Topper2015-03-051-10/+10
| | | | | | | | results in an instruction pattern. No functional change to existing patterns." This is failing on several build bots. llvm-svn: 231358
* [TableGen] Implement at least some support for multiple explicit results in ↵Craig Topper2015-03-051-10/+10
| | | | | | | | an instruction pattern. No functional change to existing patterns. This should help with the AVX512 masked gather changes Elena is working on. This patch is derived from some of the changes Elena made to tablegen, but modified by me to support arbitrary number of results. llvm-svn: 231357
* [TableGen] Add support constraining a vector type in a pattern to have a ↵Craig Topper2015-03-052-1/+126
| | | | | | specific element type and for constraining a vector type to have the same number of elements as another vector type. This is useful for AVX512 mask operations so we relate the mask type to the type of the other arguments. llvm-svn: 231356
* Add a FIXME for PR22796, broken ordering of ClassInfo in TableGenDavid Blaikie2015-03-041-0/+5
| | | | | | As discussed (at length) in code review of r222935, with Duncan. llvm-svn: 231282
* [Tablegen] Use correct result number variables with the pattern nodes they ↵Craig Topper2015-03-041-2/+2
| | | | | | go with when handling SDTCisSameAs. No functional change as they are always both 0 unless you try to define a multi result type profile that uses SDTCisSame on one of the other results. llvm-svn: 231226
* Revert "Remove the explicit SDNodeIterator::operator= in favor of the ↵David Blaikie2015-03-031-2/+0
| | | | | | | | | | | implicit default" Accidentally committed a few more of these cleanup changes than intended. Still breaking these out & tidying them up. This reverts commit r231135. llvm-svn: 231136
* Remove the explicit SDNodeIterator::operator= in favor of the implicit defaultDavid Blaikie2015-03-031-0/+2
| | | | | | | | | | There doesn't seem to be any need to assert that iterator assignment is between iterators over the same node - if you want to reuse an iterator variable to iterate another node, that's perfectly acceptable. Just don't mix comparisons between iterators into disjoint sequences, as usual. llvm-svn: 231135
* Switch up whitespace with better whitespace.Nick Lewycky2015-03-031-2/+2
| | | | llvm-svn: 231059
* Revert the non-cleanup part of r230769 because it introduced a ↵Nick Lewycky2015-03-032-3/+2
| | | | | | non-determinism found only in the names of symbols. llvm-svn: 231058
* TblGen: Remove copy of SmallVector::operator==. NFC intended.Benjamin Kramer2015-03-022-12/+3
| | | | llvm-svn: 230964
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