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* Fix typos.Bruce Mitchener2015-09-122-13/+13
| | | | | | | | | | Summary: This fixes a variety of typos in docs, code and headers. Subscribers: jholewinski, sanjoy, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D12626 llvm-svn: 247495
* Re-commit r247216: "Fix Clang-tidy misc-use-override warnings, other minor ↵Hans Wennborg2015-09-101-22/+20
| | | | | | | | | fixes" Except the changes that defined virtual destructors as =default, because that ran into problems with GCC 4.7 and overriding methods that weren't noexcept. llvm-svn: 247298
* Revert r247216: "Fix Clang-tidy misc-use-override warnings, other minor fixes"Hans Wennborg2015-09-101-20/+22
| | | | | | | This caused build breakges, e.g. http://lab.llvm.org:8011/builders/clang-x86_64-ubuntu-gdb-75/builds/24926 llvm-svn: 247226
* Fix Clang-tidy misc-use-override warnings, other minor fixesHans Wennborg2015-09-101-22/+20
| | | | | | | | Patch by Eugene Zelenko! Differential Revision: http://reviews.llvm.org/D12740 llvm-svn: 247216
* [TableGen] Use make_unique. NFC.Craig Topper2015-09-061-3/+3
| | | | llvm-svn: 246936
* [TableGen] Allow TokenTy in intrinsic signaturesJoseph Tremoulet2015-09-022-16/+19
| | | | | | | | | | | | | | | | | Summary: Add the necessary plumbing so that llvm_token_ty can be used as an argument/return type in intrinsic definitions and correspondingly require TokenTy in function types. TokenTy is an opaque type that has no target lowering, but can be used in machine-independent intrinsics. It is required for the upcoming llvm.eh.padparam intrinsic. Reviewers: majnemer, rnk Subscribers: stoklund, llvm-commits Differential Revision: http://reviews.llvm.org/D12532 llvm-svn: 246651
* [TableGen][DAGISel] Dedup predicates with same code to run. NFCI.Ahmed Bougacha2015-08-271-4/+25
| | | | | | | | | | | I locally hit the 255 limit, but a lot of these are redundant: each predicate coming from a different record was allocated a new number, even when we already emitted the same code for another predicate. Instead, re-use numbers and emit the predicate code only once. This reduces the total text size of *DAGISel.cpp.o by ~1%. llvm-svn: 246208
* [TableGen] Remove dead code. NFC.Ahmed Bougacha2015-08-271-7/+0
| | | | | | The only user of this was removed in r129670. llvm-svn: 246176
* Fix three typos in comments; "easilly" -> "easily".Nick Lewycky2015-08-181-2/+2
| | | | llvm-svn: 245379
* [TableGen] Use range-based for loop.Craig Topper2015-08-161-4/+2
| | | | llvm-svn: 245191
* [TableGen] Move the ConversionRow vector into the ConversionTable instead of ↵Craig Topper2015-08-161-1/+1
| | | | | | copying. llvm-svn: 245190
* Remove and forbid raw_svector_ostream::flush() calls.Yaron Keren2015-08-132-5/+0
| | | | | | | | | | After r244870 flush() will only compare two null pointers and return, doing nothing but wasting run time. The call is not required any more as the stream and its SmallString are always in sync. Thanks to David Blaikie for reviewing. llvm-svn: 244928
* Emit argmemonly attribute for intrinsics.Igor Laevsky2015-08-132-35/+26
| | | | | | Differential Revision: http://reviews.llvm.org/D11352 llvm-svn: 244920
* Remove raw_svector_ostream::resync and users. It's no-op after r244870.Yaron Keren2015-08-131-2/+0
| | | | llvm-svn: 244888
* Explicitly clear the MI operand list when getInstruction() is called. Call ↵Cameron Esfahani2015-08-111-0/+1
| | | | | | | | | | | | | | MI.clear() within MCD::OPC_Decode case and inside of translateInstruction() for the X86 target. Remove now unnecessary MI.clear() from ARMDisassembler. Summary: Explicitly clear the MI operand list when getInstruction() is called. Reviewers: hfinkel, t.p.northover, hvarga, kparzysz, jyknight, qcolombet, uweigand Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11665 llvm-svn: 244557
* [TableGen] NFC improving comments about what the tokenized identifiers will ↵Colin LeMahieu2015-08-101-1/+2
| | | | | | contain. llvm-svn: 244493
* Fix memory leaks by avoiding extra manual dynamic allocationDavid Blaikie2015-08-061-57/+41
| | | | | | Improvement to r244212. llvm-svn: 244252
* Plug memory leaks in AsmWriterEmitter::EmitPrintAliasInstruction.Yaron Keren2015-08-061-0/+8
| | | | llvm-svn: 244212
* -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are ↵David Blaikie2015-08-011-0/+14
| | | | | | deprecated in C++11 llvm-svn: 243816
* Fix TableGen code generation for ReadNone attribute.Eric Christopher2015-07-301-1/+1
| | | | | | Patch by Pete Abred! llvm-svn: 243689
* [PM/AA] Extract the ModRef enums from the AliasAnalysis class inChandler Carruth2015-07-221-7/+8
| | | | | | | | | | | | | | | | | | | | | | | preparation for de-coupling the AA implementations. In order to do this, they had to become fake-scoped using the traditional LLVM pattern of a leading initialism. These can't be actual scoped enumerations because they're bitfields and thus inherently we use them as integers. I've also renamed the behavior enums that are specific to reasoning about the mod/ref behavior of functions when called. This makes it more clear that they have a very narrow domain of applicability. I think there is a significantly cleaner API for all of this, but I don't want to try to do really substantive changes for now, I just want to refactor the things away from analysis groups so I'm preserving the exact original design and just cleaning up the names, style, and lifting out of the class. Differential Revision: http://reviews.llvm.org/D10564 llvm-svn: 242963
* Targets: commonize some stack realignment codeJF Bastien2015-07-201-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 llvm-svn: 242727
* Move most user of TargetMachine::getDataLayout to the Module oneMehdi Amini2015-07-161-4/+4
| | | | | | | | | | | | | | | | | | | | | Summary: This change is part of a series of commits dedicated to have a single DataLayout during compilation by using always the one owned by the module. This patch is quite boring overall, except for some uglyness in ASMPrinter which has a getDataLayout function but has some clients that use it without a Module (llmv-dsymutil, llvm-dwarfdump), so some methods are taking a DataLayout as parameter. Reviewers: echristo Subscribers: yaron.keren, rafael, llvm-commits, jholewinski Differential Revision: http://reviews.llvm.org/D11090 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 242386
* [TableGen] Improve decoding options for non-orthogonal instructionsPetr Pavlu2015-07-152-34/+145
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When FixedLenDecoder matches an input bitpattern of form [01]+ with an instruction bitpattern of form [01?]+ (where 0/1 are static bits and ? are mixed/variable bits) it passes the input bitpattern to a specific instruction decoder method which then makes a final decision whether the bitpattern is a valid instruction or not. This means the decoder must handle all possible values of the variable bits which sometimes leads to opcode rewrites in the decoder method when the instructions are not fully orthogonal. The patch provides a way for the decoder method to say that when it returns Fail it does not necessarily mean the bitpattern is invalid, but rather that the bitpattern is definitely not an instruction that is recognized by the decoder method. The decoder can then try to match the input bitpattern with other possible instruction bitpatterns. For example, this allows to solve a situation on AArch64 where the `MSR (immediate)` instruction has form: 1101 0101 0000 0??? 0100 ???? ???1 1111 but not all values of the ? bits are allowed. The rejected values should be handled by the `extended MSR (register)` instruction: 1101 0101 000? ???? ???? ???? ???? ???? The decoder will first try to decode an input bitpattern that matches both bitpatterns as `MSR (immediate)` but currently this puts the decoder method of `MSR (immediate)` into a situation when it must be able to decode all possible values of the ? bits, i.e. it would need to rewrite the instruction to `MSR (register)` when it is not `MSR (immediate)`. The patch allows to specify that the decoder method cannot determine if the instruction is valid for all variable values. The decoder method can simply return Fail when it knows it is definitely not `MSR (immediate)`. The decoder will then backtrack the decoding and find that it can match the input bitpattern with the more generic `MSR (register)` bitpattern too. Differential Revision: http://reviews.llvm.org/D7174 llvm-svn: 242274
* Fix comment typoPetr Pavlu2015-07-141-1/+1
| | | | | | Test commit access. llvm-svn: 242128
* AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long ↵Elena Demikhovsky2015-07-131-2/+24
| | | | | | | | | | | | types. In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch. I temporary removed the old intrinsics test (just to split this patch). Half types are not covered here. Differential Revision: http://reviews.llvm.org/D11134 llvm-svn: 242023
* MC: Remove MCSubtargetInfo() default constructorDuncan P. N. Exon Smith2015-07-101-8/+7
| | | | | | | | | | | | | | | | | | | | | Force all creators of `MCSubtargetInfo` to immediately initialize it, merging the default constructor and the initializer into an initializing constructor. Besides cleaning up the code a little, this makes it clear that the initializer is never called again later. Out-of-tree backends need a trivial change: instead of calling: auto *X = new MCSubtargetInfo(); InitXYZMCSubtargetInfo(X, ...); return X; they should call: return createXYZMCSubtargetInfoImpl(...); There's no real functionality change here. llvm-svn: 241957
* Target RegisterInfo: devirtualize TargetFrameLoweringJF Bastien2015-07-101-0/+12
| | | | | | | | | | | | | Summary: The target frame lowering's concrete type is always known in RegisterInfo, yet it's only sometimes devirtualized through a static_cast. This change adds an auto-generated static function <Target>GenRegisterInfo::getFrameLowering(const MachineFunction &MF) which does this devirtualization, and uses this function in all targets which can. This change was suggested by sunfish in D11070 for WebAssembly, I figure that I may as well improve the other targets while I'm here. Subscribers: sunfish, ted, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11093 llvm-svn: 241921
* Rename llvm.frameescape and llvm.framerecover to localescape and localrecoverReid Kleckner2015-07-071-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Initially, these intrinsics seemed like part of a family of "frame" related intrinsics, but now I think that's more confusing than helpful. Initially, the LangRef specified that this would create a new kind of allocation that would be allocated at a fixed offset from the frame pointer (EBP/RBP). We ended up dropping that design, and leaving the stack frame layout alone. These intrinsics are really about sharing local stack allocations, not frame pointers. I intend to go further and add an `llvm.localaddress()` intrinsic that returns whatever register (EBP, ESI, ESP, RBX) is being used to address locals, which should not be confused with the frame pointer. Naming suggestions at this point are welcome, I'm happy to re-run sed. Reviewers: majnemer, nicholas Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D11011 llvm-svn: 241633
* Reverting r241058 because it's causing buildbot failures.Ranjeet Singh2015-06-301-30/+26
| | | | llvm-svn: 241061
* There are a few places where subtarget features are stillRanjeet Singh2015-06-301-26/+30
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* MIR Serialization: Serialize the register mask machine operands.Alex Lorenz2015-06-291-0/+22
| | | | | | | | | | | | | | | | | This commit implements serialization of the register mask machine operands. This commit serializes only the call preserved register masks that are defined by a target, it doesn't serialize arbitrary register masks. This commit also extends the TargetRegisterInfo class and TableGen so that the users of TRI can get the list of all the call preserved register masks and their names. Reviewers: Duncan P. N. Exon Smith Differential Revision: http://reviews.llvm.org/D10673 llvm-svn: 240966
* AVX-512: Added all SKX forms of GATHER instructions.Elena Demikhovsky2015-06-281-0/+6
| | | | | | | Added intrinsics. Added encoding and tests. llvm-svn: 240905
* Avoid a Symbol -> Name -> Symbol conversion.Rafael Espindola2015-06-221-1/+2
| | | | | | | | | | | | | | Before this we were producing a TargetExternalSymbol from a MCSymbol. That meant extracting the symbol name and fetching the symbol again down the pipeline. This patch adds a DAG.getMCSymbol that lets the MCSymbol pass unchanged on the DAG. Doing so removes the need for MO_NOPREFIX and fixes the root cause of pr23900, allowing r240130 to be committed again. llvm-svn: 240300
* [CodeGen] Introduce a FAULTING_LOAD_OP pseudo-op.Sanjoy Das2015-06-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This instruction encodes a loading operation that may fault, and a label to branch to if the load page-faults. The locations of potentially faulting loads and their "handler" destinations are recorded in a FaultMap section, meant to be consumed by LLVM's clients. Nothing generates FAULTING_LOAD_OP instructions yet, but they will be used in a future change. The documentation (FaultMaps.rst) needs improvement and I will update this diff with a more expanded version shortly. Depends on D10196 Reviewers: rnk, reames, AndyAyers, ab, atrick, pgavlin Reviewed By: atrick, pgavlin Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D10197 llvm-svn: 239740
* Replace string GNU Triples with llvm::Triple in MCSubtargetInfo and ↵Daniel Sanders2015-06-101-4/+5
| | | | | | | | | | | | | | | | | | create*MCSubtargetInfo(). NFC. Summary: This continues the patch series to eliminate StringRef forms of GNU triples from the internals of LLVM that began in r239036. Reviewers: rafael Reviewed By: rafael Subscribers: rafael, ted, jfb, llvm-commits, rengolin, jholewinski Differential Revision: http://reviews.llvm.org/D10311 llvm-svn: 239467
* X86-MPX: Implemented encoding for MPX instructions.Elena Demikhovsky2015-06-091-0/+3
| | | | | | Added encoding tests. llvm-svn: 239403
* [TableGen] Remove unnecessary default constructed SMLoc that just existed to ↵Craig Topper2015-06-081-5/+1
| | | | | | return. Instead just call the default constructor in the return. llvm-svn: 239277
* [TableGen] Use range-based for loop. NFCCraig Topper2015-06-081-3/+2
| | | | llvm-svn: 239276
* [TableGen] Remove unnecessary extern declaration that's already in an ↵Craig Topper2015-06-081-2/+0
| | | | | | included header file. llvm-svn: 239275
* [TableGen] Use the SMLoc header file instead of SourceMgr header file in a ↵Craig Topper2015-06-081-1/+2
| | | | | | couple places. NFC llvm-svn: 239274
* [TableGen] Rename ListInit::getSize to just 'size' to be more consistent.Craig Topper2015-06-025-27/+26
| | | | llvm-svn: 238806
* [TableGen] Use range-based for loops. NFC.Craig Topper2015-06-023-22/+18
| | | | llvm-svn: 238805
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-299-50/+37
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* [TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.Ahmed Bougacha2015-05-291-4/+22
| | | | | | | | | | | | | | Fixes PR23455, where, when TableGen generates the matcher from the AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix is recognized as the SS register. I can't think of a situation where that's a feature, not a bug, hence: when a token is "isolated", i.e., it is followed and preceded by separators, it shouldn't be parsed as a register. Differential Revision: http://reviews.llvm.org/D9844 llvm-svn: 238536
* [TableGen][AsmMatcherEmitter] Factor out AsmOperand creation. NFC.Ahmed Bougacha2015-05-291-8/+15
| | | | llvm-svn: 238534
* Add support for the convergent flag at the MC and MachineInstr levels.Owen Anderson2015-05-283-31/+34
| | | | llvm-svn: 238450
* Expand the Flags field of MCInstrDesc to 64 bits, while simultaneouslyOwen Anderson2015-05-281-2/+2
| | | | | | | | | | | shrinking the Size and NumDefs fields to offset the size growth, and reordering the fields to preserve a good packing. This is necessary in the short term for adding a convergent flag, and simultaneously future-proofs us against more flags being added in the future. llvm-svn: 238445
* Add initial support for the convergent attribute.Owen Anderson2015-05-263-1/+16
| | | | llvm-svn: 238264
* AsmMatcherEmitter: Add an option to override custom converters for InstAliasTom Stellard2015-05-261-3/+12
| | | | | | | | | | | | | | | | | If there is an InstAlias defined for an instruction that had a custom converter (AsmMatchConverter), then when the alias is matched, the custom converter will be used rather than the converter generated by the InstAlias. This patch adds the UseInstAsmMatchConverter field to the InstAlias class, which allows you to override this behavior and force the converter generated by the InstAlias to be used. This is required for some future improvemnts to the R600 assembler. Differential Revision: http://reviews.llvm.org/D9083 llvm-svn: 238210
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