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path: root/llvm/utils/TableGen/TableGen.cpp
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* Removing unused default switch cases in switches over enums that already ↵David Blaikie2012-01-161-3/+0
| | | | | | | | account for all enumeration values explicitly. (This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them) llvm-svn: 148262
* Unweaken vtables as per ↵David Blaikie2011-12-201-84/+84
| | | | | | http://llvm.org/docs/CodingStandards.html#ll_virtual_anch llvm-svn: 146960
* Add a deterministic finite automaton based packetizer for VLIW architecturesAnshuman Dasgupta2011-12-011-0/+7
| | | | llvm-svn: 145629
* Remove the old-style ARM disassembler, which is no longer used.Owen Anderson2011-11-091-7/+0
| | | | llvm-svn: 144243
* Remove the Clang tblgen backends from LLVM.Peter Collingbourne2011-10-061-122/+0
| | | | llvm-svn: 141293
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-144/+61
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Remove more of llvmc and dependencies.Eric Christopher2011-09-201-7/+0
| | | | llvm-svn: 140121
* Added LateParsed property to TableGen attributes.Caitlin Sadowski2011-09-081-0/+7
| | | | | | This patch was written by DeLesley Hutchins. llvm-svn: 139300
* Dependency should be on the output file name, not the dependency fileJoerg Sonnenberger2011-09-071-1/+1
| | | | | | name. llvm-svn: 139220
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-111-12/+1
| | | | | | in multiple buildbots. llvm-svn: 134936
* [AVX] Make Inits FoldableDavid Greene2011-07-111-1/+12
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
* TableGen'erated MC lowering for simple pseudo-instructions.Jim Grosbach2011-07-081-0/+7
| | | | | | | | | | | | This allows the (many) pseudo-instructions we have that map onto a single real instruction to have their expansion during MC lowering handled automatically instead of the current cumbersome manual expansion required. These sorts of pseudos are common when an instruction is used in situations that require different MachineInstr flags (isTerminator, isBranch, et. al.) than the generic instruction description has. For example, using a move to the PC to implement a branch. llvm-svn: 134704
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-281-9/+5
| | | | llvm-svn: 134024
* Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.incEvan Cheng2011-06-271-17/+2
| | | | | | into XXXGenRegisterInfo.inc. llvm-svn: 133922
* Starting to refactor Target to separate out code that's needed to fully describeEvan Cheng2011-06-241-8/+12
| | | | | | | | | | | | target machine from those that are only needed by codegen. The goal is to sink the essential target description into MC layer so we can start building MC based tools without needing to link in the entire codegen. First step is to refactor TargetRegisterInfo. This patch added a base class MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to separate register description from the rest of the stuff. llvm-svn: 133782
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-211-11/+4
| | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. llvm-svn: 133568
* Drop a RecordKeeper reference that wasn't necessary.Jakob Stoklund Olesen2011-06-041-1/+1
| | | | llvm-svn: 132636
* Teach TableGen to evaluate DAG expressions as set operations.Jakob Stoklund Olesen2011-06-041-1/+20
| | | | | | | | | | | | | | | | | A TableGen backend can define how certain classes can be expanded into ordered sets of defs, typically by evaluating a specific field in the record. The SetTheory class can then evaluate DAG expressions that refer to these named sets. A number of standard set and list operations are predefined, and the backend can add more specialized operators if needed. The -print-sets backend is used by SetTheory.td to provide examples. This is intended to simplify how register classes are defined: def GR32_NOSP : RegisterClass<"X86", [i32], 32, (sub GR32, ESP)>; llvm-svn: 132621
* Add new -d option to tblgen. It writes a make(1)-style dependency file.Joerg Sonnenberger2011-06-011-29/+43
| | | | llvm-svn: 132395
* ParseFile() may throw, so extend the try/catch to handle that.Jim Grosbach2011-05-061-11/+11
| | | | llvm-svn: 131004
* Initial work to improve documentation for Clang's diagnostics, from Matthieu ↵Douglas Gregor2011-04-151-1/+9
| | | | | | Monrocq llvm-svn: 129613
* Add the ClangSACheckersEmitter tablegen backend which will be used for the ↵Argyrios Kyrtzidis2011-02-141-0/+7
| | | | | | clang static analyzer. llvm-svn: 125493
* Fix comment for gen-clang-decl-nodes tblgen backend, from Michael HanDouglas Gregor2011-01-191-1/+1
| | | | llvm-svn: 123833
* MemoryBuffer now return an error_code and returns a OwningPtr<MemoryBuffer> ↵Michael J. Spencer2010-12-161-3/+4
| | | | | | via an out parm. llvm-svn: 121958
* Add a Neon intrinsic test generator.Bob Wilson2010-12-151-0/+6
| | | | | | This is still a WIP. It's already good enough to expose a few bugs, though. llvm-svn: 121868
* various cleanups to tblgen, patch by Garrison Venn!Chris Lattner2010-12-151-1/+1
| | | | llvm-svn: 121837
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-6/+6
| | | | llvm-svn: 121659
* Support/MemoryBuffer: Replace all uses of std::string *ErrMsg with ↵Michael J. Spencer2010-12-091-3/+4
| | | | | | error_code &ec. And fix clients. llvm-svn: 121379
* Merge System into Support.Michael J. Spencer2010-11-291-1/+1
| | | | llvm-svn: 120298
* Add a way to emit StringSwitch of clang attribute spellings.Anders Carlsson2010-10-201-0/+6
| | | | llvm-svn: 116899
* Move tool_output_file into its own file.Dan Gohman2010-10-071-1/+1
| | | | llvm-svn: 115973
* Push twines deeper into SourceMgr's error handling methods.Benjamin Kramer2010-09-271-1/+1
| | | | llvm-svn: 114847
* Make tool_output_file's raw_ostream instance a member variable insteadDan Gohman2010-09-011-35/+35
| | | | | | | | | | of a base class. This makes it possible to unregister the file from FilesToRemove when the file is done. Also, this eliminates the need for formatted_tool_output_file. llvm-svn: 112706
* Convert tablegen to use tool_output_file.Dan Gohman2010-08-201-6/+3
| | | | llvm-svn: 111644
* Finish full attribute class emission for clang.Alexis Hunt2010-08-181-0/+18
| | | | | | For more information, see the accompanying clang patch. llvm-svn: 111454
* Revert r111007.Mikhail Glushenkov2010-08-131-3/+3
| | | | | | Apparently, this is now fixed in Clang. llvm-svn: 111032
* Add a workaround for building with Clang.Mikhail Glushenkov2010-08-131-3/+3
| | | | llvm-svn: 111007
* remove option from tablegen for building static header.Chris Lattner2010-07-201-6/+1
| | | | llvm-svn: 108893
* Modify tablegen to support generating all NEON code used by clang at once.Nate Begeman2010-06-171-7/+7
| | | | llvm-svn: 106207
* Add preliminary clang attribute generation support.Alexis Hunt2010-06-161-0/+13
| | | | | | | The attribute class generation support is still somewhat limited. See the accompanying clang commit for more details. llvm-svn: 106174
* BuiltinsARM.def emitter, still needs a substantial bit of tweaking to ↵Nate Begeman2010-06-041-0/+6
| | | | | | lighten the load on clang. llvm-svn: 105456
* Allow for creation of clang DeclNodes tables.Alexis Hunt2010-05-301-1/+8
| | | | | | | | The StmtNodes generator has been generalized to allow for the creation of DeclNodes tables as well, and another emitter was added for DeclContexts. llvm-svn: 105164
* Fix build breakage.Eli Friedman2010-05-281-1/+1
| | | | llvm-svn: 104912
* Add support to tablegen for auto-generating arm_neon.h from a tablegen ↵Nate Begeman2010-05-281-0/+7
| | | | | | | | | | | description of the intrinsics. The goal is to auto-generate both support for GCC-style (vector) and ARM-style (struct of vector) intrinsics. This is work in progress, but will be completed soon. llvm-svn: 104910
* Simplify raw_ostream usage.Dan Gohman2010-05-271-45/+37
| | | | llvm-svn: 104874
* Add an emitter to handle the list of clang statement nodes.Alexis Hunt2010-05-051-10/+17
| | | | llvm-svn: 103071
* Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen2010-04-021-0/+7
| | | | | | | | | | backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Reviewed by Chris Latter and Bob Wilson. llvm-svn: 100233
* Remove an unnecessary #include.Dan Gohman2010-03-271-1/+0
| | | | llvm-svn: 99714
* --- Reverse-merging r98637 into '.':Bob Wilson2010-03-161-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U test/CodeGen/ARM/tls2.ll U test/CodeGen/ARM/arm-negative-stride.ll U test/CodeGen/ARM/2009-10-30.ll U test/CodeGen/ARM/globals.ll U test/CodeGen/ARM/str_pre-2.ll U test/CodeGen/ARM/ldrd.ll U test/CodeGen/ARM/2009-10-27-double-align.ll U test/CodeGen/Thumb2/thumb2-strb.ll U test/CodeGen/Thumb2/ldr-str-imm12.ll U test/CodeGen/Thumb2/thumb2-strh.ll U test/CodeGen/Thumb2/thumb2-ldr.ll U test/CodeGen/Thumb2/thumb2-str_pre.ll U test/CodeGen/Thumb2/thumb2-str.ll U test/CodeGen/Thumb2/thumb2-ldrh.ll U utils/TableGen/TableGen.cpp U utils/TableGen/DisassemblerEmitter.cpp D utils/TableGen/RISCDisassemblerEmitter.h D utils/TableGen/RISCDisassemblerEmitter.cpp U Makefile.rules U lib/Target/ARM/ARMInstrNEON.td U lib/Target/ARM/Makefile U lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp U lib/Target/ARM/AsmPrinter/ARMInstPrinter.h D lib/Target/ARM/Disassembler U lib/Target/ARM/ARMInstrFormats.td U lib/Target/ARM/ARMAddressingModes.h U lib/Target/ARM/Thumb2ITBlockPass.cpp llvm-svn: 98640
* Initial ARM/Thumb disassembler check-in. It consists of a tablgen backendJohnny Chen2010-03-161-0/+8
| | | | | | | | | | | | | | | | | | (RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb, and the disassembler core which invokes the decoder function and builds up the MCInst based on the decoded Opcode. Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm instructions to help disassembly. We also changed the output of the addressing modes to omit the '+' from the assembler syntax #+/-<imm> or +/-<Rm>. See, for example, A8.6.57/58/60. And modified test cases to not expect '+' in +reg or #+num. For example, ; CHECK: ldr.w r9, [r7, #28] llvm-svn: 98637
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