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path: root/llvm/utils/TableGen/RegisterInfoEmitter.cpp
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* Eliminate TargetRegisterDesc::ImmSubRegs. It's no longer in use.Evan Cheng2008-06-301-22/+1
| | | | llvm-svn: 52892
* Fixes the last x86-64 test failure in compat.exp:Dale Johannesen2008-06-261-0/+2
| | | | | | | | | | | | | <16 x float> is 64-byte aligned (for some reason), which gets us into the stack realignment code. The computation changing FP-relative offsets to SP-relative was broken, assiging a spill temp to a location also used for parameter passing. This fixes it by rounding up the stack frame to a multiple of the largest alignment (I concluded it wasn't fixable without doing this, but I'm not very sure.) llvm-svn: 52750
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-1/+1
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* VisualStudio project files updated. #include <algorithm> added to make ↵Chuck Rose III2008-04-151-0/+1
| | | | | | VisualStudio happy. Also had to undefine setjmp because of #include <csetjmp> turning setjmp into _setjmp in VisualStudio. llvm-svn: 49743
* Sort sub-registers and super-registers lists according to super-sub register ↵Evan Cheng2008-04-151-2/+27
| | | | | | relations. e.g. X86::RAX sub-register list is EAX, AX, AL, AH (order of last two are not guaranteed). llvm-svn: 49714
* Add explicit keywords.Dan Gohman2008-03-251-1/+1
| | | | llvm-svn: 48801
* emit an ID # for each regclass ID. Chris doesn't like to have to count.Chris Lattner2008-03-111-1/+1
| | | | llvm-svn: 48200
* Rename PrintableName to Name.Bill Wendling2008-02-261-4/+4
| | | | llvm-svn: 47629
* Change "Name" to "AsmName" in the target register info. Gee, a refactoring toolBill Wendling2008-02-261-2/+2
| | | | | | would have been a Godsend here! llvm-svn: 47625
* Some platforms use the same name for 32-bit and 64-bit registers (likeBill Wendling2008-02-241-1/+11
| | | | | | | | | %r3 on PPC) in their ASM files. However, it's hard for humans to read during debugging. Adding a new field to the register data that lets you specify a different name to be printed than the one that goes into the ASM file -- %x3 instead of %r3, for instance. llvm-svn: 47534
* Rename MRegisterInfo to TargetRegisterInfo.Dan Gohman2008-02-101-3/+3
| | | | llvm-svn: 46930
* change getQualifiedName to be a global function.Chris Lattner2008-01-051-10/+8
| | | | | | | | Split the pattern parsing code out from the dag isel emitter into it's own file. No functionality change. llvm-svn: 45632
* remove attributions from utils.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45419
* Add parameter to getDwarfRegNum to permit targetsDale Johannesen2007-11-131-1/+1
| | | | | | | | to use different mappings for EH and debug info; no functional change yet. Fix warning in X86CodeEmitter. llvm-svn: 44056
* Fix on 64-bit machines.Owen Anderson2007-11-121-1/+1
| | | | llvm-svn: 44001
* Use TableGen to emit information for dwarf register numbers. Anton Korobeynikov2007-11-111-14/+53
| | | | | | | | This makes DwarfRegNum to accept list of numbers instead. Added three different "flavours", but only slightly tested on x86-32/linux. Please check another subtargets if possible, llvm-svn: 43997
* Interchange Dwarf numbers of ESP and EBP on x86 Darwin.Dale Johannesen2007-11-071-1/+1
| | | | | | Much improvement in exception handling. llvm-svn: 43794
* Add CopyCost to TargetRegisterClass. This specifies the cost of copying a valueEvan Cheng2007-09-191-2/+4
| | | | | | between two registers in the specific class. llvm-svn: 42123
* This is the patch to provide clean intrinsic function overloading support in ↵Chandler Carruth2007-08-041-1/+1
| | | | | | | | LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future. This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported. llvm-svn: 40807
* VStudio compiler errors and placing Function*->ExFunc map under ↵Chuck Rose III2007-07-271-2/+2
| | | | | | | | | | | | | ManagedStatic control. This commit fixes two things. One is a pair of VStudio compiler errors stemming from variables which defined within the for loop statement and also within the body of the for loop. I fixed these by renaming one of the two variables. Additionally, I've made the Function*->ExFunc map in ExternalFunctions.cpp a ManagedStatic object, so that cleanup will be done on llvm_shutdown. In repeated uses of the interpreter, where the same Function* address may get used for completely differnet functions, this was causing a crash. llvm-svn: 40558
* Have register info provide the inverse mapping of register->superregisters. ↵Christopher Lamb2007-07-261-3/+43
| | | | | | PR1350 llvm-svn: 40519
* One additional field in TargetRegisterDesc.Evan Cheng2007-06-271-1/+1
| | | | llvm-svn: 37760
* Add immediate sub-registers.Evan Cheng2007-06-261-0/+21
| | | | llvm-svn: 37738
* Add support to tablegen for specifying subregister classes on a per register ↵Christopher Lamb2007-06-131-0/+39
| | | | | | class basis. llvm-svn: 37572
* Patches by Chuck Rose to unbreak V Studio builds.Bill Wendling2007-06-041-0/+1
| | | | | | Thanks Chuck! llvm-svn: 37428
* Remove the operator<< for MVT::ValueType in preparation for MVT::ValueTypeDan Gohman2007-06-041-1/+1
| | | | | | | being changed from an enum to an integer type, which can't have a custom operator<< overload. llvm-svn: 37412
* A bit of feedback from Chris that I missed; error rather than asserting.Nate Begeman2007-05-011-2/+5
| | | | llvm-svn: 36619
* llvm bug #1350, parts 1, 2, and 3.Nate Begeman2007-05-011-0/+36
| | | | llvm-svn: 36618
* Bug fix; add super-registers sets.Evan Cheng2007-04-211-11/+58
| | | | llvm-svn: 36296
* Add sub-registers sets.Evan Cheng2007-04-201-6/+61
| | | | llvm-svn: 36278
* emit an enum value for the # of target registers.Chris Lattner2007-02-261-2/+2
| | | | llvm-svn: 34624
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-6/+7
| | | | llvm-svn: 32333
* Use an enumeration to eliminate data relocations.Jim Laskey2006-07-211-1/+11
| | | | llvm-svn: 29249
* Make sub- and super- register classes const.Evan Cheng2006-07-191-4/+5
| | | | llvm-svn: 29200
* Make sub- super- reg-class tables static.Evan Cheng2006-07-181-3/+6
| | | | llvm-svn: 29190
* Allow more use of iPTR in patterns.Evan Cheng2006-06-151-1/+1
| | | | llvm-svn: 28790
* Patches to make the LLVM sources more -pedantic clean. Patch providedChris Lattner2006-05-241-1/+1
| | | | | | by Anton Korobeynikov! This is a step towards closing PR786. llvm-svn: 28447
* Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.Evan Cheng2006-05-181-32/+0
| | | | llvm-svn: 28376
* Also add super- register classes info.Evan Cheng2006-05-111-0/+38
| | | | llvm-svn: 28221
* Add sub-register class information.Evan Cheng2006-05-091-3/+49
| | | | llvm-svn: 28195
* Add dwarf register numbering to register data.Jim Laskey2006-03-241-1/+18
| | | | llvm-svn: 27081
* This gets most of the backends building with HP HappyC++.Duraid Madina2005-12-271-1/+2
| | | | llvm-svn: 25029
* Support multiple ValueTypes per RegisterClass, needed for upcoming vectorNate Begeman2005-12-011-2/+19
| | | | | | work. This change has no effect on generated code. llvm-svn: 24563
* Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :)Chris Lattner2005-10-281-10/+9
| | | | llvm-svn: 24074
* Emit the value type for each register class.Chris Lattner2005-10-021-3/+4
| | | | llvm-svn: 23584
* Rename MRegisterDesc -> TargetRegisterDesc for consistencyChris Lattner2005-09-301-1/+1
| | | | llvm-svn: 23564
* remove some more initializersChris Lattner2005-09-301-1/+1
| | | | llvm-svn: 23562
* trim down the target info structs now that we have a preferred spill ↵Chris Lattner2005-09-301-17/+2
| | | | | | register class for each callee save register llvm-svn: 23560
* Compute a preferred spill register class for each callee-save registerChris Lattner2005-09-301-1/+24
| | | | llvm-svn: 23553
* allow regs to be in multiple reg classesChris Lattner2005-09-301-18/+2
| | | | llvm-svn: 23540
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