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* Emit argmemonly attribute for intrinsics.Igor Laevsky2015-08-131-33/+23
| | | | | | Differential Revision: http://reviews.llvm.org/D11352 llvm-svn: 244920
* Fix TableGen code generation for ReadNone attribute.Eric Christopher2015-07-301-1/+1
| | | | | | Patch by Pete Abred! llvm-svn: 243689
* [PM/AA] Extract the ModRef enums from the AliasAnalysis class inChandler Carruth2015-07-221-7/+8
| | | | | | | | | | | | | | | | | | | | | | | preparation for de-coupling the AA implementations. In order to do this, they had to become fake-scoped using the traditional LLVM pattern of a leading initialism. These can't be actual scoped enumerations because they're bitfields and thus inherently we use them as integers. I've also renamed the behavior enums that are specific to reasoning about the mod/ref behavior of functions when called. This makes it more clear that they have a very narrow domain of applicability. I think there is a significantly cleaner API for all of this, but I don't want to try to do really substantive changes for now, I just want to refactor the things away from analysis groups so I'm preserving the exact original design and just cleaning up the names, style, and lifting out of the class. Differential Revision: http://reviews.llvm.org/D10564 llvm-svn: 242963
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-291-1/+1
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* Add initial support for the convergent attribute.Owen Anderson2015-05-261-1/+10
| | | | llvm-svn: 238264
* This patch adds support for the vector quadword add/sub instructions introducedKit Barton2015-05-251-1/+3
| | | | | | | | | | | | | | | | | | | | in POWER8: vadduqm vaddeuqm vaddcuq vaddecuq vsubuqm vsubeuqm vsubcuq vsubecuq In addition to adding the instructions themselves, it also adds support for the v1i128 type for intrinsics (Intrinsics.td, Function.cpp, and IntrinsicEmitter.cpp). http://reviews.llvm.org/D9081 llvm-svn: 238144
* Re-instate the pragma optimize hack for MSVC, but not clang-clReid Kleckner2015-02-261-0/+8
| | | | | | Reverts commit r230686 with define modifications. llvm-svn: 230692
* Remove stale pragma hack for an unsupported MSVC versionReid Kleckner2015-02-261-8/+0
| | | | llvm-svn: 230686
* Masked Gather and Scatter Intrinsics.Elena Demikhovsky2015-02-081-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gather and Scatter are new introduced intrinsics, comming after recently implemented masked load and store. This is the first patch for Gather and Scatter intrinsics. It includes only the syntax, parsing and verification. Gather and Scatter intrinsics allow to perform multiple memory accesses (read/write) in one vector instruction. The intrinsics are not target specific and will have the following syntax: Gather: declare <16 x i32> @llvm.masked.gather.v16i32(<16 x i32*> <vector of ptrs>, i32 <alignment>, <16 x i1> <mask>, <16 x i32> <passthru>) declare <8 x float> @llvm.masked.gather.v8f32(<8 x float*><vector of ptrs>, i32 <alignment>, <8 x i1> <mask>, <8 x float><passthru>) Scatter: declare void @llvm.masked.scatter.v8i32(<8 x i32><vector value to be stored> , <8 x i32*><vector of ptrs> , i32 <alignment>, <8 x i1> <mask>) declare void @llvm.masked.scatter.v16i32(<16 x i32> <vector value to be stored> , <16 x i32*> <vector of ptrs>, i32 <alignment>, <16 x i1><mask> ) Vector of ptrs - a set of source/destination addresses, to load/store the value. Mask - switches on/off vector lanes to prevent memory access for switched-off lanes vector of ptrs, value and mask should have the same vector width. These are code examples where gather / scatter should be used and will allow function vectorization ;void foo1(int * restrict A, int * restrict B, int * restrict C) { ; for (int i=0; i<SIZE; i++) { ; A[i] = B[C[i]]; ; } ;} ;void foo3(int * restrict A, int * restrict B) { ; for (int i=0; i<SIZE; i++) { ; A[B[i]] = i+5; ; } ;} Tests will come in the following patches, with CodeGen and Vectorizer. http://reviews.llvm.org/D7433 llvm-svn: 228521
* Intrinsics: introduce llvm_any_ty aka ValueType AnyRamkumar Ramachandra2015-01-221-5/+6
| | | | | | | | | | | | | | | Specifically, gc.result benefits from this greatly. Instead of: gc.result.int.* gc.result.float.* gc.result.ptr.* ... We now have a gc.result.* that can specialize to literally any type. Differential Revision: http://reviews.llvm.org/D7020 llvm-svn: 226857
* Masked Load/Store - Changed the order of parameters in intrinsics.Elena Demikhovsky2014-12-251-1/+5
| | | | | | | No functional changes. The documentation is coming. llvm-svn: 224829
* Masked Load / Store Intrinsics - the CodeGen part.Elena Demikhovsky2014-12-041-1/+9
| | | | | | | | | | | | | | | | | | I'm recommiting the codegen part of the patch. The vectorizer part will be send to review again. Masked Vector Load and Store Intrinsics. Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 llvm-svn: 223348
* Revert "Masked Vector Load and Store Intrinsics."Duncan P. N. Exon Smith2014-11-281-9/+1
| | | | | | | | | | | This reverts commit r222632 (and follow-up r222636), which caused a host of LNT failures on an internal bot. I'll respond to the commit on the list with a reproduction of one of the failures. Conflicts: lib/Target/X86/X86TargetTransformInfo.cpp llvm-svn: 222936
* Masked Vector Load and Store Intrinsics.Elena Demikhovsky2014-11-231-1/+9
| | | | | | | | | | | | | | Introduced new target-independent intrinsics in order to support masked vector loads and stores. The loop vectorizer optimizes loops containing conditional memory accesses by generating these intrinsics for existing targets AVX2 and AVX-512. The vectorizer asks the target about availability of masked vector loads and stores. Added SDNodes for masked operations and lowering patterns for X86 code generator. Examples: <16 x i32> @llvm.masked.load.v16i32(i8* %addr, <16 x i32> %passthru, i32 4 /* align */, <16 x i1> %mask) declare void @llvm.masked.store.v8f64(i8* %addr, <8 x double> %value, i32 4, <8 x i1> %mask) Scalarizer for other targets (not AVX2/AVX-512) will be done in a separate patch. http://reviews.llvm.org/D6191 llvm-svn: 222632
* Moved out IIT_V64 from common values section.Robert Khasanov2014-10-201-5/+5
| | | | | | Thanks Juergen Ributzka for notice. llvm-svn: 220224
* [AVX512] Added intrinsics for VPCMPEQB and VPCMPEQW.Robert Khasanov2014-09-301-18/+20
| | | | | | Added new operand type for intrinsics (IIT_V64) llvm-svn: 218668
* Simplify creation of a bunch of ArrayRefs by using None, makeArrayRef or ↵Craig Topper2014-08-271-2/+1
| | | | | | just letting them be implicitly created. llvm-svn: 216525
* [TABLEGEN] Do not crash on intrinsics with names longer than 40 charactersJustin Holewinski2014-07-171-2/+3
| | | | | | Differential Revision: http://reviews.llvm.org/D4537 llvm-svn: 213253
* TableGen: introduce support for MSBuiltinSaleem Abdulrasool2014-07-041-0/+54
| | | | | | | | | | | | | Add MSBuiltin which is similar in vein to GCCBuiltin. This allows for adding intrinsics for Microsoft compatibility to individual instructions. This is needed to permit the creation of ARM specific MSVC extensions. This is not currently in use, and requires an associated change in clang to enable use of the intrinsics defined by this new class. This merely sets the LLVM portion of the infrastructure in place to permit the use of this functionality. A separate set of changes will enable the new intrinsics. llvm-svn: 212350
* Replace some assert(0)'s with llvm_unreachable.Craig Topper2014-06-181-1/+1
| | | | llvm-svn: 211141
* Fix redefinition of default argument, found by modules build. It's notRichard Smith2014-04-201-5/+4
| | | | | | | | | entirely clear whether this should be valid with modules enabled, but the fixed code is cleaner regardless. Also fix a TU-local type that accidentally had external linkage. llvm-svn: 206714
* remove some dead codeNuno Lopes2014-04-171-2/+0
| | | | | | | | | | | | | | | lib/Analysis/IPA/InlineCost.cpp | 18 ------------------ lib/Analysis/RegionPass.cpp | 1 - lib/Analysis/TypeBasedAliasAnalysis.cpp | 1 - lib/Transforms/Scalar/LoopUnswitch.cpp | 21 --------------------- lib/Transforms/Utils/LCSSA.cpp | 2 -- lib/Transforms/Utils/LoopSimplify.cpp | 6 ------ utils/TableGen/AsmWriterEmitter.cpp | 13 ------------- utils/TableGen/DFAPacketizerEmitter.cpp | 7 ------- utils/TableGen/IntrinsicEmitter.cpp | 2 -- 9 files changed, 71 deletions(-) llvm-svn: 206506
* Intrinsics: add LLVMHalfElementsVectorType constraintTim Northover2014-03-291-1/+4
| | | | | | | | | | This is like the LLVMMatchType, except the verifier checks that the second argument is a vector with the same base type and half the number of elements. This will be used by the ARM64 backend. llvm-svn: 205079
* Intrinsics: expand semantics of LLVMExtendedVectorType (& trunc)Tim Northover2014-03-281-6/+6
| | | | | | | | | | | | These are used in the ARM backends to aid type-checking on patterns involving intrinsics. By making sure one argument is an extended/truncated version of another. However, there's no reason to limit them to just vectors types. For example AArch64 has the instruction "uqshrn sD, dN, #imm" which would naturally use an intrinsic taking an i64 and returning an i32. llvm-svn: 205003
* Expose "noduplicate" attribute as a property for intrinsics.Eli Bendersky2014-03-181-1/+11
| | | | | | | | | | | | The "noduplicate" function attribute exists to prevent certain optimizations from duplicating calls to the function. This is important on platforms where certain function call duplications are unsafe (for example execution barriers for CUDA and OpenCL). This patch makes it possible to specify intrinsics as "noduplicate" and translates that to the appropriate function attribute. llvm-svn: 204200
* Now that we have C++11, turn simple functors into lambdas and remove a ton ↵Benjamin Kramer2014-03-011-17/+5
| | | | | | | | of boilerplate. No intended functionality change. llvm-svn: 202588
* Stackmaps are used for OSR exits, which is a custom kind of unwinding. ↵Filip Pizlo2014-02-201-0/+1
| | | | | | | | | | | | | | | | | Hence, they should not be marked nounwind. Marking them nounwind caused crashes in the WebKit FTL JIT, because if we enable sufficient optimizations, LLVM starts eliding compact_unwind sections (or any unwind data for that matter), making deoptimization via stackmaps impossible. This changes the stackmap intrinsic to be may-throw, adds a test for exactly the sympton that WebKit saw, and fixes TableGen to handle un-attributed intrinsics. Thanks to atrick and philipreames for reviewing this. llvm-svn: 201826
* Replace tablegen uses of EVT with MVT. Add isOverloaded() to MVT to ↵Craig Topper2014-01-241-6/+5
| | | | | | facilitate. Remove TGValueTypes.cpp since its unused now (and may have been before). llvm-svn: 200036
* Small improvement to InstrinsicEmitter::EmitAttributes. This change removes ↵Owen Anderson2013-11-161-17/+38
| | | | | | | | the “pushing” and “clearing” of the SmallVector and instead uses const arrays to pass the attributeKinds to AttributeSet::get . Patch by Aditya Nandakumar. llvm-svn: 194899
* Enable variable arguments support for intrinsics.Andrew Trick2013-10-311-1/+4
| | | | llvm-svn: 193766
* whitespaceAndrew Trick2013-10-311-49/+49
| | | | llvm-svn: 193765
* Initial support for Neon scalar instructions.Jiangning Liu2013-09-241-1/+3
| | | | | | | | | | Patch by Ana Pazos. 1.Added support for v1ix and v1fx types. 2.Added Scalar Pairwise Reduce instructions. 3.Added initial implementation of Scalar Arithmetic instructions. llvm-svn: 191263
* Fix a bug in TableGen where the intrinsic function name recognizer could ↵Justin Holewinski2013-07-251-0/+18
| | | | | | | | | | | | | | | | | mis-identify names if one was a prefix substring of the other For two intrinsics 'llvm.nvvm.texsurf.handle' and 'llvm.nvvm.texsurf.handle.internal', TableGen was emitting matching code like: if (Name.startswith("llvm.nvvm.texsurf.handle")) ... if (Name.startswith("llvm.nvvm.texsurf.handle.internal")) ... We can never match "llvm.nvvm.texsurf.handle.internal" here because it will always be erroneously matched by the first condition. The fix is to sort the intrinsic names and emit them in reverse order. llvm-svn: 187119
* Extend 'readonly' and 'readnone' to work on function arguments as well asNick Lewycky2013-07-061-0/+6
| | | | | | | functions. Make the function attributes pass add it to known library functions and when it can deduce it. llvm-svn: 185735
* Use the AttributeSet instead of AttributeWithIndex.Bill Wendling2013-01-271-7/+6
| | | | | | | In the future, AttributeWithIndex won't be used anymore. Besides, it exposes the internals of the AttributeSet to outside users, which isn't goodness. llvm-svn: 173606
* Support for half intrinsics. Pushes MMX into slower encoding path.Michael Ilseman2013-01-111-18/+20
| | | | llvm-svn: 172159
* Change 'AttrVal' to 'AttrKind' to better reflect that it's a kind of ↵Bill Wendling2012-12-221-1/+1
| | | | | | attribute instead of the value of the attribute. llvm-svn: 170972
* Rename the 'Attributes' class to 'Attribute'. It's going to represent a ↵Bill Wendling2012-12-191-6/+6
| | | | | | single attribute in the future. llvm-svn: 170502
* s/AttrListPtr/AttributeSet/g to better label what this class is going to be ↵Bill Wendling2012-12-071-5/+5
| | | | | | in the near future. llvm-svn: 169651
* Make the AttrListPtr object a part of the LLVMContext.Bill Wendling2012-11-201-1/+1
| | | | | | | | | When code deletes the context, the AttributeImpls that the AttrListPtr points to are now invalid. Therefore, instead of keeping a separate managed static for the AttrListPtrs that's reference counted, move it into the LLVMContext and delete it when deleting the AttributeImpls. llvm-svn: 168354
* Remove exception handling usage from tblgen.Joerg Sonnenberger2012-10-251-5/+6
| | | | | | | | | | | Most places can use PrintFatalError as the unwinding mechanism was not used for anything other than printing the error. The single exception was CodeGenDAGPatterns.cpp, where intermediate errors during type resolution were ignored to simplify incremental platform development. This use is replaced by an error flag in TreePattern and bailout earlier in various places if it is set. llvm-svn: 166712
* Add an enum for the return and function indexes into the AttrListPtr object. ↵Bill Wendling2012-10-151-2/+2
| | | | | | This gets rid of some magic numbers. llvm-svn: 165924
* Attributes RewriteBill Wendling2012-10-151-4/+4
| | | | | | | | | | Convert the internal representation of the Attributes class into a pointer to an opaque object that's uniqued by and stored in the LLVMContext object. The Attributes class then becomes a thin wrapper around this opaque object. Eventually, the internal representation will be expanded to include attributes that represent code generation options, etc. llvm-svn: 165917
* Pass into the AttributeWithIndex::get method an ArrayRef of attributeBill Wendling2012-10-101-35/+27
| | | | | | enums. These are then created via the correct Attributes creation method. llvm-svn: 165607
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-45/+91
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
* switch AttrListPtr::get to take an ArrayRef, simplifying a lot of clients.Chris Lattner2012-05-281-1/+2
| | | | llvm-svn: 157556
* rdar://11542750 - llvm.trap should be marked no return.Chris Lattner2012-05-271-4/+21
| | | | llvm-svn: 157551
* Reimplement the intrinsic verifier to use the same table as ↵Chris Lattner2012-05-271-137/+0
| | | | | | | | | | | | | Intrinsic::getDefinition, making it stronger and more sane. Delete the code from tblgen that produced the old code. Besides being a path forward in intrinsic sanity, this also eliminates a bunch of machine generated code that was compiled into Function.o llvm-svn: 157545
* move some code around so that Verifier.cpp can get access to the intrinsic ↵Chris Lattner2012-05-271-33/+4
| | | | | | info table. llvm-svn: 157540
* enhance the intrinsic info table to encode what *kind* of Any argumentChris Lattner2012-05-271-12/+20
| | | | | | | it is (at the cost of 45 bytes of extra table space) so that the verifier can start using it. llvm-svn: 157536
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