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path: root/llvm/utils/TableGen/InstrInfoEmitter.cpp
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* [Tablegen][MCInstPredicate] Removed redundant template argument from class TI...Andrea Di Biagio2018-08-141-11/+10
* [Tablegen] Replace uses of formatted_raw_ostream with raw_ostream in the pred...Andrea Di Biagio2018-08-131-26/+29
* [MC][PredicateExpander] Extend the grammar to support simple switch and retur...Andrea Di Biagio2018-08-091-6/+4
* [cfi-verify] Support AArch64.Joel Galenson2018-07-131-0/+1
* [RFC][Patch 2/3] Add a MCSubtargetInfo hook to resolve variant scheduling cla...Andrea Di Biagio2018-05-251-0/+55
* [RFC][Patch 1/3] Add a new class of predicates for variant scheduling classes.Andrea Di Biagio2018-05-251-3/+32
* [X86][MIPS][ARM] New machine instruction property 'isMoveReg'Petar Jovanovic2018-05-231-0/+1
* [MachineOperand][Target] MachineOperand::isRenamable semantics changesGeoff Berry2018-02-231-3/+6
* [Targets] Don't automatically include the scheduler class enum from *GenInstr...Craig Topper2017-12-131-1/+9
* [TableGen] Use StringRef instead of std::string for CodeGenInstruction namesp...Craig Topper2017-07-071-6/+6
* [AMDGPU, PowerPC, TableGen] Fix some Clang-tidy modernize and Include What Yo...Eugene Zelenko2016-12-121-10/+14
* TableGen: Use StringRef instead of const std::string& in return vals.Matthias Braun2016-12-041-1/+2
* This reapplies r281304. The issue was that I had missedSjoerd Meijer2016-09-141-0/+1
* Revert of r281304 as it is causing build bot failures in hexagonSjoerd Meijer2016-09-131-1/+0
* This adds a new field isAdd to MCInstrDesc. The ARM and Hexagon instructionSjoerd Meijer2016-09-131-0/+1
* XRay: Add entry and exit sledsDean Michael Berris2016-07-141-3/+3
* [TableGen] Use range-based for loop. NFCCraig Topper2016-02-161-2/+2
* [TableGen] Don't call emitSourceFileHeader a second time in the middle of the...Craig Topper2016-02-111-3/+1
* [TableGen] Whitespace cleanup in output file. NFCCraig Topper2016-02-111-14/+14
* [TableGen] Simplify code slightly. NFCCraig Topper2016-02-111-6/+3
* [TableGen] Store result of getInstructionsByEnumValue in an ArrayRef instead ...Craig Topper2016-02-011-6/+6
* [TableGen] Replace instructions() with getInstructionsByEnumValue(). No need ...Craig Topper2016-01-171-2/+2
* Replace uint16_t with the MCPhysReg typedef in many places. A lot of physical...Craig Topper2015-12-051-1/+1
* [WinEH] Make FuncletLayout more robust against catchretDavid Majnemer2015-10-011-3/+3
* Re-commit r247216: "Fix Clang-tidy misc-use-override warnings, other minor fi...Hans Wennborg2015-09-101-22/+20
* Revert r247216: "Fix Clang-tidy misc-use-override warnings, other minor fixes"Hans Wennborg2015-09-101-20/+22
* Fix Clang-tidy misc-use-override warnings, other minor fixesHans Wennborg2015-09-101-22/+20
* Add support for the convergent flag at the MC and MachineInstr levels.Owen Anderson2015-05-281-31/+32
* Expand the Flags field of MCInstrDesc to 64 bits, while simultaneouslyOwen Anderson2015-05-281-2/+2
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-261-4/+4
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-131-4/+4
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-131-4/+4
* Fix tablegen's PrintFatalError function to run registered fileJames Y Knight2015-05-111-4/+2
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-4/+4
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-4/+4
* Use the variable names from the TargetInstrInfo source when weEric Christopher2015-03-131-5/+7
* Add a return after the llvm namespace code for a little extraEric Christopher2015-03-131-3/+3
* Fix a couple of depedent->dependent typos.Eric Christopher2015-02-261-1/+1
* Reverting r229831 due to multiple ARM/PPC/MIPS build-bot failures.Michael Kuperstein2015-02-191-4/+4
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-02-191-4/+4
* Target: Allow target specific operand typesTom Stellard2015-01-121-1/+1
* Tablegen output formatting fixes.Craig Topper2014-11-231-2/+4
* Add isInsertSubreg property.Quentin Colombet2014-08-201-0/+1
* Add isExtractSubreg property.Quentin Colombet2014-08-201-0/+1
* Add isRegSequence property.Quentin Colombet2014-08-111-0/+1
* Make getNamedOperandIdx readonlyMatt Arsenault2014-08-011-0/+1
* [C++11] Use 'nullptr' in tablegen output files.Craig Topper2014-04-301-5/+5
* c++11: Tidy up tblgen w/ range loops.Jim Grosbach2014-04-181-62/+53
* Fix a vector that was passed by value instead of reference.Craig Topper2014-02-051-5/+5
* [weak vtables] Remove a bunch of weak vtablesJuergen Ributzka2013-11-191-4/+6
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