summaryrefslogtreecommitdiffstats
path: root/llvm/utils/TableGen/InstrInfoEmitter.cpp
Commit message (Collapse)AuthorAgeFilesLines
...
* Don't fill in fields that no longer exist.Chris Lattner2006-04-201-2/+1
| | | | llvm-svn: 27898
* If we want to emit things in enum order, use getInstructionsByEnumValue toChris Lattner2006-01-271-15/+25
| | | | | | | | | | get the order, don't compute it ourselves. Don't emit stuff like (14<<0), emit 14 instead. Don't attempt to get target properties for builtin instructions. llvm-svn: 25672
* almost got the HP-UX tester up.. :)Duraid Madina2005-12-301-1/+1
| | | | llvm-svn: 25051
* Teach tblgen about instruction operands that have multiple MachineInstrChris Lattner2005-11-191-6/+16
| | | | | | | operands, digging into them to find register values (used on X86). Patch by Evan Cheng! llvm-svn: 24424
* Allow itineraries to be passed through the Target Machine.Jim Laskey2005-11-011-1/+1
| | | | llvm-svn: 24139
* Keep VC++ happy.Jeff Cohen2005-11-011-0/+1
| | | | llvm-svn: 24137
* Emit itinerary class in instruction info.Jim Laskey2005-10-311-1/+33
| | | | llvm-svn: 24122
* Switch more code over to using getValueAsListOfDefs. Look at all the -'s. :)Chris Lattner2005-10-281-30/+15
| | | | llvm-svn: 24074
* spell this variable rightChris Lattner2005-08-261-1/+1
| | | | llvm-svn: 23095
* Expose a new flag to TargetInstrInfoChris Lattner2005-08-261-0/+2
| | | | llvm-svn: 23094
* add a marker at the end of the instruction enum listChris Lattner2005-08-261-0/+1
| | | | llvm-svn: 23090
* Emit this:Chris Lattner2005-08-191-2/+1
| | | | | | | | | | | | | static const TargetOperandInfo OperandInfo6[] = { { &PPC32::CRRCRegClass }, { 0 }, }; instead of this: static const TargetOperandInfo OperandInfo6[] = { { PPC32::CRRCRegisterClass }, { 0 }, }; For operand information, which does not require dynamic (startup-time) initialization. llvm-svn: 22931
* Emit real operand info for instructions. This currently works but is badChris Lattner2005-08-191-10/+44
| | | | | | | in one way: the generated tables require dynamic initialization for the register classes. This will be fixed in a future patch. llvm-svn: 22919
* For now, just emit empty operand info structures.Chris Lattner2005-08-191-2/+23
| | | | llvm-svn: 22910
* now that all of the targets are clean w.r.t. the number of operands for eachChris Lattner2005-08-191-3/+11
| | | | | | | | instruction defined, actually emit this to the InstrInfoDescriptor, which allows an assert in the machineinstrbuilder to do some checking for us, and is required by the dag->dag emitter llvm-svn: 22895
* revert this change, which causes breakage, temporarilyChris Lattner2005-08-181-1/+3
| | | | llvm-svn: 22880
* When emitting implicit use/def lists, only emit each unique list once. ThoughChris Lattner2005-08-181-19/+42
| | | | | | | | | | | | LLVM is able to merge identical static const globals, GCC isn't, and this caused some bloat in the generated data. This has a marginal effect on PPC, shrinking the implicit sets from 10->4, but shrinks X86 from 179 to 23, a much bigger reduction. This should speed up the register allocator as well by reducing the dcache footprint for this static data. llvm-svn: 22879
* Fill in the numOperands field of the TargetInstrDescriptor struct from theChris Lattner2005-08-181-1/+1
| | | | | | .td file. llvm-svn: 22873
* Remove trailing whitespaceMisha Brukman2005-04-221-4/+4
| | | | llvm-svn: 21428
* Refactor code for numbering instructions into CodeGenTarget.Chris Lattner2005-01-221-10/+7
| | | | llvm-svn: 19758
* Expose isConvertibleToThreeAddress and isCommutable bits to the code generator.Chris Lattner2005-01-021-0/+2
| | | | llvm-svn: 19243
* Add support for the isLoad and isStore flags, needed by the instruction ↵Nate Begeman2004-09-281-0/+2
| | | | | | scheduler llvm-svn: 16554
* Turn the hasDelaySlot flag into the M_DELAY_SLOT_FLAGChris Lattner2004-09-281-0/+1
| | | | llvm-svn: 16553
* Do not #include files into the llvm namespaceChris Lattner2004-08-171-2/+5
| | | | llvm-svn: 15849
* Instructions no longer need to have names.Chris Lattner2004-08-011-1/+6
| | | | llvm-svn: 15399
* Add, and start using, the CodeGenInstruction class. This class representsChris Lattner2004-08-011-40/+36
| | | | | | an instance of the Instruction tablegen class. llvm-svn: 15385
* Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h)Chris Lattner2004-08-011-1/+1
| | | | llvm-svn: 15382
* Finegrainify namespacificationChris Lattner2004-08-011-3/+1
| | | | llvm-svn: 15381
* Support new flagChris Lattner2004-07-311-0/+1
| | | | llvm-svn: 15355
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+6
| | | | llvm-svn: 9903
* Added LLVM copyright header.John Criswell2003-10-201-0/+7
| | | | llvm-svn: 9305
* Change MRegisterDesc::AliasSet, TargetInstrDescriptor::ImplicitDefsAlkis Evlogimenos2003-10-081-2/+6
| | | | | | | | | | | | | | | | | | | | | and TargetInstrDescriptor::ImplicitUses to always point to a null terminated array and never be null. So there is no need to check for pointer validity when iterating over those sets. Code that looked like: if (const unsigned* AS = TID.ImplicitDefs) { for (int i = 0; AS[i]; ++i) { // use AS[i] } } was changed to: for (const unsigned* AS = TID.ImplicitDefs; *AS; ++AS) { // use *AS } llvm-svn: 8960
* Move support/tools/* back into utilsChris Lattner2003-10-051-0/+160
llvm-svn: 8875
OpenPOWER on IntegriCloud