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path: root/llvm/utils/TableGen/FixedLenDecoderEmitter.cpp
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* Fix a const violation in the generated disassembler.Benjamin Kramer2012-08-151-2/+2
| | | | llvm-svn: 161940
* Switch the fixed-length disassembler to be table-driven.Jim Grosbach2012-08-141-281/+722
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Refactor the TableGen'erated fixed length disassemblmer to use a table-driven state machine rather than a massive set of nested switch() statements. As a result, the ARM Disassembler (ARMDisassembler.cpp) builds much more quickly and generates a smaller end result. For a Release+Asserts build on a 16GB 3.4GHz i7 iMac w/ SSD: Time to compile at -O2 (averaged w/ hot caches): Previous: 35.5s New: 8.9s TEXT size: Previous: 447,251 New: 297,661 Builds in 25% of the time previously required and generates code 66% of the size. Execution time of the disassembler is only slightly slower (7% disassembling 10 million ARM instructions, 19.6s vs 21.0s). The new implementation has not yet been tuned, however, so the performance should almost certainly be recoverable should it become a concern. llvm-svn: 161888
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-1/+84
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
* Second part for the 153874 oneSilviu Baranga2012-04-021-3/+3
| | | | llvm-svn: 153875
* More const-correcting of FixedLenDecoderEmitter.Craig Topper2012-03-161-13/+17
| | | | llvm-svn: 152906
* Const-correct the FixedLenDecoderEmitter. Pass a few things by const ↵Craig Topper2012-03-161-53/+58
| | | | | | reference instead of value to avoid some copying. llvm-svn: 152899
* Spacing fixes. Mostly aligning arguments that spilled onto next line with ↵Craig Topper2012-03-161-37/+36
| | | | | | the opening parenthese instead of 2 spaces in. llvm-svn: 152889
* Remove unused field NumVariable from Filter class. Even it was needed the ↵Craig Topper2012-03-161-9/+3
| | | | | | same result could be found with VariableInstructions.size(). Also fix some typos in comments. llvm-svn: 152885
* Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions ↵Craig Topper2012-03-131-1/+2
| | | | | | declaration from class to run method since its only used there and was being reinitialized anyway. llvm-svn: 152616
* Tidy up. 80 columns.Jim Grosbach2012-02-291-13/+21
| | | | llvm-svn: 151764
* Teach the MC and disassembler about SoftFail, and hook it up to ↵James Molloy2012-02-091-2/+76
| | | | | | UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage. llvm-svn: 150169
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-9/+7
| | | | llvm-svn: 149814
* Fix unused variable warning in the rare circumstance that we have no ↵Owen Anderson2011-10-171-1/+4
| | | | | | feature-dependent instructions. llvm-svn: 142193
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-1/+1
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Subtarget getFeatureBits() returns a uint64_t, not unsigned.Bob Wilson2011-10-011-1/+1
| | | | llvm-svn: 140928
* Make sure to handle the case where emitPredicateMatch returns false. ↵Eli Friedman2011-09-081-1/+2
| | | | | | Noticed by inspection. llvm-svn: 139317
* Fix warning on windows; use of comparison with bool argument.James Molloy2011-09-081-1/+1
| | | | llvm-svn: 139286
* Fix a use of freed string contents.Andrew Trick2011-09-081-4/+4
| | | | | | Speculatively try to fix our windows testers with a patch I found on the internet. llvm-svn: 139279
* whitespaceAndrew Trick2011-09-081-2/+2
| | | | llvm-svn: 139278
* Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds ↵James Molloy2011-09-071-4/+52
| | | | | | predicate checking to the Disassembler. llvm-svn: 139250
* Allow the MCDisassembler to return a "soft fail" status code, indicating an ↵Owen Anderson2011-08-171-16/+22
| | | | | | | | instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment. Patch by James Molloy. llvm-svn: 137830
* Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly ↵Owen Anderson2011-08-091-2/+2
| | | | | | checking the success result of custom decoder hooks on singleton decodings. llvm-svn: 137171
* Make the FixedLengthDecoderEmitter smart enough to autogenerate decoders for ↵Owen Anderson2011-08-011-5/+9
| | | | | | encodings like "let Inst{11-7} = foo;", where the RHS has no bitwidth specifiers. llvm-svn: 136660
* The FixedLenDecoder needs to gracefully handle failing per-instruction ↵Owen Anderson2011-08-011-3/+3
| | | | | | decoder hooks in addition to per-operand decoder hooks. llvm-svn: 136645
* Enhance the fixed length disassembler to better handle operand decoding ↵Owen Anderson2011-08-011-2/+2
| | | | | | failures. llvm-svn: 136635
* Correctly handle scattered operands where the bits of the operand are ↵Owen Anderson2011-07-291-0/+5
| | | | | | contiguous, but out of order. llvm-svn: 136534
* Unconstify InitsDavid Greene2011-07-291-17/+16
| | | | | | Remove const qualifiers from Init references, per Chris' request. llvm-svn: 136531
* [AVX] Constify InitsDavid Greene2011-07-291-16/+17
| | | | | | | Make references to Inits const everywhere. This is the final step before making them unique. llvm-svn: 136485
* Third time's the charm for implementing tied operand decoding properly.Owen Anderson2011-07-291-6/+6
| | | | llvm-svn: 136478
* Fix a case where, when trying to track tied operands, we'd accidentally ↵Owen Anderson2011-07-291-3/+3
| | | | | | overwrite our mapping. llvm-svn: 136467
* Enhance the fixed-length decoder emitter to support tied operands.Owen Anderson2011-07-281-1/+13
| | | | llvm-svn: 136431
* Enhance the fixed-length decoder emitter to support parsing scattered fields.Owen Anderson2011-07-281-76/+91
| | | | llvm-svn: 136405
* Enhance the FixedLengthDecoder to be able to generate plausible-looking ↵Owen Anderson2011-07-191-108/+125
| | | | | | decoders for ARM. llvm-svn: 135524
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-111-17/+16
| | | | | | in multiple buildbots. llvm-svn: 134936
* [AVX] Make Inits FoldableDavid Greene2011-07-111-16/+17
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
* Don't require pseudo-instructions to carry encoding information.Jim Grosbach2011-07-061-4/+5
| | | | | | | | | | For now this is distinct from isCodeGenOnly, as code-gen-only instructions can (and often do) still have encoding information associated with them. Once we've migrated all of them over to true pseudo-instructions that are lowered to real instructions prior to the printer/emitter, we can remove isCodeGenOnly and just use isPseudo. llvm-svn: 134539
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-271-1/+3
| | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
* Enhance the fixed-length disassembler to support the callbacks necessary for ↵Owen Anderson2011-04-181-5/+10
| | | | | | symbolic disassembly. llvm-svn: 129708
* Fix a ton of comment typos found by codespell. Patch byChris Lattner2011-04-151-2/+2
| | | | | | Luis Felipe Strano Moraes! llvm-svn: 129558
* Ignore isCodeGenOnly instructions when generating diassembly tables.Owen Anderson2011-03-141-1/+2
| | | | llvm-svn: 127619
* Add FixedLenDecoderEmitter, the skeleton of a new disassembler emitter for ↵Owen Anderson2011-02-181-0/+1372
fixed-length instruction encodings. A major part of its (eventual) goal is to support a much cleaner separation between disassembly callbacks provided by the target and the disassembler emitter itself, i.e. not requiring hardcoding of knowledge in tblgen like the existing disassembly emitters do. The hope is that some day this will allow us to replace the existing non-Thumb ARM disassembler and remove some of the hacks the old one introduced to tblgen. llvm-svn: 125966
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