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path: root/llvm/utils/TableGen/FastISelEmitter.cpp
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* Update the file headers across all of the LLVM projects in the monorepoChandler Carruth2019-01-191-4/+3
| | | | | | | | | | | | | | | | | to reflect the new license. We understand that people may be surprised that we're moving the header entirely to discuss the new license. We checked this carefully with the Foundation's lawyer and we believe this is the correct approach. Essentially, all code in the project is now made available by the LLVM project under our new license, so you will see that the license headers include that license only. Some of our contributors have contributed code under our old license, and accordingly, we have retained a copy of our old license notice in the top-level files in each project and repository. llvm-svn: 351636
* TableGen/ISel: Allow PatFrag predicate code to access captured operandsNicolai Haehnle2018-11-301-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This simplifies writing predicates for pattern fragments that are automatically re-associated or commuted. For example, a followup patch adds patterns for fragments of the form (add (shl $x, $y), $z) to the AMDGPU backend. Such patterns are automatically commuted to (add $z, (shl $x, $y)), which makes it basically impossible to refer to $x, $y, and $z generically in the PredicateCode. With this change, the PredicateCode can refer to $x, $y, and $z simply as `Operands[i]`. Test confirmed that there are no changes to any of the generated files when building all (non-experimental) targets. Change-Id: I61c00ace7eed42c1d4edc4c5351174b56b77a79c Reviewers: arsenm, rampitec, RKSimon, craig.topper, hfinkel, uweigand Subscribers: wdng, tpr, llvm-commits Differential Revision: https://reviews.llvm.org/D51994 llvm-svn: 347992
* Use the container form llvm::sort(C, ...)Fangrui Song2018-09-301-1/+1
| | | | | | | There are a few leftovers in rL343163 which span two lines. This commit changes these llvm::sort(C.begin(), C.end, ...) to llvm::sort(C, ...) llvm-svn: 343426
* [TableGen] Use std::move where possible in InstructionMemo constructor. NFCI.Simon Pilgrim2018-08-281-6/+6
| | | | | | Requested in post-commit review for rL339670 llvm-svn: 340819
* [TableGen] Pass string/vector types by const reference (PR37666). NFCISimon Pilgrim2018-08-141-5/+6
| | | | llvm-svn: 339670
* Revert r334764, as it breaks some botsFlorian Hahn2018-06-141-24/+25
| | | | llvm-svn: 334767
* [TableGen] Make TreePatternNode::getChild return a reference (NFC)Florian Hahn2018-06-141-25/+24
| | | | | | | | The return value of TreePatternNode::getChild is never null. This patch also updates various places that use return values of getChild to also use references. Those changes were suggested post-commit for D47463. llvm-svn: 334764
* [TableGen] Use explicit constructor for InstMemoFlorian Hahn2018-05-291-2/+8
| | | | | | | This should fix a few buildbot failures with old GCC versions. llvm-svn: 333448
* [TableGen] Fix leaking of PhysRegInputs.Florian Hahn2018-05-291-13/+17
| | | | | | | | | | | | | Instead of dynamically allocating the vector for PhysRegs, we can allocate it on the stack and move it into InstructionMemo. Reviewers: mcrosier, craig.topper, RKSimon, dsanders Reviewed By: dsanders Differential Revision: https://reviews.llvm.org/D47461 llvm-svn: 333438
* [FastISel] Permit instructions to be skipped for FastISel generation.Simon Dardis2018-05-221-0/+7
| | | | | | | | | | | | | | | | | | | Some ISA's such as microMIPS32(R6) have instructions which are near identical for code generation purposes, e.g. xor and xor16. These instructions take the same value types for operands and return values, have the same instruction predicates and map to the same ISD opcode. (These instructions do differ by register classes.) In such cases, the FastISel generator rejects the instruction definition. This patch borrows the 'FastIselShouldIgnore' bit from rL129692 and enables applying it to an instruction definition. Reviewers: mcrosier Differential Revision: https://reviews.llvm.org/D46953 llvm-svn: 332983
* [TableGen] Change std::sort to llvm::sort in response to r327219Mandeep Singh Grang2018-04-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | Summary: r327219 added wrappers to std::sort which randomly shuffle the container before sorting. This will help in uncovering non-determinism caused due to undefined sorting order of objects having the same key. To make use of that infrastructure we need to invoke llvm::sort instead of std::sort. Note: This patch is one of a series of patches to replace *all* std::sort to llvm::sort. Refer the comments section in D44363 for a list of all the required patches. Reviewers: stoklund, kparzysz, dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D45144 llvm-svn: 329451
* Strip trailing whitespaceSimon Pilgrim2017-10-061-8/+8
| | | | llvm-svn: 315070
* TableGen support for parameterized register class informationKrzysztof Parzyszek2017-09-141-8/+9
| | | | | | | | | | | | | | | | | | | | | | | | | This replaces TableGen's type inference to operate on parameterized types instead of MVTs, and as a consequence, some interfaces have changed: - Uses of MVTs are replaced by ValueTypeByHwMode. - EEVT::TypeSet is replaced by TypeSetByHwMode. This affects the way that types and type sets are printed, and the tests relying on that have been updated. There are certain users of the inferred types outside of TableGen itself, namely FastISel and GlobalISel. For those users, the way that the types are accessed have changed. For typical scenarios, these replacements can be used: - TreePatternNode::getType(ResNo) -> getSimpleType(ResNo) - TreePatternNode::hasTypeSet(ResNo) -> hasConcreteType(ResNo) - TypeSet::isConcrete -> TypeSetByHwMode::isValueTypeByHwMode(false) For more information, please refer to the review page. Differential Revision: https://reviews.llvm.org/D31951 llvm-svn: 313271
* Remove ancient, commented out code from TableGen, NFCKrzysztof Parzyszek2017-09-121-4/+0
| | | | | | These pieces were commented out in r98534 and r129691, i.e. 6+ years ago. llvm-svn: 313038
* [TableGen] Cleanup capturing of instruction namespace for the fast isel ↵Craig Topper2017-07-071-11/+7
| | | | | | emitter to remove a std::string and duplicated code. NFC llvm-svn: 307363
* [TableGen] Use StringRef instead of std::string for CodeGenInstruction ↵Craig Topper2017-07-071-2/+2
| | | | | | namespace. NFC llvm-svn: 307362
* Turn a TableGen FastISelEmitter warning into an error.Michael Kuperstein2017-01-301-7/+4
| | | | | | | | | | | | | Tablegen emitted a warning when the fast isel emitter created dead code by emitting a pattern that has no predicate before a pattern that has one. This should be an error but was originally only a warning because the X86 backend had a buggy definition that unintentionally caused this to be hit (PR21575). That has been fixed a while ago (r222094), so it's safe to upgrade the warning to an error. llvm-svn: 293534
* TableGen: Use StringRef instead of const std::string& in return vals.Matthias Braun2016-12-041-1/+1
| | | | | | | This will allow to switch to a different string storage in an upcoming commit. llvm-svn: 288612
* FastISel: Remove unused/un-overridden entry points. NFCI.Peter Collingbourne2016-10-051-2/+1
| | | | llvm-svn: 283366
* Apply clang-tidy's misc-move-constructor-init throughout LLVM.Benjamin Kramer2016-05-271-3/+2
| | | | | | No functionality change intended, maybe a tiny performance improvement. llvm-svn: 270997
* [NFC] Header cleanupMehdi Amini2016-04-181-1/+0
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* Change order of tablegen generated fast-isel instruction code to beBill Schmidt2014-11-141-105/+101
| | | | | | | | | | | | | | | | | | | | | based on instruction complexity The order that tablegen fast-isel instruction code is generated is currently based on the text of the predicate (using string less-than). This patch changes this to instead use the instruction complexity. Because the complexities are not unique a C++ multimap is used instead of a map. This fixes the problem where code with no predicate always comes out first (the empty string always compares as less than all other strings) thus making the code with predicates dead code. See the FMUL code in PPCFastISel.cpp for an example. It also more closely matches the normal codegen ordering. Some error checking in the tablegen fast-isel code is fixed as well. Patch by Bill Seurer. llvm-svn: 222038
* PR21101: tablegen's FastISel emitter should filter out unused functions.Bob Wilson2014-10-011-1/+16
| | | | | | | | | | | | | FastISel has a fixed set of virtual functions that are overridden by the tablegen-generated code for each target. These functions are distinguished by the kinds of operands, e.g., register + immediate = "ri". The FastISel emitter has been blindly emitting functions with different combinations of operand kinds, even for combinations that are completely unused by FastISel, e.g., "fastEmit_rrr". Change to filter out functions that will be irrelevant for FastISel and do not bother generating the code for them. Also add explicit "override" keywords for the virtual functions that are overridden. llvm-svn: 218838
* [FastISel][tblgen] Rename tblgen generated FastISel functions. NFC.Juergen Ributzka2014-09-031-12/+12
| | | | | | | | | | This is the final round of renaming. This changes tblgen to emit lower-case function names for FastEmitInst_* and FastEmit_*, and updates all its uses in the source code. Reviewed by Eric llvm-svn: 217075
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-151-3/+3
| | | | | | instead of comparing to nullptr. llvm-svn: 206254
* Rename a DebugLoc variable to DbgLoc and a DataLayout to DL.Rafael Espindola2014-02-181-2/+2
| | | | | | This is quiet a bit less confusing now that TargetData was renamed DataLayout. llvm-svn: 201606
* Tidy up. Comment grammar.Jim Grosbach2013-08-291-2/+2
| | | | llvm-svn: 189618
* Tidy up. Trailing whitespace.Jim Grosbach2013-08-291-39/+39
| | | | llvm-svn: 189617
* Recognize ValueType operands in source patterns for fast-isel.Bill Schmidt2013-05-221-3/+7
| | | | | | | | | | | | | | | | | | | | | Currently the fast-isel table generator recognizes registers, register classes, and immediates for source pattern operands. ValueType operands are not recognized. This is not a problem for existing targets with fast-isel support, but will not work for targets like PowerPC and SPARC that use types in source patterns. The proposed patch allows ValueType operands and treats them in the same manner as register classes. There is no convenient way to map from a ValueType to a register class, but there's no need to do so. The table generator already requires that all types in the source pattern be identical, and we know the register class of the output operand already. So we just assign that register class to any ValueType operands we encounter. No functional effect on existing targets. Testing deferred until the PowerPC target implements fast-isel. llvm-svn: 182512
* Remove exception handling usage from tblgen.Joerg Sonnenberger2012-10-251-1/+1
| | | | | | | | | | | Most places can use PrintFatalError as the unwinding mechanism was not used for anything other than printing the error. The single exception was CodeGenDAGPatterns.cpp, where intermediate errors during type resolution were ignored to simplify incremental platform development. This use is replaced by an error flag in TreePattern and bailout earlier in various places if it is set. llvm-svn: 166712
* tblgen: Use semantically correct RTTI functions.Sean Silva2012-10-101-4/+3
| | | | | | Also, some minor cleanup. llvm-svn: 165647
* tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.Sean Silva2012-10-101-3/+3
| | | | | | | | | | Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>. That will happen in a future patch. There are also two dyn_cast_or_null<>'s slipped in instead of dyn_cast<>'s, since they were causing crashes with just dyn_cast<>. llvm-svn: 165646
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-15/+20
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
* Remove unused private fields found by clang's new -Wunused-private-field.Benjamin Kramer2012-06-061-1/+1
| | | | | | | | There are some that I didn't remove this round because they looked like obvious stubs. There are dead variables in gtest too, they should be fixed upstream. llvm-svn: 158090
* Make fast isel use &XXXRegClass instead of XXXRegisterClass. Not a ↵Craig Topper2012-04-191-2/+2
| | | | | | functional change since XXXRegisterClass is just a constant alias of &XXXRegClass, but should probably go away. llvm-svn: 155104
* Remove VectorExtras. This unused helper was written for a type of API that ↵Benjamin Kramer2012-01-071-1/+0
| | | | | | is discouraged now. llvm-svn: 147738
* Fix TableGen so that it will emit the correct signature for FastEmit_f:Cameron Zwarich2012-01-071-1/+1
| | | | | | | | | | | | | | | | | /// FastEmit_f - This method is called by target-independent code /// to request that an instruction with the given type, opcode, and /// floating-point immediate operand be emitted. virtual unsigned FastEmit_f(MVT VT, MVT RetVT, unsigned Opcode, const ConstantFP *FPImm); Currently, it emits an accidentally overloaded version without the const on the ConstantFP*. This doesn't affect anything in the tree, since nothing causes that method to be autogenerated, but I have been playing with some ARM TableGen refactorings that hit this problem. llvm-svn: 147727
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-2/+2
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Fix fpimmm->fpimm typo.Eric Christopher2011-08-231-1/+1
| | | | | | Patch by Micah Villmow! llvm-svn: 138330
* Unconstify InitsDavid Greene2011-07-291-4/+4
| | | | | | Remove const qualifiers from Init references, per Chris' request. llvm-svn: 136531
* [AVX] Constify InitsDavid Greene2011-07-291-4/+4
| | | | | | | Make references to Inits const everywhere. This is the final step before making them unique. llvm-svn: 136485
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-111-4/+4
| | | | | | in multiple buildbots. llvm-svn: 134936
* [AVX] Make Inits FoldableDavid Greene2011-07-111-4/+4
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-271-0/+4
| | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-211-0/+1
| | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. llvm-svn: 133568
* Store CodeGenRegisters as pointers so they won't be reallocated.Jakob Stoklund Olesen2011-06-181-9/+1
| | | | | | | Reuse the CodeGenRegBank DenseMap in a few places that would build their own or use linear search. llvm-svn: 133333
* Move the list of register classes into CodeGenRegBank as well.Jakob Stoklund Olesen2011-06-151-1/+1
| | | | | | No functional change intended. llvm-svn: 133029
* Fixed a few illegal paths with llvm_unreachable. Patch by Cameron McInally.Chad Rosier2011-06-071-7/+5
| | | | llvm-svn: 132732
* Filter out pattterns from the FastISel emitter which it doesn't actually ↵Eli Friedman2011-04-291-31/+49
| | | | | | know how to handle. No significant functionality change at the moment, but it's necessary for some changes I'm planning. llvm-svn: 130547
* Add a new bit that ImmLeaf's can opt into, which allows them to duck out ofChris Lattner2011-04-181-2/+10
| | | | | | | | the generated FastISel. X86 doesn't need to generate code to match ADD16ri8 since ADD16ri will do just fine. This is a small codesize win in the generated instruction selector. llvm-svn: 129692
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