Commit message (Collapse) | Author | Age | Files | Lines | ||
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* | Incoming (and optional) flag bugs. They may be embedded inside a inner node of | Evan Cheng | 2006-01-26 | 1 | -30/+56 | |
| | | | | | | | a pattern. Also, nodes which take incoming flag should not be folded if it has more than one use. llvm-svn: 25627 | |||||
* | Fix an optional in flag bug. | Evan Cheng | 2006-01-24 | 1 | -19/+64 | |
| | | | | llvm-svn: 25590 | |||||
* | Optional InFlag was not being included in node. | Evan Cheng | 2006-01-24 | 1 | -1/+1 | |
| | | | | llvm-svn: 25588 | |||||
* | Prevent folding of a node with multiple uses if the node already folds a load! | Evan Cheng | 2006-01-20 | 1 | -6/+9 | |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is an example where the load ended up being done twice: %A = global uint 0 uint %test(uint %B, ubyte %C) { %tmp = load uint *%A; %X = shl uint %tmp, ubyte %C %Cv = sub ubyte 32, %C %Y = shr uint %B, ubyte %Cv %Z = or uint %Y, %X store uint %Z, uint* %A ret uint %Z } ==> subl $4, %esp movl %ebx, (%esp) movl 8(%esp), %edx movl A, %eax movb 12(%esp), %bl movb %bl, %cl shldl %cl, %edx, %eax movb %bl, %cl shldl %cl, %edx, A movl (%esp), %ebx addl $4, %esp ret llvm-svn: 25471 | |||||
* | Bug fix. Flag operand number may be calculated incorrectly. | Evan Cheng | 2006-01-19 | 1 | -8/+13 | |
| | | | | llvm-svn: 25465 | |||||
* | Use pattern information to determine whether the use expects this | Evan Cheng | 2006-01-19 | 1 | -2/+5 | |
| | | | | | | | | | instruction to produce a result. e.g MUL8m, the instruction does not produce a explicit result. However it produces an implicit result in AL which would be copied to a temp. The root operator of the matching pattern is a mul so the use would expect it to produce a result. llvm-svn: 25458 | |||||
* | Prevent unnecessary CopyToReg when the same HW register appears in two spots | Evan Cheng | 2006-01-19 | 1 | -0/+9 | |
| | | | | | | in the pattern. llvm-svn: 25437 | |||||
* | Emit a type matching check for ComplexPatterns. | Evan Cheng | 2006-01-17 | 1 | -0/+2 | |
| | | | | llvm-svn: 25392 | |||||
* | Type inferencing bug | Evan Cheng | 2006-01-15 | 1 | -0/+2 | |
| | | | | llvm-svn: 25337 | |||||
* | Allow transformation from GlobalAddress to TargetGlobalAddress and | Evan Cheng | 2006-01-12 | 1 | -13/+24 | |
| | | | | | | ExternalSymbol to TargetExternalSymbol. llvm-svn: 25252 | |||||
* | GlobalAddress -> TargetGlobalAddress; ExternalSymbol -> TargetExternalSymbol | Evan Cheng | 2006-01-12 | 1 | -2/+14 | |
| | | | | llvm-svn: 25245 | |||||
* | Some minor fixes. | Evan Cheng | 2006-01-11 | 1 | -26/+19 | |
| | | | | llvm-svn: 25227 | |||||
* | Always select target registers to themselves | Chris Lattner | 2006-01-11 | 1 | -0/+1 | |
| | | | | llvm-svn: 25218 | |||||
* | Emit an error instead of an assertion if trying to do bogus things in result ↵ | Chris Lattner | 2006-01-11 | 1 | -2/+2 | |
| | | | | | | patterns. llvm-svn: 25194 | |||||
* | * Remove instruction fields hasInFlag / hasOutFlag and added SNDPInFlag and | Evan Cheng | 2006-01-09 | 1 | -41/+56 | |
| | | | | | | | | | SNDPOutFlag to DAG nodes. These properties do not belong to target specific instructions. * Added DAG node property SNDPOptInFlag. It's same as SNDPInFlag except it's optional. Used by ret / call, etc. llvm-svn: 25154 | |||||
* | Pattern complexity calculation fix. | Evan Cheng | 2006-01-06 | 1 | -4/+9 | |
| | | | | llvm-svn: 25133 | |||||
* | Tweak pattern complexity calc. | Evan Cheng | 2006-01-06 | 1 | -9/+4 | |
| | | | | llvm-svn: 25122 | |||||
* | Bug fix wrt chain operand. | Evan Cheng | 2006-01-06 | 1 | -7/+4 | |
| | | | | llvm-svn: 25115 | |||||
* | Replace fix with one less disruptive to the original code. | Jeff Cohen | 2006-01-04 | 1 | -4/+3 | |
| | | | | | | Also note that GCC 4.1 also correctly flags the syntax error. llvm-svn: 25076 | |||||
* | Tblgen was generating syntactically illegal C++ code like: | Jeff Cohen | 2006-01-04 | 1 | -3/+4 | |
| | | | | | | | | | SDOperand Tmp0,Tmp1,Tmp2,Tmp3,; GCC has a bug (24907) in which is fails to catch this, but VC++ correctly notes its illegality, so tblgen must be taught to only generate legal C++. llvm-svn: 25075 | |||||
* | Remove obsolete comment, make things look a bit nicer | Chris Lattner | 2006-01-04 | 1 | -2/+1 | |
| | | | | llvm-svn: 25070 | |||||
* | reduce stack usage of the recursive SelectCode function by out-lining each | Chris Lattner | 2006-01-04 | 1 | -44/+61 | |
| | | | | | | case of the switch statement into its own method. llvm-svn: 25069 | |||||
* | Remove my previous ugly hack that tries to reduce the stack space usage | Chris Lattner | 2006-01-03 | 1 | -68/+25 | |
| | | | | | | of SelectCode to make way for a better solution. llvm-svn: 25068 | |||||
* | HP-UX DVDs are crunchy and good to eat | Duraid Madina | 2005-12-30 | 1 | -1/+1 | |
| | | | | llvm-svn: 25052 | |||||
* | Add support for generating v4i32 altivec code | Nate Begeman | 2005-12-30 | 1 | -84/+155 | |
| | | | | llvm-svn: 25046 | |||||
* | Added field noResults to Instruction. | Evan Cheng | 2005-12-26 | 1 | -4/+1 | |
| | | | | | | | | | | | | Currently tblgen cannot tell which operands in the operand list are results so it assumes the first one is a result. This is bad. Ideally we would fix this by separating results from inputs, e.g. (res R32:$dst), (ops R32:$src1, R32:$src2). But that's a more distruptive change. Adding 'let noResults = 1' is the workaround to tell tblgen that the instruction does not produces a result. It works for now since tblgen does not support instructions which produce multiple results. llvm-svn: 25017 | |||||
* | support targetexternalsym | Andrew Lenharth | 2005-12-24 | 1 | -0/+4 | |
| | | | | llvm-svn: 25005 | |||||
* | * Support for hasInFlag and hasOutFlag (on instructions). Remove nameless FLAG | Evan Cheng | 2005-12-23 | 1 | -107/+106 | |
| | | | | | | | support which is fragile. * Fixed a number of bugs. llvm-svn: 24996 | |||||
* | silence some bogus gcc warnings | Chris Lattner | 2005-12-22 | 1 | -2/+2 | |
| | | | | llvm-svn: 24962 | |||||
* | Attempt to fix a crash on WIN32. | Evan Cheng | 2005-12-22 | 1 | -15/+16 | |
| | | | | llvm-svn: 24936 | |||||
* | * Added support for FLAG - a special nameless flag register. Can be used as | Evan Cheng | 2005-12-22 | 1 | -54/+66 | |
| | | | | | | | either an operand or a result. * Fixed some more flag / chain bugs. llvm-svn: 24933 | |||||
* | Allows instructions which no explicit operands. e.g. X86 RET which has but | Evan Cheng | 2005-12-21 | 1 | -6/+5 | |
| | | | | | | an implicit flag operand. llvm-svn: 24916 | |||||
* | Eliminate some GCC warnings from the generated code | Chris Lattner | 2005-12-21 | 1 | -10/+18 | |
| | | | | llvm-svn: 24897 | |||||
* | Fix the semantic of Requires<[cond]> to mean if (!cond) goto PXXFail; | Evan Cheng | 2005-12-20 | 1 | -1/+1 | |
| | | | | llvm-svn: 24883 | |||||
* | This ugly patch works around a GCC bug where it is compiling SelectCode to | Chris Lattner | 2005-12-20 | 1 | -22/+56 | |
| | | | | | | | | | | | | | use too much stack space, overflowing the stack for large functions. Instead of emitting new SDOperands in each match block, we emit some common ones at the top of SelectCode then reuse them when possible. This reduces the stack size of SelectCode from 28K to 21K. Note that GCC compiles it to 512 bytes :-/ I've filed GCC PR 25505 to track this. llvm-svn: 24882 | |||||
* | Now support instructions with implicit write to non-flag registers. | Evan Cheng | 2005-12-20 | 1 | -51/+91 | |
| | | | | llvm-svn: 24878 | |||||
* | Lefted out a fix in the previous check in. | Evan Cheng | 2005-12-20 | 1 | -1/+7 | |
| | | | | llvm-svn: 24873 | |||||
* | Fix another bug related to chain / flag. | Evan Cheng | 2005-12-19 | 1 | -8/+20 | |
| | | | | llvm-svn: 24868 | |||||
* | Fixes for a number of bugs: save flag results in CodeGenMap, folded chains | Evan Cheng | 2005-12-19 | 1 | -23/+33 | |
| | | | | | | may not all have ResNo == 0. llvm-svn: 24858 | |||||
* | Handle basic block nodes | Chris Lattner | 2005-12-18 | 1 | -0/+1 | |
| | | | | llvm-svn: 24833 | |||||
* | More fixes for Selection of copyto/fromreg with a flag | Chris Lattner | 2005-12-18 | 1 | -11/+10 | |
| | | | | llvm-svn: 24829 | |||||
* | Select copytoreg and copyfromreg nodes that have flag operands correctly. | Chris Lattner | 2005-12-18 | 1 | -9/+37 | |
| | | | | llvm-svn: 24827 | |||||
* | Support for read / write from explicit registers with FlagVT type. | Evan Cheng | 2005-12-17 | 1 | -40/+89 | |
| | | | | llvm-svn: 24753 | |||||
* | Added support to specify predicates. | Evan Cheng | 2005-12-14 | 1 | -37/+72 | |
| | | | | llvm-svn: 24715 | |||||
* | Skip over srcvalue nodes when generating ISEL code. | Evan Cheng | 2005-12-14 | 1 | -1/+7 | |
| | | | | llvm-svn: 24704 | |||||
* | Bug fix: CodeGenMap[N] = ... -> CodeGenMap[N.getValue(0)] = ... | Evan Cheng | 2005-12-12 | 1 | -1/+1 | |
| | | | | llvm-svn: 24680 | |||||
* | At top of generated isel SelectCode() is this: | Evan Cheng | 2005-12-12 | 1 | -4/+2 | |
| | | | | | | | | | | | | | | | | | | | | | | if (!N.Val->hasOneUse()) { std::map<SDOperand, SDOperand>::iterator CGMI = CodeGenMap.find(N); if (CGMI != CodeGenMap.end()) return CGMI->second; } Suppose a DAG like this: X ^ ^ / \ USE1 USE2 Suppose USE1 is being selected first and during which X is selected and returned a new node. After this, USE1 is no longer an use of X. During USE2 selection, X will be selected again since it has only one use! The fix is to always query CodeGenMap. llvm-svn: 24679 | |||||
* | Bug fix: finding the correct incoming chain for pattern with nested src ↵ | Evan Cheng | 2005-12-12 | 1 | -14/+17 | |
| | | | | | | operand. And a minor change to make output code slightly more readible. llvm-svn: 24669 | |||||
* | Add support for TargetConstantPool nodes to the dag isel emitter, and use | Nate Begeman | 2005-12-10 | 1 | -0/+2 | |
| | | | | | | | them in the PPC backend, to simplify some logic out of Select and SelectAddr. llvm-svn: 24657 | |||||
* | Stop emitting a redudant type check for complex pattern node. | Evan Cheng | 2005-12-10 | 1 | -5/+0 | |
| | | | | llvm-svn: 24655 |