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* Second attempt:Bill Wendling2009-04-291-1/+1
| | | | | | | | | | | | Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. llvm-svn: 70343
* r70270 isn't ready yet. Back this out. Sorry for the noise.Bill Wendling2009-04-281-1/+1
| | | | llvm-svn: 70275
* Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want toBill Wendling2009-04-281-1/+1
| | | | | | | | | | | use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... llvm-svn: 70270
* Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman2009-04-131-0/+9
| | | | | | | | | | | | | | | | This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. llvm-svn: 68961
* Delete ISD::INSERT_SUBREG and ISD::EXTRACT_SUBREG, which are unused.Dan Gohman2009-04-031-21/+0
| | | | | | | Note that these are distinct from TargetInstrInfo::INSERT_SUBREG and TargetInstrInfo::EXTRACT_SUBREG, which are used. llvm-svn: 68355
* fix a few spelling errors and typosJim Grosbach2009-03-261-1/+1
| | | | llvm-svn: 67758
* Use 'bool' for FoundRCJim Grosbach2009-03-261-2/+2
| | | | llvm-svn: 67750
* Modify getRegisterValueType() to allow for a register being in mutlipleJim Grosbach2009-03-251-5/+26
| | | | | | | | register classes. Before, MVT::Other would be returned anytime a reg was in multiple register classes. Now, MVT::Other is only returned if the types for those register classes differ. llvm-svn: 67714
* Get rid of one more non-DebugLoc getNode andDale Johannesen2009-02-061-1/+2
| | | | | | | its corresponding getTargetNode. Lots of caller changes. llvm-svn: 63904
* Remove a non-DebugLoc version of getNode.Dale Johannesen2009-02-051-2/+2
| | | | llvm-svn: 63889
* Remove non-DebugLoc forms of CopyToReg and CopyFromReg.Dale Johannesen2009-02-041-0/+1
| | | | | | Adjust callers. llvm-svn: 63789
* Explain why this is here.Bill Wendling2009-01-291-0/+1
| | | | llvm-svn: 63342
* - Add DebugLoc to getTargetNode(). Bill Wendling2009-01-291-0/+3
| | | | | | | | | - Modify TableGen to add the DebugLoc when calling getTargetNode. (The light-weight wrappers are only temporary. The non-DebugLoc version will be removed once the whole debug info stuff is finished with.) llvm-svn: 63273
* Move the code that starts printing the Select_* functionsDan Gohman2009-01-291-3/+3
| | | | | | | | after the code that sorts the patterns. This doesn't affect the output, but it makes the code a little easier to follow. llvm-svn: 63265
* Avoid triggering an assertion failure when an instruction patternDan Gohman2009-01-161-1/+2
| | | | | | is a leaf node. Patch by Brandner! llvm-svn: 62361
* Add support for instructions with multiple ComplexPatterns, byDan Gohman2009-01-161-7/+7
| | | | | | | adding more information to the temporary variables names so that they don't conflict. llvm-svn: 62296
* Delete an unused variable and simplify the code.Dan Gohman2009-01-051-10/+7
| | | | llvm-svn: 61732
* Use dyn_cast intead of isa + cast in the generated DAGISel code. ThisDan Gohman2008-12-191-7/+13
| | | | | | reduces the amount of code slightly when assertions are enabled. llvm-svn: 61249
* Add a sanity-check to tablegen to catch the case where isSimpleLoadDan Gohman2008-12-031-1/+1
| | | | | | | | | is set but mayLoad is not set. Fix all the problems this turned up. Change code to not use isSimpleLoad instead of mayLoad unless it really wants isSimpleLoad. llvm-svn: 60459
* On x86 favors folding short immediate into some arithmetic operations (e.g. ↵Evan Cheng2008-11-271-2/+2
| | | | | | | | | | | | | | | add, and, xor, etc.) because materializing an immediate in a register is expensive in turns of code size. e.g. movl 4(%esp), %eax addl $4, %eax is 2 bytes shorter than movl $4, %eax addl 4(%esp), %eax llvm-svn: 60139
* Use an assert to check that SelectCode isn't called onDan Gohman2008-11-051-5/+4
| | | | | | nodes that are already selected. llvm-svn: 58763
* Eliminate the ISel priority queue, which used the topological order for aDan Gohman2008-11-051-30/+5
| | | | | | | | | | | | | | | | | | | | | | | | priority function. Instead, just iterate over the AllNodes list, which is already in topological order. This eliminates a fair amount of bookkeeping, and speeds up the isel phase by about 15% on many testcases. The impact on most targets is that AddToISelQueue calls can be simply removed. In the x86 target, there are two additional notable changes. The rule-bending AND+SHIFT optimization in MatchAddress that creates new pre-isel nodes during isel is now a little more verbose, but more robust. Instead of either creating an invalid DAG or creating an invalid topological sort, as it has historically done, it can now just insert the new nodes into the node list at a position where they will be consistent with the topological ordering. Also, the address-matching code has logic that checked to see if a node was "already selected". However, when a node is selected, it has all its uses taken away via ReplaceAllUsesWith or equivalent, so it won't recieve any further visits from MatchAddress. This code is now removed. llvm-svn: 58748
* Have TableGen emit setSubgraphColor calls under control of a -gen-debugDavid Greene2008-10-271-5/+45
| | | | | | | | flag. Then in a debugger developers can set breakpoints at these calls to see waht is about to be selected and what the resulting subgraph looks like. This really helps when debugging instruction selection. llvm-svn: 58278
* Use INT64_C to emit constant values, to avoid problems withDan Gohman2008-10-171-2/+3
| | | | | | | | constants that don't fit in an int. This fixes "this decimal constant is unsigned only in ISO C90" warnings. llvm-svn: 57668
* Fun x86 encoding tricks: when adding an immediate value of 128,Dan Gohman2008-10-171-1/+2
| | | | | | | | | | | | | use a SUB instruction instead of an ADD, because -128 can be encoded in an 8-bit signed immediate field, while +128 can't be. This avoids the need for a 32-bit immediate field in this case. A similar optimization applies to 64-bit adds with 0x80000000, with the 32-bit signed immediate field. To support this, teach tablegen how to handle 64-bit constants. llvm-svn: 57663
* Add support for having multiple predicates on a TreePatternNode.Dan Gohman2008-10-151-49/+57
| | | | | | | | This will allow predicates to be composed, which will allow the predicate definitions to become less redundant, and eventually will allow DAGISelEmitter.cpp to emit less redundant code. llvm-svn: 57562
* Move the code that handles DAGISel error conditions intoDan Gohman2008-09-271-25/+27
| | | | | | | | helper functions instead of duplicating it inline each time it is needed. This eliminates a few hundred or so copies of this code in each target. llvm-svn: 56759
* Rename ConstantSDNode's getSignExtended to getSExtValue, forDan Gohman2008-09-261-2/+2
| | | | | | | consistancy with ConstantInt, and re-implement it in terms of ConstantInt's getSExtValue. llvm-svn: 56700
* Reverting r56249. On further investigation, this functionality isn't needed.Bill Wendling2008-09-161-3/+3
| | | | | | Apologies for the thrashing. llvm-svn: 56251
* - Change "ExternalSymbolSDNode" to "SymbolSDNode".Bill Wendling2008-09-161-3/+3
| | | | | | | | | | - Add linkage to SymbolSDNode (default to external). - Change ISD::ExternalSymbol to ISD::Symbol. - Change ISD::TargetExternalSymbol to ISD::TargetSymbol These changes pave the way to allowing SymbolSDNodes with non-external linkage. llvm-svn: 56249
* Change ConstantSDNode and ConstantFPSDNode to use ConstantInt* andDan Gohman2008-09-121-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | ConstantFP* instead of APInt and APFloat directly. This reduces the amount of time to create ConstantSDNode and ConstantFPSDNode nodes when ConstantInt* and ConstantFP* respectively are already available, as is the case in SelectionDAGBuild.cpp. Also, it reduces the amount of time to legalize constants into constant pools, and the amount of time to add ConstantFP operands to MachineInstrs, due to eliminating ConstantInt::get and ConstantFP::get calls. It increases the amount of work needed to create new constants in cases where the client doesn't already have a ConstantInt* or ConstantFP*, such as legalize expanding 64-bit integer constants to 32-bit constants. And it adds a layer of indirection for the accessor methods. But these appear to be outweight by the benefits in most cases. It will also make it easier to make ConstantSDNode and ConstantFPNode more consistent with ConstantInt and ConstantFP. llvm-svn: 56162
* Rename ConstantSDNode::getValue to getZExtValue, for consistencyDan Gohman2008-09-121-5/+6
| | | | | | | with ConstantInt. This led to fixing a bug in TargetLowering.cpp using getValue instead of getAPIntValue. llvm-svn: 56159
* erect abstraction boundaries for accessing SDValue members, rename Val -> ↵Gabor Greif2008-08-281-34/+34
| | | | | | Node to reflect semantics llvm-svn: 55504
* disallow direct access to SDValue::ResNo, provide a getter insteadGabor Greif2008-08-261-2/+2
| | | | llvm-svn: 55394
* code simplification, no functionality change.Chris Lattner2008-08-261-11/+1
| | | | llvm-svn: 55363
* Move the point at which FastISel taps into the SelectionDAGISelDan Gohman2008-08-231-1/+1
| | | | | | | | | | | | | | | | | | process up to a higher level. This allows FastISel to leverage more of SelectionDAGISel's infastructure, such as updating Machine PHI nodes. Also, implement transitioning from SDISel back to FastISel in the middle of a block, so it's now possible to go back and forth. This allows FastISel to hand individual CallInsts and other complicated things off to SDISel to handle, while handling the rest of the block itself. To help support this, reorganize the SelectionDAG class so that it is allocated once and reused throughout a function, instead of being completely reallocated for each block. llvm-svn: 55219
* Factor out the predicate check code from DAGISelEmitter.cppDan Gohman2008-08-221-20/+4
| | | | | | | | | and use it in FastISelEmitter.cpp, and make FastISel subtarget aware. Among other things, this lets it work properly on x86 targets that don't have SSE, where it successfully selects x87 instructions. llvm-svn: 55156
* Factor the code for determining the target-specific instructionDan Gohman2008-08-201-11/+2
| | | | | | namespace out of the isel emitters and into common code. llvm-svn: 55079
* Oops, check in these files too, for the FastISel -> Fast rename.Dan Gohman2008-08-131-1/+1
| | | | llvm-svn: 54750
* Added support for overloading intrinsics (atomics) based on pointersMon P Wang2008-07-301-1/+4
| | | | | | | to different address spaces. This alters the naming scheme for those intrinsics, e.g., atomic.load.add.i32 => atomic.load.add.i32.p0i32 llvm-svn: 54195
* Rename SDOperand to SDValue.Dan Gohman2008-07-271-76/+76
| | | | llvm-svn: 54128
* Add a new function, ReplaceAllUsesOfValuesWith, which handles bulkDan Gohman2008-07-171-42/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | replacement of multiple values. This is slightly more efficient than doing multiple ReplaceAllUsesOfValueWith calls, and theoretically could be optimized even further. However, an important property of this new function is that it handles the case where the source value set and destination value set overlap. This makes it feasible for isel to use SelectNodeTo in many very common cases, which is advantageous because SelectNodeTo avoids a temporary node and it doesn't require CSEMap updates for users of values that don't change position. Revamp MorphNodeTo, which is what does all the work of SelectNodeTo, to handle operand lists more efficiently, and to correctly handle a number of corner cases to which its new wider use exposes it. This commit also includes a change to the encoding of post-isel opcodes in SDNodes; now instead of being sandwiched between the target-independent pre-isel opcodes and the target-dependent pre-isel opcodes, post-isel opcodes are now represented as negative values. This makes it possible to test if an opcode is pre-isel or post-isel without having to know the size of the current target's post-isel instruction set. These changes speed up llc overall by 3% and reduce memory usage by 10% on the InstructionCombining.cpp testcase with -fast and -regalloc=local. llvm-svn: 53728
* Refactor the tablegen DAGISelEmitter code for outputing calls toDan Gohman2008-07-071-201/+208
| | | | | | | | | | | | | | | | | getTargetNode and SelectNodeTo to reduce duplication, and to make some of the getTargetNode code available to SelectNodeTo. Use SelectNodeTo instead of getTargetNode in several new interesting cases, as it mutates nodes in place instead of creating new ones. This triggers some scheduling behavior differences due to nodes being presented to the scheduler in a different order. Some of the arbitrary scheduling decisions it makes are now arbitrarily made differently. This is visible in CodeGen/PowerPC/LargeAbsoluteAddr.ll, where a trivial scheduling difference led to a trivial register allocation difference. llvm-svn: 53203
* isel load folding is disabled at -fast. Now hoist the check up to the top ↵Evan Cheng2008-07-031-8/+27
| | | | | | level to save some time. llvm-svn: 53096
* Replace a few uses of SelectionDAG::getTargetNode withDan Gohman2008-07-021-13/+28
| | | | | | | | | | | | SelectionDAG::SelectNodeTo in the instruction selector. This updates existing nodes in place instead of creating new ones. Go back to selecting ISD::DBG_LABEL nodes into TargetInstrInfo::DBG_LABEL nodes instead of leaving them unselected, now that SelectNodeTo allows us to update them in place. llvm-svn: 53057
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-15/+2
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-5/+2
| | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub llvm-svn: 52706
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-15/+17
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Fix the position of MemOperands in nodes that use variadic_opsDan Gohman2008-06-021-12/+15
| | | | | | | | | | | | in DAGISelEmitter output. This bug was recently uncovered by the addition of patterns for CALL32m and CALL64m, which are nodes that now have both MemOperands and variadic_ops. This bug was especially visible with PIC in various configurations, because the new patterns are matching the indirect call code used in many PIC configurations. llvm-svn: 51877
* Teach the DAGISelEmitter to not compute the variable_ops operandDan Gohman2008-05-311-29/+52
| | | | | | | | | | | index for the input pattern in terms of the output pattern. Instead keep track of how many fixed operands the input pattern actually has, and have the input matching code pass the output-emitting function that index value. This simplifies the code, disentangles variables_ops from the support for predication operations, and makes variable_ops more robust. llvm-svn: 51808
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