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path: root/llvm/utils/TableGen/CodeGenTarget.h
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* Split EVT into MVT and EVT, the former representing _just_ a primitive type, ↵Owen Anderson2009-08-111-10/+10
| | | | | | | | while the latter is capable of representing either a primitive or an extended type. llvm-svn: 78713
* Rename MVT to EVT, in preparation for splitting SimpleValueType out into its ↵Owen Anderson2009-08-101-10/+10
| | | | | | own struct type. llvm-svn: 78610
* Match X86 register names to number.Daniel Dunbar2009-07-291-0/+4
| | | | llvm-svn: 77404
* Replace std::iostreams with raw_ostream in TableGen.Daniel Dunbar2009-07-031-1/+1
| | | | | | | | - Sorry, I can't help myself. - No intended functionality change. llvm-svn: 74742
* Revert 72707 and 72709, for the moment.Dale Johannesen2009-06-021-6/+2
| | | | llvm-svn: 72712
* Make the implicit inputs and outputs of target-independentDale Johannesen2009-06-011-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to) instead of MVT::Flag. Remove CARRY_FALSE in favor of 0; adjust all target-independent code to use this format. Most targets will still produce a Flag-setting target-dependent version when selection is done. X86 is converted to use i32 instead, which means TableGen needs to produce different code in xxxGenDAGISel.inc. This keys off the new supportsHasI1 bit in xxxInstrInfo, currently set only for X86; in principle this is temporary and should go away when all other targets have been converted. All relevant X86 instruction patterns are modified to represent setting and using EFLAGS explicitly. The same can be done on other targets. The immediate behavior change is that an ADC/ADD pair are no longer tightly coupled in the X86 scheduler; they can be separated by instructions that don't clobber the flags (MOV). I will soon add some peephole optimizations based on using other instructions that set the flags to feed into ADC. llvm-svn: 72707
* Generalize getRegisterClassForRegister to handle registersDan Gohman2009-04-131-4/+40
| | | | | | | | in multiple classes in the case that the classes are all in subset/superset relations. This function is used by the fast-isel emitter, which always wants the super-most set. llvm-svn: 68957
* Factor the code for determining the target-specific instructionDan Gohman2008-08-201-0/+4
| | | | | | namespace out of the isel emitters and into common code. llvm-svn: 55079
* Added MemOperands to Atomic operations since Atomics touches memory.Mon P Wang2008-06-251-1/+4
| | | | | | | | Added abstract class MemSDNode for any Node that have an associated MemOperand Changed atomic.lcs => atomic.cmp.swap, atomic.las => atomic.load.add, and atomic.lss => atomic.load.sub llvm-svn: 52706
* Wrap MVT::ValueType in a struct to get type safetyDuncan Sands2008-06-061-12/+12
| | | | | | | | | | | | | | | | and better control the abstraction. Rename the type to MVT. To update out-of-tree patches, the main thing to do is to rename MVT::ValueType to MVT, and rewrite expressions like MVT::getSizeInBits(VT) in the form VT.getSizeInBits(). Use VT.getSimpleVT() to extract a MVT::SimpleValueType for use in switch statements (you will get an assert failure if VT is an extended value type - these shouldn't exist after type legalization). This results in a small speedup of codegen and no new testsuite failures (x86-64 linux). llvm-svn: 52044
* Move instruction flag inference out of InstrInfoEmitter and intoDan Gohman2008-04-031-0/+4
| | | | | | | | | | | | CodeGenDAGPatterns, where it can be used in other tablegen backends. This allows the inference to be done for DAGISelEmitter so that it gets accurate mayLoad/mayStore/isSimpleLoad flags. This brings MemOperand functionality back to where it was before 48329. However, it doesn't solve the problem of anonymous patterns which expand to code that does loads or stores. llvm-svn: 49123
* Allow ComplexExpressions in InstrInfo.td files to be slightly more... ↵Christopher Lamb2008-01-311-2/+6
| | | | | | | | | | complex! ComplexExpressions can now have attributes which affect how TableGen interprets the pattern when generating matchin code. The first (and currently, only) attribute causes the immediate parent node of the ComplexPattern operand to be passed into the matching code rather than the node at the root of the entire DAG containing the pattern. llvm-svn: 46606
* start inferring 'no side effects'.Chris Lattner2008-01-101-1/+2
| | | | llvm-svn: 45822
* realize that instructions who match intrinsics that read memory read memory.Chris Lattner2008-01-101-0/+1
| | | | | | Also, instructions with any nodes that are SDNPMayLoad also read memory. llvm-svn: 45817
* Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner2008-01-061-2/+9
| | | | | | | | | | | instead of "ISD::STORE". This allows us to mark target-specific dag nodes as storing (such as ppc byteswap stores). This allows us to remove more explicit isStore flags from the .td files. Finally, add a warning for when a .td file contains an explicit isStore and tblgen is able to infer it. llvm-svn: 45654
* change getQualifiedName to be a global function.Chris Lattner2008-01-051-1/+4
| | | | | | | | Split the pattern parsing code out from the dag isel emitter into it's own file. No functionality change. llvm-svn: 45632
* remove attributions from utils.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45419
* Eliminate an unused parameter.Dan Gohman2007-07-131-1/+1
| | | | llvm-svn: 39828
* Remove the operator<< for MVT::ValueType in preparation for MVT::ValueTypeDan Gohman2007-06-041-1/+0
| | | | | | | being changed from an enum to an integer type, which can't have a custom operator<< overload. llvm-svn: 37412
* Added properties such as SDNPHasChain to ComplexPattern.Evan Cheng2006-10-111-0/+7
| | | | llvm-svn: 30890
* Don't generate getCalleeSaveReg and getCalleeSaveRegClasses anymore.Evan Cheng2006-05-181-5/+0
| | | | llvm-svn: 28376
* Remove PointerType from target definition. Use abstract type MVT::iPTR toEvan Cheng2006-05-171-3/+0
| | | | | | represent pointer type. llvm-svn: 28363
* Allow patterns to refer to physical registers that belong to multipleEvan Cheng2006-05-161-0/+4
| | | | | | register classes. llvm-svn: 28323
* Add support for decoding iPTR to the right pointer type.Chris Lattner2006-03-271-1/+2
| | | | llvm-svn: 27188
* PHI and INLINEASM are now builtin instructions provided by Target.tdChris Lattner2006-01-271-4/+0
| | | | llvm-svn: 25673
* * Added an explicit type field to ComplexPattern.Evan Cheng2005-12-081-3/+5
| | | | | | * Renamed MatchingNodes to RootNodes. llvm-svn: 24636
* Added support for ComplexPattern. These are patterns that require C++ patternEvan Cheng2005-12-081-0/+17
| | | | | | | matching code that is not currently auto-generated by tblgen, e.g. X86 addressing mode. Selection routines for complex patterns can return multiple operands, e.g. X86 addressing mode returns 4. llvm-svn: 24634
* Add some methodsChris Lattner2005-12-051-1/+20
| | | | llvm-svn: 24596
* Stop checking the ValueType of the CodeGenInstruction. Instead, use theNate Begeman2005-12-011-0/+9
| | | | | | | ValueType from the RegisterClass or Operands. This step is necessary to allow RegisterClasses to have multiple ValueTypes. llvm-svn: 24555
* add an accessorChris Lattner2005-09-141-0/+6
| | | | llvm-svn: 23349
* Compute the value types that are natively supported by a target.Chris Lattner2005-09-081-2/+17
| | | | llvm-svn: 23282
* Remove trailing whitespaceMisha Brukman2005-04-221-2/+2
| | | | llvm-svn: 21428
* Refactor code for numbering instructions into CodeGenTarget.Chris Lattner2005-01-221-0/+6
| | | | llvm-svn: 19758
* Convert 'struct' to 'class' in various places to adhere to the coding standardsChris Lattner2004-10-271-1/+1
| | | | | | and work better with VC++. Patch contributed by Morten Ofstad! llvm-svn: 17281
* * Add option to read isLittleEndianEncoding for InstrInfo classesMisha Brukman2004-10-141-0/+4
| | | | | | * Doxygen-ify some function comments llvm-svn: 16974
* Start parsing register classes into a more structured formChris Lattner2004-08-211-1/+9
| | | | llvm-svn: 15961
* Use CodeGenRegister class to make reading in of register information moreChris Lattner2004-08-161-2/+12
| | | | | | systematic. llvm-svn: 15805
* Make the AsmWriter a first-class tblgen object. Allow targets to specifyChris Lattner2004-08-141-1/+5
| | | | | | name of the generated asmwriter class, and the name of the format string. llvm-svn: 15747
* Parse the operand list of the instruction. We currently support register ↵Chris Lattner2004-08-011-1/+0
| | | | | | and immediate operands. llvm-svn: 15390
* Add, and start using, the CodeGenInstruction class. This class representsChris Lattner2004-08-011-6/+20
| | | | | | an instance of the Instruction tablegen class. llvm-svn: 15385
* Rename CodeGenWrappers.(cpp|h) -> CodeGenTarget.(cpp|h)Chris Lattner2004-08-011-0/+68
llvm-svn: 15382
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