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path: root/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
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* Heed guessInstructionProperties, and stop warning on redundant flags.Jakob Stoklund Olesen2012-08-241-92/+82
| | | | | | | | | | | | Emit TableGen errors if guessInstructionProperties is 0 and instruction properties can't be inferred from patterns. Allow explicit instruction properties even when they can be inferred. This patch doesn't change the TableGen output. Redundant properties are not yet verified because the tree has errors. llvm-svn: 162516
* TableGen: Pattern<> references to null_frag are a nop.Jim Grosbach2012-07-171-0/+5
| | | | | | | | A standalone pattern defined in a multiclass expansion should handle null_frag references just like patterns on instructions. Follow-up to r160333. llvm-svn: 160384
* TableGen: Allow conditional instruction pattern in multiclass.Jim Grosbach2012-07-171-2/+36
| | | | | | | | | | | | | | | | | | | Define a 'null_frag' SDPatternOperator node, which if referenced in an instruction Pattern, results in the pattern being collapsed to be as-if '[]' had been specified instead. This allows supporting a multiclass definition where some instaniations have ISel patterns associated and others do not. For example, multiclass myMulti<RegisterClass rc, SDPatternOperator OpNode = null_frag> { def _x : myI<(outs rc:), (ins rc:), []>; def _r : myI<(outs rc:), (ins rc:), [(set rc:, (OpNode rc:))]>; } defm foo : myMulti<GRa, not>; defm bar : myMulti<GRb>; llvm-svn: 160333
* tblgen: remove duplicated newlines.Benjamin Kramer2012-04-181-4/+4
| | | | llvm-svn: 155038
* Tidy up. No need for a Twine here, as it's just constants.Jim Grosbach2012-04-181-4/+4
| | | | llvm-svn: 155026
* Clean up warning text. Remove extraneous prefix.Jim Grosbach2012-04-181-4/+4
| | | | llvm-svn: 155015
* TableGen use PrintWarning rather than fprintf(stderr,...) for warnings.Jim Grosbach2012-04-181-12/+13
| | | | | | That way we get source line number information from the diagnostics. llvm-svn: 155014
* Include cstdio in a few place that depended on getting it transitively ↵Benjamin Kramer2012-03-231-1/+2
| | | | | | through StringExtras.h llvm-svn: 153328
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-5/+4
| | | | llvm-svn: 149814
* Provide better messages in llvm_unreachable.David Blaikie2012-01-171-1/+1
| | | | llvm-svn: 148293
* Remove unreachable code. (replace with llvm_unreachable to help GCC where ↵David Blaikie2012-01-171-1/+2
| | | | | | necessary) llvm-svn: 148284
* Delete CodeInit and CodeRecTy from TableGen.Jakob Stoklund Olesen2012-01-131-3/+3
| | | | | | | The code type was always identical to a string anyway. Now it is simply a synonym. The code literal syntax [{...}] is still valid. llvm-svn: 148092
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
| | | | llvm-svn: 147855
* Ban rematerializable instructions with side effects.Jakob Stoklund Olesen2011-10-141-0/+6
| | | | | | | | | | TableGen infers unmodeled side effects on instructions without a pattern. Fix some instruction definitions where that was overlooked. Also raise an error if a rematerializable instruction has unmodeled side effects. That doen't make any sense. llvm-svn: 141929
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-2/+2
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Unconstify InitsDavid Greene2011-07-291-56/+56
| | | | | | Remove const qualifiers from Init references, per Chris' request. llvm-svn: 136531
* [AVX] Create Inits Via Factory MethodDavid Greene2011-07-291-5/+6
| | | | | | | Replace uses of new *Init with *Init::get. This hides the allocation implementation so that we can unique Inits in various ways. llvm-svn: 136486
* [AVX] Constify InitsDavid Greene2011-07-291-56/+56
| | | | | | | Make references to Inits const everywhere. This is the final step before making them unique. llvm-svn: 136485
* Intern all RecTy subclass instances to avoid duplicates.Jakob Stoklund Olesen2011-07-181-2/+2
| | | | | | | | | | | | | | | | | Make all of the RecTy constructors private, and use get() factory methods instead. Return singleton instances when it makes sense. ListTy instance pointers are stored in the element RecTy instance. BitsRecTy instance pointers, one per length, are stored in a static vector. Also unique DefInit instances. A Record has a unique DefInit which has a unique RecordRecTy instance. This saves some 200k-300k RecTy allocations when parsing ARM.td. It reduces TableGen's heap usage by almost 50%. llvm-svn: 135399
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-111-63/+58
| | | | | | in multiple buildbots. llvm-svn: 134936
* Use get(0 Instead of Create()David Greene2011-07-111-4/+4
| | | | | | Respond to some feedback asking for a name change. llvm-svn: 134921
* [AVX] Make Inits FoldableDavid Greene2011-07-111-58/+63
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
* Typo.Jim Grosbach2011-07-061-1/+1
| | | | llvm-svn: 134563
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-271-2/+25
| | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-211-0/+1
| | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. llvm-svn: 133568
* since the VT is fixed for a ImmLeaf, there is no reason to expose it to the ↵Chris Lattner2011-04-171-2/+0
| | | | | | matching code. llvm-svn: 129677
* now that predicates have a decent abstraction layer on them, introduce a new Chris Lattner2011-04-171-1/+23
| | | | | | | | | kind of predicate: one that is specific to imm nodes. The predicate function specified here just checks an int64_t directly instead of messing around with SDNode's. The virtue of this is that it means that fastisel and other things can reason about these predicates. llvm-svn: 129675
* Rework our internal representation of node predicates to expose moreChris Lattner2011-04-171-20/+55
| | | | | | | | structure and fix some fixmes. We now have a TreePredicateFn class that handles all of the decoding of these things. This is an internal cleanup that has no impact on the code generated by tblgen. llvm-svn: 129670
* - Add "Bitcast" target instruction property for instructions which performEvan Cheng2011-03-151-9/+37
| | | | | | | nothing more than a bitcast. - Teach tablegen to automatically infer "Bitcast" property. llvm-svn: 127667
* Silence uninitialized value warnings.David Greene2011-02-041-4/+4
| | | | llvm-svn: 124869
* [AVX] Implement EnforceSmallerThan for mixed int/fp type lists. ThisDavid Greene2011-02-011-27/+130
| | | | | | | | | | | | | makes type checking for extract_subvector and insert_subvector more robust and will allow stricter typechecking of more patterns in the future. This change handles int and fp as disjoint sets so that it will enforce integer types to be smaller than the largest integer type and fp types to be smaller than the largest fp type. There is no attempt to check type sizes across the int/fp sets. llvm-svn: 124672
* [AVX] Add type checking support for vector/subvector type constraints.David Greene2011-01-241-0/+45
| | | | | | | | | This will be used to check patterns referencing a forthcoming INSERT_SUBVECTOR SDNode. INSERT_SUBVECTOR in turn is very useful for matching to VINSERTF128 instructions and complements the already existing EXTRACT_SUBVECTOR SDNode. llvm-svn: 124145
* Flag -> Glue, the ongoing sagaChris Lattner2010-12-231-6/+6
| | | | llvm-svn: 122513
* Tidy up a bit. Trailing whitespace, hard tabs and 80-columns.Jim Grosbach2010-12-211-265/+265
| | | | llvm-svn: 122337
* eliminate the Records global variable, patch by Garrison Venn!Chris Lattner2010-12-131-1/+3
| | | | llvm-svn: 121659
* Add source Record* reference to PatternToMatch. Allows better diagnostics.Jim Grosbach2010-12-071-3/+6
| | | | llvm-svn: 121196
* factor the operand list (and related fields/operations) out of Chris Lattner2010-11-011-17/+17
| | | | | | CodeGenInstruction into its own helper class. No functionality change. llvm-svn: 117893
* A few 80 column cleanupsJim Grosbach2010-10-081-4/+6
| | | | llvm-svn: 116069
* Fix -Asserts warning.Daniel Dunbar2010-10-081-0/+3
| | | | llvm-svn: 116030
* Remove IntrWriteMem, as it's the default. Rename IntrWriteArgMemDan Gohman2010-08-051-2/+2
| | | | | | to IntrReadWriteArgMem, as it's for reading as well as writing. llvm-svn: 110395
* Add the SubRegIndex TableGen class.Jakob Stoklund Olesen2010-05-241-0/+5
| | | | | | | This is the beginning of purely symbolic subregister indices, but we need a bit of jiggling before the explicit numeric indices can be completely removed. llvm-svn: 104492
* stop computing InstImpInputs, it is deadChris Lattner2010-04-201-16/+8
| | | | llvm-svn: 101881
* DAGInstruction::ImpOperands is dead after my recent tblgen work, zap it.Chris Lattner2010-04-201-4/+2
| | | | llvm-svn: 101880
* print the complexity of the pattern being matched in theChris Lattner2010-03-291-0/+53
| | | | | | comment in the generated table. llvm-svn: 99794
* improve type checking of SDNode operand count. This rejects all casesChris Lattner2010-03-281-8/+7
| | | | | | | where an incorrect number of operands is provided to an sdnode instead of just a few cases. llvm-svn: 99761
* finally remove the immAllOnesV_bc/immAllZerosV_bc patternsChris Lattner2010-03-281-1/+0
| | | | | | | | | | and those derived from them. These are obnoxious because they were written as: PatLeaf<(bitconvert). Not having an argument was foiling adding better type checking for operand count matching up with what was required (in this case, bitconvert always requires an operand!) llvm-svn: 99759
* teach tblgen to allow patterns like (add (i32 (bitconvert (i32 GPR))), 4), Chris Lattner2010-03-281-1/+37
| | | | | | | | | transforming it into (add (i32 GPR), 4). This allows us to write type generic multi patterns and have tblgen automatically drop the bitconvert in the case when the types align. This allows us to fold an extra load in the changed testcase. llvm-svn: 99756
* validate that input sdnodes don't exist in an output pattern.Chris Lattner2010-03-281-8/+23
| | | | llvm-svn: 99747
* eliminate a bunch of code duplication in ParseTreePatternChris Lattner2010-03-281-98/+66
| | | | | | by rotating it. llvm-svn: 99746
* SDTCisVT<0, isVoid> is not valid, reject it.Chris Lattner2010-03-281-0/+3
| | | | llvm-svn: 99744
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