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llvm-svn: 124869
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makes type checking for extract_subvector and insert_subvector more
robust and will allow stricter typechecking of more patterns in the
future.
This change handles int and fp as disjoint sets so that it will
enforce integer types to be smaller than the largest integer type and
fp types to be smaller than the largest fp type. There is no attempt
to check type sizes across the int/fp sets.
llvm-svn: 124672
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This will be used to check patterns referencing a forthcoming
INSERT_SUBVECTOR SDNode. INSERT_SUBVECTOR in turn is very useful for
matching to VINSERTF128 instructions and complements the already
existing EXTRACT_SUBVECTOR SDNode.
llvm-svn: 124145
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llvm-svn: 122513
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llvm-svn: 122337
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llvm-svn: 121659
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llvm-svn: 121196
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CodeGenInstruction into its own helper class. No functionality change.
llvm-svn: 117893
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llvm-svn: 116069
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llvm-svn: 116030
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to IntrReadWriteArgMem, as it's for reading as well as writing.
llvm-svn: 110395
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This is the beginning of purely symbolic subregister indices, but we need a bit
of jiggling before the explicit numeric indices can be completely removed.
llvm-svn: 104492
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llvm-svn: 101881
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llvm-svn: 101880
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comment in the generated table.
llvm-svn: 99794
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where an incorrect number of operands is provided to an sdnode instead
of just a few cases.
llvm-svn: 99761
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and those derived from them. These are obnoxious because
they were written as: PatLeaf<(bitconvert). Not having an
argument was foiling adding better type checking for operand
count matching up with what was required (in this case,
bitconvert always requires an operand!)
llvm-svn: 99759
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transforming it into (add (i32 GPR), 4). This allows us to write type
generic multi patterns and have tblgen automatically drop the bitconvert
in the case when the types align. This allows us to fold an extra load
in the changed testcase.
llvm-svn: 99756
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llvm-svn: 99747
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by rotating it.
llvm-svn: 99746
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llvm-svn: 99744
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same vt multiple times for a register. For example,
ECX is in 5 different i32 reg classes, just return
1 i32 instead of 5.
llvm-svn: 99727
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from two places in CodeGenDAGPatterns.cpp, and
use it in DAGISelMatcherGen.cpp instead of using
an incorrect predicate that happened to get lucky
on our current targets.
llvm-svn: 99726
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results forward. We can now handle an instruction that
produces one implicit def and one result instead of one or
the other when not at the root of the pattern.
llvm-svn: 99725
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llvm-svn: 99703
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in some more places.
llvm-svn: 99366
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instead of reimplementing it wrong and poorly.
llvm-svn: 99357
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llvm-svn: 99354
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llvm-svn: 99353
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instead of as a single element list with VoidTy. Now with a fix
for the verifier.
llvm-svn: 99206
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llvm-svn: 99111
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llvm-svn: 99011
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instead of as a single element list with VoidTy.
llvm-svn: 99009
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ApplyTypeConstraint) and make it handle multiple result nodes.
llvm-svn: 99003
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to maintain a list of types (one for each result of
the node) instead of a single type. There are liberal
hacks added to emulate the old behavior in various
situations, but they can start disolving now.
llvm-svn: 98999
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we don't blow the smallvector as often. No functionality change.
llvm-svn: 98968
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from the pattern if present, and we use it instead of the bit.
llvm-svn: 98938
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dag isel gen instead of instruction properties. This
allows the oh-so-useful behavior of matching a variadic
non-root node.
llvm-svn: 98934
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llvm-svn: 98933
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llvm-svn: 98927
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llvm-svn: 98918
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to a vector that CGT stores instead of synthesizing it on every
call.
llvm-svn: 98910
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llvm-svn: 98906
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llvm-svn: 98904
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llvm-svn: 98900
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like this:
def : Pat<(add ...),
(FOOINST)>;
When fooinst only has a single implicit def (e.g. to R1). This will be handled
as if written as (set R1, (FOOINST ...))
llvm-svn: 98897
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shouldn't change this.
llvm-svn: 98872
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Add checking that the input/output operand list in spelled right.
llvm-svn: 98865
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now enforces that input/output named values have hte same type.
llvm-svn: 98535
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changing the primary datastructure from being a
"std::vector<unsigned char>" to being a new TypeSet class
that actually has (gasp) invariants!
This changes more things than I remember, but one major
innovation here is that it enforces that named input
values agree in type with their output values.
This also eliminates code that transparently assumes (in
some cases) that SDNodeXForm input/output types are the
same, because this is wrong in many case.
This also eliminates a bug which caused a lot of ambiguous
patterns to go undetected, where a register class would
sometimes pick the first possible type, causing an
ambiguous pattern to get arbitrary results.
With all the recent target changes, this causes no
functionality change!
llvm-svn: 98534
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