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path: root/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
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* [Tablegen] Attempt to add support for patterns containing nodes with ↵Craig Topper2015-03-201-22/+27
| | | | | | | | | | multiple results. This is needed for AVX512 masked scatter/gather support. The R600 change is necessary to remove a hack that was working around the lack of multiple results. llvm-svn: 232798
* Improve and simplify EnforceSmallerThan for vector types.Craig Topper2015-03-101-54/+28
| | | | | | Explicitly compare the size of the scalar types and the whole vector size rather than just comparing enum encodings. llvm-svn: 231746
* Remove extra indentation of entire function body. NFC.Craig Topper2015-03-101-140/+140
| | | | llvm-svn: 231745
* Revert "[TableGen] Implement at least some support for multiple explicit ↵Craig Topper2015-03-051-10/+10
| | | | | | | | results in an instruction pattern. No functional change to existing patterns." This is failing on several build bots. llvm-svn: 231358
* [TableGen] Implement at least some support for multiple explicit results in ↵Craig Topper2015-03-051-10/+10
| | | | | | | | an instruction pattern. No functional change to existing patterns. This should help with the AVX512 masked gather changes Elena is working on. This patch is derived from some of the changes Elena made to tablegen, but modified by me to support arbitrary number of results. llvm-svn: 231357
* [TableGen] Add support constraining a vector type in a pattern to have a ↵Craig Topper2015-03-051-0/+111
| | | | | | specific element type and for constraining a vector type to have the same number of elements as another vector type. This is useful for AVX512 mask operations so we relate the mask type to the type of the other arguments. llvm-svn: 231356
* [Tablegen] Use correct result number variables with the pattern nodes they ↵Craig Topper2015-03-041-2/+2
| | | | | | go with when handling SDTCisSameAs. No functional change as they are always both 0 unless you try to define a multi result type profile that uses SDTCisSame on one of the other results. llvm-svn: 231226
* Reverted 230471 - gather scatter handling in table gen.Elena Demikhovsky2015-03-011-15/+5
| | | | llvm-svn: 230892
* AVX-512: Gather and Scatter patternsElena Demikhovsky2015-02-251-5/+15
| | | | | | | | | | | | | | | Gather and scatter instructions additionally write to one of the source operands - mask register. In this case Gather has 2 destination values - the loaded value and the mask. Till now we did not support code gen pattern for gather - the instruction was generated from intrinsic only and machine node was hardcoded. When we introduce the masked_gather node, we need to select instruction automatically, in the standard way. I added a flag "hasTwoExplicitDefs" that allows to handle 2 destination operands. (Some code in the X86InstrFragmentsSIMD.td is commented out, just to split one big patch in many small patches) llvm-svn: 230471
* Intrinsics: introduce llvm_any_ty aka ValueType AnyRamkumar Ramachandra2015-01-221-1/+1
| | | | | | | | | | | | | | | Specifically, gc.result benefits from this greatly. Instead of: gc.result.int.* gc.result.float.* gc.result.ptr.* ... We now have a gc.result.* that can specialize to literally any type. Differential Revision: http://reviews.llvm.org/D7020 llvm-svn: 226857
* Clean up static analyzer warnings.Michael Ilseman2014-12-121-1/+3
| | | | | | | | | Clang's static analyzer found several potential cases of undefined behavior, use of un-initialized values, and potentially null pointer dereferences in tablegen, Support, MC, and ADT. This cleans them up with specific assertions on the assumptions of the code. llvm-svn: 224154
* Try to include operand counts for mismatches in tablegen.Matt Arsenault2014-12-111-6/+21
| | | | llvm-svn: 224068
* Remove neverHasSideEffects support from TableGen CodeGenInstruction. ↵Craig Topper2014-11-261-7/+0
| | | | | | Everyone should use hasSideEffects now. llvm-svn: 222809
* Revert "Improve memory ownership/management in TableGen by unique_ptrifying ↵David Blaikie2014-11-171-36/+34
| | | | | | | | | | | | TreePattern's Tree member." This reverts commit r222183. Broke on the MSVC buildbots due to MSVC not producing default move operations - I'd fix it immediately but just broke my build system a bit, so backing out until I have a chance to get everything going again. llvm-svn: 222187
* Improve memory ownership/management in TableGen by unique_ptrifying ↵David Blaikie2014-11-171-34/+36
| | | | | | | | | | | | TreePattern's Tree member. The next step is to actually use unique_ptr in TreePatternNode's Children vector. That will be more intrusive, and may not work, depending on exactly how these things are handled (I have a bad suspicion things are shared more than they should be, making this more DAG than tree - but if it's really a tree, unique_ptr should suffice) llvm-svn: 222183
* Turn a leaked object into a stack variable instead.David Blaikie2014-11-141-19/+19
| | | | llvm-svn: 222046
* Use unique_ptr to handle ownership of TreePatterns in ↵David Blaikie2014-11-131-15/+8
| | | | | | | | | CodeGenDAGPatterns::PatternFragments We might be able to use unique_ptr to handle ownership of the TreePatternNodes too - looking into that next. llvm-svn: 221928
* Make TreePattern::error use TwineMatt Arsenault2014-11-111-1/+1
| | | | | | | The underlying error function already uses a Twine, and most of the uses build up strings. llvm-svn: 221740
* Support REG_SEQUENCE in tablegen.Matt Arsenault2014-11-021-2/+39
| | | | | | | | | The problem is mostly that variadic output instruction aren't handled, so it is rejected for having an inconsistent number of operands, and then the right number of operands isn't emitted. llvm-svn: 221117
* TableGen: Allow AddedComplexity values to be negativeTom Stellard2014-08-011-1/+1
| | | | | | | | | | | | | This is useful for cases when stand-alone patterns are preferred to the patterns included in the instruction definitions. Instead of requiring that stand-alone patterns set a larger AddedComplexity value, which can be confusing to new developers, the allows us to reduce the complexity of the included patterns to achieve the same result. There will be test cases for this added to the R600 backend in a future commit. llvm-svn: 214466
* Revert of r213521. This change introduced a non-hermetic test (depending on aRichard Smith2014-07-221-1/+1
| | | | | | | | | | file not in the test/ area). Backing out now so that this test isn't part of the 3.5 branch. Original commit message: "TableGen: Allow AddedComplexity values to be negative [...]" llvm-svn: 213596
* TableGen: Allow AddedComplexity values to be negativeTom Stellard2014-07-211-1/+1
| | | | | | | | | | This is useful for cases when stand-alone patterns are preferred to the patterns included in the instruction definitions. Instead of requiring that stand-alone patterns set a larger AddedComplexity value, which can be confusing to new developers, the allows us to reduce the complexity of the included patterns to achieve the same result. llvm-svn: 213521
* Change an assert() to a diagnostic.Jim Grosbach2014-07-091-3/+5
| | | | llvm-svn: 212637
* ARM64: separate load/store operands to simplify assemblerTim Northover2014-05-221-3/+3
| | | | | | | | | | | | | | | | | | | This changes ARM64 to use separate operands for each component of an address, and look for separate '[', '$Rn, ..., ']' tokens when parsing. This allows us to do away with quite a bit of special C++ code to handle monolithic "addressing modes" in the MC components. The more incremental matching of the assembler operands also allows for better diagnostics when LLVM is presented with invalid input. Most of the complexity here is with the register-offset instructions, which were extremely dodgy beforehand: even when the instruction used wM, LLVM's model had xM as an operand. We papered over this discrepancy before, but that approach doesn't work now so I split them into separate X and W variants. llvm-svn: 209425
* TableGen: permit non-leaf ComplexPattern usesTim Northover2014-05-201-15/+81
| | | | | | | | | | | | | | | | | | This allows the results of a ComplexPattern check to be distributed to separate named Operands, instead of the current system where all results must apply (and match perfectly) with a single Operand. For example, if "some_addrmode" is a ComplexPattern producing two results, you can write: def : Pat<(load (some_addrmode GPR64:$base, imm:$offset)), (INST GPR64:$base, imm:$offset)>; This should allow neater instruction definitions in TableGen that don't put all possible aspects of addressing into a single operand, but are still usable with relatively simple C++ CodeGen idioms. llvm-svn: 209206
* [Modules] Make Support/Debug.h modular. This requires it to not changeChandler Carruth2014-04-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | behavior based on other files defining DEBUG_TYPE, which means it cannot define DEBUG_TYPE at all. This is actually better IMO as it forces folks to define relevant DEBUG_TYPEs for their files. However, it requires all files that currently use DEBUG(...) to define a DEBUG_TYPE if they don't already. I've updated all such files in LLVM and will do the same for other upstream projects. This still leaves one important change in how LLVM uses the DEBUG_TYPE macro going forward: we need to only define the macro *after* header files have been #include-ed. Previously, this wasn't possible because Debug.h required the macro to be pre-defined. This commit removes that. By defining DEBUG_TYPE after the includes two things are fixed: - Header files that need to provide a DEBUG_TYPE for some inline code can do so by defining the macro before their inline code and undef-ing it afterward so the macro does not escape. - We no longer have rampant ODR violations due to including headers with different DEBUG_TYPE definitions. This may be mostly an academic violation today, but with modules these types of violations are easy to check for and potentially very relevant. Where necessary to suppor headers with DEBUG_TYPE, I have moved the definitions below the includes in this commit. I plan to move the rest of the DEBUG_TYPE macros in LLVM in subsequent commits; this one is big enough. The comments in Debug.h, which were hilariously out of date already, have been updated to reflect the recommended practice going forward. llvm-svn: 206822
* [C++11] More 'nullptr' conversion. In some cases just using a boolean check ↵Craig Topper2014-04-151-19/+19
| | | | | | instead of comparing to nullptr. llvm-svn: 206254
* tblgen: Twinify PrintFatalError.Benjamin Kramer2014-03-291-2/+3
| | | | | | No functionality change. llvm-svn: 205110
* Add an OutPatFrag TableGen classHal Finkel2014-02-281-4/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately, it is currently impossible to use a PatFrag as part of an output pattern (the part of the pattern that has instructions in it) in TableGen. Looking at the current implementation, this was clearly intended to work (there is already code in place to expand patterns in the output DAG), but is currently broken by the baked-in type-checking assumption and the order in which the pattern fragments are processed (output pattern fragments need to be processed after the instruction definitions are processed). Fixing this is fairly simple, but requires some way of differentiating output patterns from the existing input patterns. The simplest way to handle this seems to be to create a subclass of PatFrag, and so that's what I've done here. As a simple example, this allows us to write: def crnot : OutPatFrag<(ops node:$in), (CRNOR $in, $in)>; def : Pat<(not i1:$in), (crnot $in)>; which captures the core use case: handling of repeated subexpressions inside of complicated output patterns. This will be used by an upcoming commit to the PowerPC backend. llvm-svn: 202450
* Improve handling of EnforceSmallerThan. Remove all types that are smaller ↵Craig Topper2014-01-281-137/+87
| | | | | | from the larger set not just the smallest type from the smaller set. Ensure 'smaller' vectors have the same or fewer total bits. Similar for 'larger' vectors. llvm-svn: 200287
* Don't use EnforceSmallerThan for EnforceVectorSubVectorTypeIs. ↵Craig Topper2014-01-251-2/+53
| | | | | | EnforceSmallerThan doesn't handle vectors quite right and should really enforce that vectors have the same number of elements. Add explicit checks for vector element count differing in EnforceVectorSubVectorTypeIs instead. This removes some unnecessary type checks in X86GenDAGISel.inc. llvm-svn: 200091
* Use isConcrete and getConcrete instead of using TypeVec directly.Craig Topper2014-01-251-3/+3
| | | | llvm-svn: 200071
* Fix EnforceSmallerThan to check !hasVectorTypes on the other type instead of ↵Craig Topper2014-01-251-1/+1
| | | | | | this type to force this type to be scalar. llvm-svn: 200070
* [TableGen] Handle ValueType in CodeGenDAGPatterns GetNumNodeResultsHal Finkel2014-01-021-0/+3
| | | | | | | | | | | | A ValueType in a pattern dag is a type cast, and GetNumNodeResults should handle it (the type cast has only one result). This comes up, for example, during the type checking of pattern fragments, for example, AArch64's Neon_combine_2d fragment is: dag Operands = (ops node:$Rm, node:$Rn); dag Fragment = (v2f64 (concat_vectors (v1f64 node:$Rm), (v1f64 node:$Rn))); llvm-svn: 198347
* TableGen: remove unused variable.Ahmed Bougacha2013-10-281-0/+1
| | | | llvm-svn: 193527
* TableGen: Refactor DAG patterns to enable parsing one pattern at a time.Ahmed Bougacha2013-10-281-50/+60
| | | | llvm-svn: 193526
* Replace EVT with MVT in CodeGenDAGAPatterns.cpp.Craig Topper2013-09-251-14/+14
| | | | llvm-svn: 191355
* Fix formatting to match coding standards.Craig Topper2013-09-241-10/+7
| | | | llvm-svn: 191280
* Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid ↵Craig Topper2013-07-041-2/+2
| | | | | | specifying the vector size. llvm-svn: 185606
* Allow types to be omitted in output patterns.Jakob Stoklund Olesen2013-03-241-0/+10
| | | | | | | | | | This syntax is now preferred: def : Pat<(subc i32:$b, i32:$c), (SUBCCrr $b, $c)>; There is no reason to repeat the types in the output pattern. llvm-svn: 177844
* Allow direct value types to be used in instruction 'set' patterns.Jakob Stoklund Olesen2013-03-241-2/+24
| | | | | | | | | | | | This makes it possible to define instruction patterns like this: def LDri : F3_2<3, 0b000000, (outs IntRegs:$dst), (ins MEMri:$addr), "ld [$addr], $dst", [(set i32:$dst, (load ADDRri:$addr))]>; ~~~ llvm-svn: 177834
* Allow direct value types in pattern definitions.Jakob Stoklund Olesen2013-03-231-2/+18
| | | | | | | | | | | | | | | | | Just like register classes, value types can be used in two ways in patterns: (sext_inreg i32:$src, i16) In a named leaf node like i32:$src, the value type simply provides the type of the node directly. This simplifies type inference a lot compared to the current practice of specifiying types indirectly with register classes. As an unnamed leaf node, like i16 above, the value type represents itself as an MVT::Other immediate. llvm-svn: 177828
* Make all unnamed RegisterClass TreePatternNodes typed MVT::i32.Jakob Stoklund Olesen2013-03-231-21/+20
| | | | | | | | | | | | | | | | | | | | | A register class can appear as a leaf TreePatternNode with and without a name: (COPY_TO_REGCLASS GPR:$src, F8RC) In a named leaf node like GPR:$src, the register class provides type information for the named variable represented by the node. The TypeSet for such a node is the set of value types that the register class can represent. In an unnamed leaf node like F8RC above, the register class represents itself as a kind of immediate. Such a node has the type MVT::i32, we'll never create a virtual register representing it. This change makes it possible to remove the special handling of COPY_TO_REGCLASS in CodeGenDAGPatterns.cpp. llvm-svn: 177825
* Extend TableGen instruction selection matcher to improve handlingUlrich Weigand2013-03-191-1/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | of complex instruction operands (e.g. address modes). Currently, if a Pat pattern creates an instruction that has a complex operand (i.e. one that consists of multiple sub-operands at the MI level), this operand must match a ComplexPattern DAG pattern with the correct number of output operands. This commit extends TableGen to alternatively allow match a complex operands against multiple separate operands at the DAG level. This allows using Pat patterns to match pre-increment nodes like pre_store (which must have separate operands at the DAG level) onto an instruction pattern that uses a multi-operand memory operand, like the following example on PowerPC (will be committed as a follow-on patch): def STWU : DForm_1<37, (outs ptr_rc:$ea_res), (ins GPRC:$rS, memri:$dst), "stwu $rS, $dst", LdStStoreUpd, []>, RegConstraint<"$dst.reg = $ea_res">, NoEncode<"$ea_res">; def : Pat<(pre_store GPRC:$rS, ptr_rc:$ptrreg, iaddroff:$ptroff), (STWU GPRC:$rS, iaddroff:$ptroff, ptr_rc:$ptrreg)>; Here, the pair of "ptroff" and "ptrreg" operands is matched onto the complex operand "dst" of class "memri" in the "STWU" instruction. Approved by Jakob Stoklund Olesen. llvm-svn: 177428
* Extract a method.Jakob Stoklund Olesen2013-03-181-41/+37
| | | | | | | This computes the type of an instruction operand or result based on the records in the instruction's ins and outs lists. llvm-svn: 177244
* Use ArrayRef<MVT::SimpleValueType> when possible.Jakob Stoklund Olesen2013-03-171-2/+2
| | | | | | | Not passing vector references around makes it possible to use SmallVector in most places. llvm-svn: 177235
* Sort the #include lines for utils/...Chandler Carruth2012-12-041-3/+3
| | | | | | | I've tried to find main moudle headers where possible, but the TableGen stuff may warrant someone else looking at it. llvm-svn: 169251
* Don't return false when the function's return type is a pointer.Kaelyn Uhrain2012-10-251-2/+2
| | | | llvm-svn: 166719
* Remove exception handling usage from tblgen.Joerg Sonnenberger2012-10-251-52/+109
| | | | | | | | | | | Most places can use PrintFatalError as the unwinding mechanism was not used for anything other than printing the error. The single exception was CodeGenDAGPatterns.cpp, where intermediate errors during type resolution were ignored to simplify incremental platform development. This use is replaced by an error flag in TreePattern and bailout earlier in various places if it is set. llvm-svn: 166712
* tblgen: Use semantically correct RTTI functions.Sean Silva2012-10-101-21/+19
| | | | | | Also, some minor cleanup. llvm-svn: 165647
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