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path: root/llvm/utils/TableGen/CodeEmitterGen.cpp
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* Revert 90628, which was incorrect.Dan Gohman2009-12-151-6/+9
| | | | llvm-svn: 91448
* Minor code simplification.Dan Gohman2009-12-051-9/+6
| | | | llvm-svn: 90628
* Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen2009-09-281-3/+3
| | | | | | | | | | unused DECLARE instruction. KILL is not yet used anywhere, it will replace TargetInstrInfo::IMPLICIT_DEF in the places where IMPLICIT_DEF is just used to alter liveness of physical registers. llvm-svn: 83006
* Convert more abort() calls to llvm_report_error().Torok Edwin2009-07-081-2/+4
| | | | | | Also remove trailing semicolon. llvm-svn: 75027
* Replace std::iostreams with raw_ostream in TableGen.Daniel Dunbar2009-07-031-1/+1
| | | | | | | | - Sorry, I can't help myself. - No intended functionality change. llvm-svn: 74742
* Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalizeDan Gohman2009-04-131-3/+3
| | | | | | | it accordingly. Thanks to Jakob Stoklund Olesen for pointing out how this might be useful. llvm-svn: 68986
* Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman2009-04-131-5/+8
| | | | | | | | | | | | | | | | This will be used to replace things like X86's MOV32to32_. Enhance ScheduleDAGSDNodesEmit to be more flexible and robust in the presense of subregister superclasses and subclasses. It can now cope with the definition of a virtual register being in a subclass of a use. Re-introduce the code for recording register superreg classes and subreg classes. This is needed because when subreg extracts and inserts get coalesced away, the virtual registers are left in the correct subclass. llvm-svn: 68961
* Fix shift overflow bug that would occur when a field was a full 32-bits Chris Lattner2008-10-051-1/+1
| | | | | | | in tblgen. This is PR2827, thanks to Waldemar Knorr for tracking this down. llvm-svn: 57124
* Add instruction names as comments to InstBits entries.Evan Cheng2008-09-171-5/+3
| | | | llvm-svn: 56275
* Eliminate a compile time warning.Evan Cheng2008-09-071-1/+1
| | | | llvm-svn: 55878
* Change getBinaryCodeForInstr prototype. First operand MachineInstr& should ↵Evan Cheng2008-09-021-1/+2
| | | | | | be const. Make corresponding changes. llvm-svn: 55623
* Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman2008-07-011-3/+9
| | | | | | | | | | | | | | | | the need for a flavor operand, and add a new SDNode subclass, LabelSDNode, for use with them to eliminate the need for a label id operand. Change instruction selection to let these label nodes through unmodified instead of creating copies of them. Teach the MachineInstr emitter how to emit a MachineInstr directly from an ISD label node. This avoids the need for allocating SDNodes for the label id and flavor value, as well as SDNodes for each of the post-isel label, label id, and label flavor. llvm-svn: 52943
* Make insert_subreg a two-address instruction, vastly simplifying ↵Christopher Lamb2008-03-161-3/+6
| | | | | | LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register. llvm-svn: 48412
* Replace all target specific implicit def instructions with a target ↵Evan Cheng2008-03-151-3/+6
| | | | | | independent one: TargetInstrInfo::IMPLICIT_DEF. llvm-svn: 48380
* SDIsel processes llvm.dbg.declare by recording the variable debug ↵Evan Cheng2008-02-021-0/+3
| | | | | | | | | information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc. Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes. For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time. llvm-svn: 46659
* remove attributions from utils.Chris Lattner2007-12-291-2/+2
| | | | llvm-svn: 45419
* Add target independent MachineInstr's to represent subreg insert/extract in ↵Christopher Lamb2007-07-261-3/+9
| | | | | | MBB's. PR1350 llvm-svn: 40518
* Files missing from LABEL check in.Jim Laskey2007-01-261-3/+9
| | | | llvm-svn: 33539
* What should be the last unnecessary <iostream>s in the library.Bill Wendling2006-12-071-1/+1
| | | | llvm-svn: 32333
* Remove the isTwoAddress property from the CodeGenInstruction class. It shouldChris Lattner2006-11-151-9/+9
| | | | | | | | | | not be used for anything other than backwards compat constraint handling. Add support for a new DisableEncoding property which contains a list of registers that should not be encoded by the generated code emitter. Convert the codeemitter generator to use this, fixing some PPC JIT regressions. llvm-svn: 31769
* Remove an unused variable.Reid Spencer2006-11-031-3/+1
| | | | llvm-svn: 31403
* Fix JIT encoding of two-addr instructions.Chris Lattner2006-09-051-0/+5
| | | | llvm-svn: 30111
* Clean up.Jim Laskey2006-07-131-1/+4
| | | | llvm-svn: 29137
* 1. Simplfy bit operations.Jim Laskey2006-07-131-177/+112
| | | | | | 2. Coalesce instruction cases. llvm-svn: 29135
* Move base value of instruction to lookup table to prepare for case reduction.Jim Laskey2006-07-121-17/+37
| | | | llvm-svn: 29122
* Reduce bloat in target libraries by removing per machine instruction assertionJim Laskey2006-07-111-3/+1
| | | | | | from code emitter generation. llvm-svn: 29097
* Fix miscodegen of V_SET0 in PPC.Chris Lattner2006-03-181-0/+4
| | | | llvm-svn: 26836
* Don't emit JIT code for these instructionsChris Lattner2006-01-271-0/+2
| | | | llvm-svn: 25669
* Fix an incompatibility with GCC 4.1, thanks to Vladimir MerzliakovChris Lattner2005-10-241-3/+0
| | | | | | for pointing this out! llvm-svn: 23963
* The code emitter generator only supports targets with 32-bit instructionChris Lattner2005-08-191-1/+1
| | | | | | words. There is no way for one of these targets to have a > 32-bit immediate! llvm-svn: 22897
* Remove trailing whitespaceMisha Brukman2005-04-221-15/+15
| | | | llvm-svn: 21428
* * Factor out (into new fn) a loop emitting operand shifts into the instructionMisha Brukman2004-10-141-46/+76
| | | | | | | * Reverse instruction bit components for a LittleEndian-style encoding * Fix some comments and spacing llvm-svn: 16975
* Changes For Bug 352Reid Spencer2004-09-011-1/+1
| | | | | | | | Move include/Config and include/Support into include/llvm/Config, include/llvm/ADT and include/llvm/Support. From here on out, all LLVM public header files must be under include/llvm/. llvm-svn: 16137
* Do not #include files into the llvm namespaceChris Lattner2004-08-171-1/+2
| | | | llvm-svn: 15849
* Deleted commented-out code as we now get namespace directly, add commentsMisha Brukman2004-08-101-2/+3
| | | | llvm-svn: 15627
* Use the target name instead of hard-coding SparcV9.Misha Brukman2004-08-101-3/+3
| | | | llvm-svn: 15616
* This was a good idea, but until this does not break the build ofChris Lattner2004-08-101-3/+3
| | | | | | lib/Target/Sparc, we should not use it. llvm-svn: 15603
* Use the current target name instead of a ClassPrefix.Misha Brukman2004-08-091-3/+3
| | | | llvm-svn: 15585
* * Use Classname and ClassPrefix instead of hard-coded V9 valuesMisha Brukman2004-08-091-8/+7
| | | | | | * Simplify code and shorten lines by not recomputing values llvm-svn: 15582
* * Added documentation in the file headerMisha Brukman2004-08-041-2/+4
| | | | | | * Shorten assert() text to make it fit within 80 cols llvm-svn: 15508
* Finegrainify namespacificationChris Lattner2004-08-011-4/+1
| | | | llvm-svn: 15381
* Put all LLVM code into the llvm namespace, as per bug 109.Brian Gaeke2003-11-111-0/+6
| | | | llvm-svn: 9903
* Added LLVM copyright header.John Criswell2003-10-201-0/+7
| | | | llvm-svn: 9305
* Move support/tools/* back into utilsChris Lattner2003-10-051-0/+217
llvm-svn: 8875
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