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path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
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* Use a SmallVector instead of std::vector for ResOperands.Jim Grosbach2012-04-191-2/+2
| | | | | | | There's almost always a small number of instruction operands, so use a SmallVector and save on heap allocations. llvm-svn: 155143
* Update some internal naming conventions to modern style.Jim Grosbach2012-04-191-85/+85
| | | | llvm-svn: 155142
* Fix typo.Jim Grosbach2012-04-181-1/+1
| | | | llvm-svn: 155075
* Sanity check error handling for TokenAlias.Jim Grosbach2012-04-171-0/+3
| | | | llvm-svn: 154951
* Tidy up. 80 columns.Jim Grosbach2012-04-171-7/+9
| | | | llvm-svn: 154881
* Tidy up. Remove hard tab characters.Jim Grosbach2012-04-111-28/+28
| | | | llvm-svn: 154532
* Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit ↵Craig Topper2012-04-021-24/+25
| | | | | | tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree. llvm-svn: 153865
* Make MnemonicTable const again. That part of r152202 was OK.Jakob Stoklund Olesen2012-03-151-4/+4
| | | | llvm-svn: 152840
* Don't assume all mnemonics fit in 64k.Jakob Stoklund Olesen2012-03-151-2/+2
| | | | | | | We currently assume that all targets have less than 64k opcodes. We shouldn't limit it further. llvm-svn: 152833
* Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."Jakob Stoklund Olesen2012-03-151-10/+8
| | | | | | | | We cannot limit the concatenated instruction names to 64K. ARM is already at 32K, and it is easy to imagine a target with more instructions. llvm-svn: 152817
* Re-commit r152202 hopefully fixing the MSVC linker error.Craig Topper2012-03-081-8/+10
| | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152296
* Revert r152202 as it's causing internal buildbot failures.Chad Rosier2012-03-071-10/+8
| | | | | | | | | | Original commit message: Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152233
* Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to ↵Craig Topper2012-03-071-8/+10
| | | | | | protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable. llvm-svn: 152202
* Perform the string table optimization for OperandMatchEntries too.Benjamin Kramer2012-03-031-10/+28
| | | | llvm-svn: 151986
* Shrink the asm matcher tables.Benjamin Kramer2012-03-031-8/+23
| | | | | | | | | | | | - Shrink the opcode field to 16 bits. - Shrink the AsmVariantID field to 8 bits. - Store the mnemonic string in a string table, store a 16 bit index. - Store a pascal-style length byte in the string instead of a null terminator, so we can avoid calling strlen on every entry we visit during mnemonic search. Shrinks X86AsmParser.o from 434k to 201k on x86_64 and eliminates relocs from the table. llvm-svn: 151984
* Revert "Emit the SubRegTable with the smallest possible integer type."Jim Grosbach2012-03-011-0/+9
| | | | | | | | | | This reverts commit 151760. We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo, but to do that, the type of the lookup table needs to be the same for all targets. llvm-svn: 151814
* Emit the SubRegTable with the smallest possible integer type.Benjamin Kramer2012-02-291-9/+0
| | | | | | Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets. llvm-svn: 151760
* Convert assert(0) to llvm_unreachableCraig Topper2012-02-051-1/+2
| | | | llvm-svn: 149814
* Tidy up. Trailing whitespace.Jim Grosbach2012-01-241-24/+24
| | | | llvm-svn: 148856
* Intel syntax: Ignore mnemonic aliases.Devang Patel2012-01-171-1/+3
| | | | llvm-svn: 148316
* Record asm variant id in MatchEntry and check it while matching instruction.Devang Patel2012-01-101-6/+14
| | | | llvm-svn: 147858
* Remove unnecessary default cases in switches that cover all enum values.David Blaikie2012-01-101-1/+0
| | | | llvm-svn: 147855
* Use descriptive variable name and remove incorrect operand number check.Devang Patel2012-01-091-12/+9
| | | | llvm-svn: 147802
* Split AsmParser into two components - AsmParser and AsmParserVariantDevang Patel2012-01-091-77/+81
| | | | | | | AsmParser holds info specific to target parser. AsmParserVariant holds info specific to asm variants supported by the target. llvm-svn: 147787
* Refactor.Devang Patel2012-01-071-38/+45
| | | | | | Store AsmParser info locally. A small step towards emitting match entries for multiple asm variants. llvm-svn: 147710
* Eliminate an error check that may not work with all asm syntax variants.Devang Patel2012-01-071-1/+2
| | | | llvm-svn: 147708
* Do not hard code asm variant number.Devang Patel2012-01-051-2/+7
| | | | llvm-svn: 147583
* Extend AsmMatcher token literal matching to allow aliasing.Jim Grosbach2011-12-061-27/+32
| | | | | | | | | | | | | | | | | For example, ARM allows: vmov.u32 s4, #0 -> vmov.i32, #0 'u32' is a more specific designator for the 32-bit integer type specifier and is legal for any instruction which accepts 'i32' as a datatype suffix. We want to say, def : TokenAlias<".u32", ".i32">; This works by marking the match class of 'From' as a subclass of the match class of 'To'. rdar://10435076 llvm-svn: 145992
* Tidy up. Fix naming convention stuff for some internal functions.Jim Grosbach2011-12-061-12/+12
| | | | llvm-svn: 145974
* Replace an assert() with an actual diagnostic.Jim Grosbach2011-11-301-1/+3
| | | | llvm-svn: 145535
* Allow InstAlias's to use immediate matcher patterns that xform the value.Jim Grosbach2011-10-281-3/+10
| | | | | | | | | For example, On ARM, "mov r3, #-3" is an alias for "mvn r3, #2", so we want to use a matcher pattern that handles the bitwise negation when mapping to t2MVNi. llvm-svn: 143233
* Pick low-hanging MatchEntry shrinkage fruit.Benjamin Kramer2011-10-171-4/+17
| | | | | | Shaves 200k off Release-Asserts clang binaries on i386. llvm-svn: 142191
* TableGen: Privatize CodeGenRegisterClass::TheDef and Name.Jakob Stoklund Olesen2011-10-041-1/+5
| | | | | | | | When TableGen starts creating its own register classes, the synthesized classes won't have a Record reference. All register classes must have a name, though. llvm-svn: 141081
* Move TableGen's parser and entry point into a libraryPeter Collingbourne2011-10-011-2/+2
| | | | | | This is the first step towards splitting LLVM and Clang's tblgen executables. llvm-svn: 140951
* Switch to ArrayRef<CodeGenRegisterClass*>.Jakob Stoklund Olesen2011-09-291-13/+14
| | | | | | | This makes it possible to allocate CodeGenRegisterClass instances dynamically and reorder them. llvm-svn: 140816
* Prefer diagnostics from target predicate in asm matcher.Jim Grosbach2011-08-161-2/+5
| | | | llvm-svn: 137742
* MCTargetAsmParser target match predicate support.Jim Grosbach2011-08-151-4/+16
| | | | | | | | Allow a target assembly parser to do context sensitive constraint checking on a potential instruction match. This will be used, for example, to handle Thumb2 IT block parsing. llvm-svn: 137675
* Move MatchResultTy enum into base class definition.Jim Grosbach2011-08-151-7/+0
| | | | | | | No need for it to be redefined as part of every derived target asm parser class. llvm-svn: 137649
* Unconstify InitsDavid Greene2011-07-291-12/+12
| | | | | | Remove const qualifiers from Init references, per Chris' request. llvm-svn: 136531
* [AVX] Constify InitsDavid Greene2011-07-291-12/+12
| | | | | | | Make references to Inits const everywhere. This is the final step before making them unique. llvm-svn: 136485
* Rename TargetAsmParser to MCTargetAsmParser and TargetAsmLexer to ↵Evan Cheng2011-07-261-1/+1
| | | | | | MCTargetAsmLexer; rename createAsmLexer to createMCAsmLexer and createAsmParser to createMCAsmParser. llvm-svn: 136027
* Have tblgen produce code that tolerates operands that return an invalid ↵Kevin Enderby2011-07-151-0/+4
| | | | | | match class. llvm-svn: 135287
* Revert r134921, 134917, 134908 and 134907. They're causing failuresEric Christopher2011-07-111-12/+12
| | | | | | in multiple buildbots. llvm-svn: 134936
* [AVX] Make Inits FoldableDavid Greene2011-07-111-12/+12
| | | | | | | | | | | | | | | | | | Manage Inits in a FoldingSet. This provides several benefits: - Memory for Inits is properly managed - Duplicate Inits are folded into Flyweights, saving memory - It enforces const-correctness, protecting against certain classes of bugs The above benefits allow Inits to be used in more contexts, which in turn provides more dynamism to TableGen. This enhanced capability will be used by the AVX code generator to a fold common patterns together. llvm-svn: 134907
* Fix dangling pointer.Eli Friedman2011-07-081-1/+1
| | | | llvm-svn: 134725
* Fix a dangling reference. Patch by Dave Abrahams. pr10311Evan Cheng2011-07-081-1/+2
| | | | llvm-svn: 134709
* Eliminate asm parser's dependency on TargetMachine:Evan Cheng2011-07-081-6/+33
| | | | | | | | | | - Each target asm parser now creates its own MCSubtatgetInfo (if needed). - Changed AssemblerPredicate to take subtarget features which tablegen uses to generate asm matcher subtarget feature queries. e.g. "ModeThumb,FeatureThumb2" is translated to "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0". llvm-svn: 134678
* Add support for alternative register names, useful for instructions whose ↵Owen Anderson2011-06-271-0/+25
| | | | | | | | operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0. Patch by Jim Grosbach. llvm-svn: 133940
* Consolidate some TableGen diagnostic helper functions.Jim Grosbach2011-06-211-0/+1
| | | | | | | TableGen had diagnostic printers sprinkled about in a few places. Pull them together into a single location in Error.cpp. llvm-svn: 133568
* Store CodeGenRegisters as pointers so they won't be reallocated.Jakob Stoklund Olesen2011-06-181-8/+11
| | | | | | | Reuse the CodeGenRegBank DenseMap in a few places that would build their own or use linear search. llvm-svn: 133333
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