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path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
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* tblgen: Use semantically correct RTTI functions.Sean Silva2012-10-101-5/+3
| | | | | | Also, some minor cleanup. llvm-svn: 165647
* tblgen: Mechanically move dynamic_cast<> to dyn_cast<>.Sean Silva2012-10-101-9/+9
| | | | | | | | | | Some of these dyn_cast<>'s would be better phrased as isa<> or cast<>. That will happen in a future patch. There are also two dyn_cast_or_null<>'s slipped in instead of dyn_cast<>'s, since they were causing crashes with just dyn_cast<>. llvm-svn: 165646
* [ms-inline asm] Add a few typedefs to simplify future changes.Chad Rosier2012-10-051-11/+12
| | | | llvm-svn: 165324
* [ms-inline asm] Default to the 'm' constraint. This matches the behavior of theChad Rosier2012-10-031-3/+3
| | | | | | MSVC compiler. llvm-svn: 165174
* Fix 80-column violations. Cleanup whitespace in generated code.Chad Rosier2012-10-021-15/+23
| | | | llvm-svn: 164983
* [ms-inline asm] Add the convertToMapAndConstraints() function that is used toChad Rosier2012-10-011-45/+38
| | | | | | | | | | | map constraints and MCInst operands to inline asm operands. This replaces the getMCInstOperandNum() function. The logic to determine the constraints are not in place, so we still default to a register constraint (i.e., "r"). Also, we no longer build the MCInst but rather return just the opcode to get the MCInstrDesc. llvm-svn: 164979
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-6/+6
| | | | | | Also remove an unused argument. llvm-svn: 164567
* Rather then have a wrapper function, have tblgen instantiate the implementation.Chad Rosier2012-09-241-2/+2
| | | | llvm-svn: 164548
* [ms-inline asm] Expose the mnemonicIsValid() function in the AsmParser.Chad Rosier2012-09-211-2/+2
| | | | llvm-svn: 164420
* Whitespace.Chad Rosier2012-09-211-2/+2
| | | | llvm-svn: 164406
* Iterate deterministicaly over ClassInfo*'sSean Silva2012-09-191-2/+12
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164191
* Iterate deterministically over register classesSean Silva2012-09-191-2/+3
| | | | | | | | Fixes an observed instance of nondeterministic TableGen output. Review by Jakob. llvm-svn: 164190
* Make custom operand parsing mnemonic indices use the same mnemonic table as ↵Craig Topper2012-09-181-34/+39
| | | | | | the match table. Reorder fields in OperandMatchEntry to provide the least amount of padding for in tree targets. llvm-svn: 164109
* Use variable type for index into mnemonic table. Shrinks size of index field ↵Craig Topper2012-09-181-5/+14
| | | | | | on in tree targets. Saving static data space. llvm-svn: 164108
* Mark asm matcher conversion table as const.Craig Topper2012-09-181-5/+5
| | | | llvm-svn: 164088
* Fix typo in comment. No functional change.Craig Topper2012-09-181-1/+1
| | | | llvm-svn: 164086
* Fix Doxygen issues: wrap code examples in \code and use \p to refer toDmitri Gribenko2012-09-151-4/+4
| | | | | | parameters. llvm-svn: 163984
* TableGen: Convert an assert() to a proper diagnostic.Jim Grosbach2012-09-121-1/+3
| | | | llvm-svn: 163726
* Fix function name per coding standard.Chad Rosier2012-09-051-3/+3
| | | | llvm-svn: 163187
* Fix function name per coding standard.Chad Rosier2012-09-051-4/+4
| | | | llvm-svn: 163186
* [ms-inline asm] Make comment more verbose and add an assert.Chad Rosier2012-09-031-1/+2
| | | | llvm-svn: 163125
* [ms-inline asm] Asm operands can map to one or more MCOperands. Therefore, addChad Rosier2012-09-031-2/+20
| | | | | | | the NumMCOperands argument to the GetMCInstOperandNum() function that is set to the number of MCOperands this asm operand mapped to. llvm-svn: 163124
* [ms-inline asm] Add an interface to the GetMCInstOperandNum() function in theChad Rosier2012-09-031-6/+7
| | | | | | MCTargetAsmParser class. llvm-svn: 163122
* Remove extraneous return.Chad Rosier2012-09-031-1/+1
| | | | llvm-svn: 163119
* [ms-inline asm] Return the MCOperandNum instead of passing a reference.Chad Rosier2012-09-031-10/+9
| | | | llvm-svn: 163118
* Removed unused argument.Chad Rosier2012-09-031-5/+4
| | | | llvm-svn: 163104
* [ms-inline asm] Expose the Kind and Opcode variables from theChad Rosier2012-09-031-5/+8
| | | | | | | | | | MatchInstructionImpl() function. These values are used by the ConvertToMCInst() function to index into the ConversionTable. The values are also needed to call the GetMCInstOperandNum() function. llvm-svn: 163101
* Remove an unused argument. The MCInst opcode is set in the ConvertToMCInst()Chad Rosier2012-08-311-1/+1
| | | | | | function nowadays. llvm-svn: 163030
* With the fix in r162954/162955 every cvt function returns true. Thus, haveChad Rosier2012-08-311-13/+11
| | | | | | | the ConvertToMCInst() return void, rather then a bool. Update all the cvt functions as well. llvm-svn: 162961
* Whitespace.Chad Rosier2012-08-301-1/+1
| | | | llvm-svn: 162946
* Whitespace.Chad Rosier2012-08-301-1/+1
| | | | llvm-svn: 162945
* Hoist a check to eliminate obvious mismatches as early as possible. Also, fixChad Rosier2012-08-301-8/+8
| | | | | | an 80-column violation in the generated code. No functional change intended. llvm-svn: 162944
* [ms-inline asm] Add a new function, GetMCInstOperandNum, to theChad Rosier2012-08-301-1/+43
| | | | | | | | | | | | | | | | | | | | | | | AsmMatcherEmitter. This function maps inline assembly operands to MCInst operands. For example, '__asm mov j, eax' is represented by the follow MCInst: <MCInst 1460 <MCOperand Reg:0> <MCOperand Imm:1> <MCOperand Reg:0> <MCOperand Expr:(j)> <MCOperand Reg:0> <MCOperand Reg:43>> The first 5 MCInst operands are a result of j matching as a memory operand consisting of a BaseReg (Reg:0), MemScale (Imm:1), MemIndexReg(Reg:0), Expr (Expr:(j), and a MemSegReg (Reg:0). The 6th MCInst operand represents the eax register (Reg:43). This translation is necessary to determine the Input and Output Exprs. If a single asm operand maps to multiple MCInst operands, the index of the first MCInst operand is returned. Ideally, it would return the operand we really care out (i.e., the Expr:(j) in this case), but I haven't found an easy way of doing this yet. llvm-svn: 162920
* Fix a nondeterminism in the ARM assembler.Andrew Trick2012-08-291-0/+9
| | | | | | | | | | Adding arbitrary records to ARM.td would break basic-arm-instructions.s because selection of nop vs mov r0,r0 was ambiguous (this will be tested by a subsequent addition to ARM.td). An imperfect but sensible fix is to give precedence to match rules that have more constraints. llvm-svn: 162824
* Print out the location of expanded multiclass defs in TableGen errors.Jakob Stoklund Olesen2012-08-221-1/+1
| | | | | | | | | | | | | | | | | | | When reporting an error for a defm, we would previously only report the location of the outer defm, which is not always where the error is. Now we also print the location of the expanded multiclass defs: lib/Target/X86/X86InstrSSE.td:2902:12: error: foo defm ADD : basic_sse12_fp_binop_s<0x58, "add", fadd, SSE_ALU_ITINS_S>, ^ lib/Target/X86/X86InstrSSE.td:2801:11: note: instantiated from multiclass defm PD : sse12_fp_packed<opc, !strconcat(OpcodeStr, "pd"), OpNode, VR128, ^ lib/Target/X86/X86InstrSSE.td:194:5: note: instantiated from multiclass def rm : PI<opc, MRMSrcMem, (outs RC:$dst), (ins RC:$src1, x86memop:$src2), ^ llvm-svn: 162409
* TblGen: Make asm-matcher ConvertToMCInst() table driven.Jim Grosbach2012-08-221-55/+177
| | | | | | | | | | | | No change in interface or functionality. Purely under-the-hood details of the generated function that change. The X86 assembly parser is reduced in size by over 15% and ARM by over 10%. No performance change by my measurements. llvm-svn: 162337
* Formatting. No functional change.Chad Rosier2012-08-211-2/+2
| | | | llvm-svn: 162292
* Add stub methods for mips assembly matcher. Akira Hatanaka2012-08-171-1/+3
| | | | | | Patch by Vladimir Medic. llvm-svn: 162124
* Remove extraneous ';'.Bill Wendling2012-08-041-1/+1
| | | | llvm-svn: 161298
* Defer checking for registers in the MC AsmMatcher until the after ↵Owen Anderson2012-07-161-16/+16
| | | | | | user-defined match classes have been checked. This allows the creation of MatchClass's that are supersets of a register class. llvm-svn: 160327
* TableGen: Assembly matcher 'insufficient operands' diagnostic.Jim Grosbach2012-07-121-0/+1
| | | | | | | | | | Make sure the tblgen'erated asm matcher correctly returns numoperands+1 as the ErrorInfo when the problem was that there weren't enough operands specified. rdar://9142751 llvm-svn: 160144
* TableGen: AsmMatcher diagnostics preference detail.Jim Grosbach2012-06-261-1/+3
| | | | | | | Don't override a custom diagnostic w/ a generic InvalidOperand, all else being equal. llvm-svn: 159238
* TableGen: AsmMatcher support for better operand diagnostics.Jim Grosbach2012-06-221-16/+69
| | | | | | | | | | | | | "Invalid operand" may be a completely correct diagnostic, but it's often insufficiently specific to really help identify and fix the problem in assembly source. Allow a target to specify a more-specific diagnostic kind for each AsmOperandClass derived definition and use that to provide more detailed diagnostics when an operant of that class resulted in a match failure. rdar://8987109 llvm-svn: 159050
* TableGen: AsmMatcher missing-features list minimization.Jim Grosbach2012-06-181-3/+9
| | | | | | | | | When returning a 'cannot match due to missing CPU features' error code, if there are multiple potential matches with different feature sets, return the smallest set of missing features from the alternatives as that's most likely to be the one that's desired. llvm-svn: 158673
* Write llvm-tblgen backends as functions instead of sub-classes.Jakob Stoklund Olesen2012-06-111-4/+20
| | | | | | | | | The TableGenBackend base class doesn't do much, and will be removed completely soon. Patch by Sean Silva! llvm-svn: 158311
* TableGen: AsmMatcher diagnostic when missing instruction mnemonic.Jim Grosbach2012-05-061-0/+3
| | | | | | | Previously, if an instruction definition was missing the mnemonic, the next line would just assert(). Issue a real diagnostic instead. llvm-svn: 156263
* Move llvm-tblgen's StringMatcher into the TableGen library so it canDouglas Gregor2012-05-021-1/+1
| | | | | | be used by clang-tblgen. llvm-svn: 156000
* Add ifdef around getSubtargetFeatureName in tablegen output file so that ↵Craig Topper2012-04-251-3/+7
| | | | | | only targets that want the function get it. This prevents other targets from getting an unused function warning. llvm-svn: 155538
* ARM: improved assembler diagnostics for missing CPU features.Jim Grosbach2012-04-241-2/+26
| | | | | | | | | | | When an instruction match is found, but the subtarget features it requires are not available (missing floating point unit, or thumb vs arm mode, for example), issue a diagnostic that identifies what the feature mismatch is. rdar://11257547 llvm-svn: 155499
* TableGen support for auto-generating assembly two-operand aliases.Jim Grosbach2012-04-191-2/+97
| | | | | | | | | | | | | | Assembly matchers for instructions with a two-operand form. ARM is full of these, for example: add {Rd}, Rn, Rm // Rd is optional and is the same as Rn if omitted. The property TwoOperandAliasConstraint on the instruction definition controls when, and if, an alias will be formed. No explicit InstAlias definitions are required. rdar://11255754 llvm-svn: 155172
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