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path: root/llvm/utils/TableGen/AsmMatcherEmitter.cpp
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* [NFC] Header cleanupMehdi Amini2016-04-181-2/+1
| | | | | | | | | | | | | | Removed some unused headers, replaced some headers with forward class declarations. Found using simple scripts like this one: clear && ack --cpp -l '#include "llvm/ADT/IndexedMap.h"' | xargs grep -L 'IndexedMap[<]' | xargs grep -n --color=auto 'IndexedMap' Patch by Eugene Kosov <claprix@yandex.ru> Differential Revision: http://reviews.llvm.org/D19219 From: Mehdi Amini <mehdi.amini@apple.com> llvm-svn: 266595
* [TableGen] AsmMatcherEmitter.cpp: replace a sequence of "if" to "switch" in ↵Valery Pykhtin2016-04-051-2/+6
| | | | | | | | emitValidateOperandClass. Differential Revision: http://reviews.llvm.org/D18394 llvm-svn: 265412
* [TableGen] AsmMatcher: Skip optional operands in the midle of instruction if ↵Nikolay Haustov2016-03-011-14/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | it is not present Previosy, if actual instruction have one of optional operands then other optional operands listed before this also should be presented. For example instruction v_fract_f32 v0, v1, mul:2 have one optional operand - OMod and do not have optional operand clamp. Previously this was not allowed because clamp is listed before omod in AsmString: string AsmString = "v_fract_f32$vdst, $src0_modifiers$clamp$omod"; Making this work required some hacks (both OMod and Clamp match classes have same PredicateMethod). Now, if MatchInstructionImpl meets formal optional operand that is not presented in actual instruction it skips this formal operand and tries to match current actual operand with next formal. Patch by: Sam Kolton Review: http://reviews.llvm.org/D17568 [AMDGPU] Assembler: Check immediate types for several optional operands in predicate methods With this change you should place optional operands in order specified by asm string: clamp -> omod offset -> glc -> slc -> tfe Fixes for several tests. Depends on D17568 Patch by: Sam Kolton Review: http://reviews.llvm.org/D17644 llvm-svn: 262314
* TableGen: Add IsOptional field to AsmOperandClassTom Stellard2016-02-051-1/+15
| | | | | | | | | | | | | | | Summary: This makes it possible to specify some operands as optional to the AsmMatcher. Setting this field to true will prevent the AsmMatcher from emitting 'too few operands' errors when there are missing optional operands. Reviewers: olista01, ab Subscribers: nhaustov, arsenm, llvm-commits Differential Revision: http://reviews.llvm.org/D15755 llvm-svn: 259913
* [TableGen] Add 'register alternative name matching' supportDylan McKay2016-02-031-0/+34
| | | | | | | | | | | | | | | | | Summary: This adds a new attribute which targets can set in TableGen which causes a function to be generated which matches register alternative names. This is very similar to `ShouldEmitMatchRegisterName`, except it works on alt names. This patch is currently used by the out of tree part of the AVR backend. It reduces code duplication greatly, and has the effect that you do not need to hardcode altname to register mappings in C++. It will not work on targets which have registers which share the same aliases. Reviewers: stoklund, arsenm, dsanders, hfinkel, vkalintiris Subscribers: hfinkel, dylanmckay, llvm-commits Differential Revision: http://reviews.llvm.org/D16312 llvm-svn: 259636
* Fix Clang-tidy readability-redundant-control-flow warnings; other minor fixes.Eugene Zelenko2016-02-021-11/+5
| | | | | | Differential revision: http://reviews.llvm.org/D16793 llvm-svn: 259539
* [TableGen] Fix sort order of asm operand classesOliver Stannard2016-01-251-20/+85
| | | | | | | | | | | | | | | | | | | | | | This is a fix for https://llvm.org/bugs/show_bug.cgi?id=22796. The previous implementation of ClassInfo::operator< allowed cycles of classes such that x < y < z < x, meaning that a list of them cannot be correctly sorted, and the sort order could differ with different standard libraries. The original implementation sorted classes by ValueName if they were otherwise equal. This isn't strictly necessary, but some backends seem to accidentally rely on it. If I reverse this comparison I get 8 test failures spread across the AArch64, Mips and X86 backends, so I have left it in until those backends can be fixed. There was one case in the X86 backend where the observable behaviour of the assembler is changed by this patch. This was because some of the memory asm operands were not marked as children of X86MemAsmOperand. Differential Revision: http://reviews.llvm.org/D16141 llvm-svn: 258677
* [TableGen] Replace instructions() with getInstructionsByEnumValue(). No need ↵Craig Topper2016-01-171-1/+1
| | | | | | to make an iterator_range when we already have a function that returns an ArrayRef. NFC llvm-svn: 258019
* [TableGen] Replace a logically negated xor of bools with just an equality ↵Craig Topper2016-01-031-1/+1
| | | | | | comparison for readability. NFC llvm-svn: 256699
* [TableGen] Use std::find_if and a lambda instead of manual loops.Craig Topper2016-01-031-9/+10
| | | | llvm-svn: 256698
* [TableGen] Fix a bug introduced in r256627. If the switch was not emitted we ↵Craig Topper2016-01-031-2/+3
| | | | | | still emitted a closing curly brace. llvm-svn: 256697
* [TableGen] Use range-based for loops. NFCCraig Topper2016-01-031-20/+13
| | | | llvm-svn: 256696
* [TableGen] Modify the AsmMatcherEmitter to only apply the table growth from ↵Craig Topper2015-12-311-63/+110
| | | | | | | | | | | | | | r252440 to the Hexagon target. This restores the previous behavior of not including the mnemonic in the classes table for every target that starts instruction lines with the mnemonic. Not only did the table size increase by 1 entry, but the class enum increased in size which caused every class in the array to increase in size. It also grew the size of the function that parsers tokens into classes by a substantial amount. This adds a new HasMnemonicFirst flag to all AsmParsers. It's set to 1 by default and Hexagon target overrides it to 0. For the X86 target alone this recovers 324KB of size on the llvm-mc executable. I believe the current state is still a bad design choice for the Hexagon target as it causes most of the parsing to do a linear search through the entire match table to comparing operands against every instruction until it finds one that works. At least for the other targets we do a binary search based on mnemonic over which to do the linear scan. llvm-svn: 256669
* [TableGen] Use range-based for loops. NFCCraig Topper2015-12-311-8/+3
| | | | llvm-svn: 256668
* [TableGen] Move determination of IsIsolatedToken into the tokenizer instead ↵Craig Topper2015-12-311-31/+33
| | | | | | of trying to search characters around the token. No functional change intended. Verified for in-tree targets. llvm-svn: 256660
* [TableGen] Remove unnecessary conversion from StringRef to std::string when ↵Craig Topper2015-12-301-2/+2
| | | | | | outputting to a raw_ostream. NFC llvm-svn: 256628
* [TableGen] Remove raw_string_ostream by just emitting the header for the ↵Craig Topper2015-12-301-20/+20
| | | | | | switch the first time we emit a case. If the header was never emitted just print the default at the end. NFC llvm-svn: 256627
* [TableGen] Use range-based for loops. NFCCraig Topper2015-12-301-4/+4
| | | | llvm-svn: 256626
* [TableGen] Move more things that come from variant into the AsmVariantInfo ↵Craig Topper2015-12-301-12/+12
| | | | | | class so we can reduce some parameters. NFC llvm-svn: 256625
* [TableGen] Use 'size_t' instead of 'unsigned' to better match the argument ↵Craig Topper2015-12-301-5/+5
| | | | | | types of addAsmOperand. Simplify some code by using StringRef::find instead of std::find. These were previously done in r247527 and r247528, but another commit seems to have erased them. NFC llvm-svn: 256624
* De-virtualize mnemonicIsValid and remove from the base class. It's not ↵Craig Topper2015-12-291-1/+1
| | | | | | called by any common code. llvm-svn: 256544
* [TableGen] Add missing space to output.Craig Topper2015-12-291-1/+1
| | | | llvm-svn: 256540
* [TableGen] Use range-based for loops. NFCCraig Topper2015-12-291-10/+5
| | | | llvm-svn: 256539
* Default SetVector to use a DenseSet.Rafael Espindola2015-11-181-3/+3
| | | | | | | | | | | | | | | We use to have an odd difference among MapVector and SetVector. The map used a DenseMop, but the set used a SmallSet, which in turn uses a std::set. I have changed SetVector to use a DenseSet. If you were depending on the old behaviour you can pass an explicit set type or use SmallSetVector. The common cases for needing to do it are: * Optimizing for small sets. * Sets for types not supported by DenseSet. llvm-svn: 253439
* [MCTargetAsmParser] Move the member varialbes that referenceAkira Hatanaka2015-11-141-1/+1
| | | | | | | | | | MCSubtargetInfo in the subclasses into MCTargetAsmParser and define a member function getSTI. This is done in preparation for making changes to shrink the size of MCRelaxableFragment. (see http://reviews.llvm.org/D14346). llvm-svn: 253124
* [AsmParser] Generalize matching for grammars without mnemonic-lead statementsColin LeMahieu2015-11-091-35/+31
| | | | | | Differential Revision: http://reviews.llvm.org/D14257 llvm-svn: 252440
* [AsmParser] Backends can parameterize ASM tokenization.Colin LeMahieu2015-11-091-47/+68
| | | | llvm-svn: 252439
* [TableGen] Use range-based for loops and make a helper function static. NFCCraig Topper2015-09-131-46/+39
| | | | llvm-svn: 247529
* [TableGen] Simplify some code by using StringRef::find instead of std::find. NFCCraig Topper2015-09-131-3/+3
| | | | llvm-svn: 247528
* [TableGen] Use 'size_t' instead of 'unsigned' to better match the argument ↵Craig Topper2015-09-131-2/+2
| | | | | | types of addAsmOperand. NFC llvm-svn: 247527
* [TableGen] Use make_unique. NFC.Craig Topper2015-09-061-3/+3
| | | | llvm-svn: 246936
* [TableGen] Use range-based for loop.Craig Topper2015-08-161-4/+2
| | | | llvm-svn: 245191
* [TableGen] Move the ConversionRow vector into the ConversionTable instead of ↵Craig Topper2015-08-161-1/+1
| | | | | | copying. llvm-svn: 245190
* [TableGen] NFC improving comments about what the tokenized identifiers will ↵Colin LeMahieu2015-08-101-1/+2
| | | | | | contain. llvm-svn: 244493
* -Wdeprecated-clean: Fix cases of violating the rule of 5 in ways that are ↵David Blaikie2015-08-011-0/+14
| | | | | | deprecated in C++11 llvm-svn: 243816
* Reverting r241058 because it's causing buildbot failures.Ranjeet Singh2015-06-301-30/+26
| | | | llvm-svn: 241061
* There are a few places where subtarget features are stillRanjeet Singh2015-06-301-26/+30
| | | | | | | | | represented by uint64_t, this patch replaces these usages with the FeatureBitset (std::bitset) type. Differential Revision: http://reviews.llvm.org/D10542 llvm-svn: 241058
* [TableGen] Use range-based for loops. NFC.Craig Topper2015-06-021-2/+2
| | | | llvm-svn: 238805
* Replace push_back(Constructor(foo)) with emplace_back(foo) for non-trivial typesBenjamin Kramer2015-05-291-6/+4
| | | | | | | | | | | | | | | | | | | | If the type isn't trivially moveable emplace can skip a potentially expensive move. It also saves a couple of characters. Call sites were found with the ASTMatcher + some semi-automated cleanup. memberCallExpr( argumentCountIs(1), callee(methodDecl(hasName("push_back"))), on(hasType(recordDecl(has(namedDecl(hasName("emplace_back")))))), hasArgument(0, bindTemporaryExpr( hasType(recordDecl(hasNonTrivialDestructor())), has(constructExpr()))), unless(isInTemplateInstantiation())) No functional change intended. llvm-svn: 238602
* [TableGen][AsmMatcherEmitter] Only parse isolated tokens as registers.Ahmed Bougacha2015-05-291-4/+22
| | | | | | | | | | | | | | Fixes PR23455, where, when TableGen generates the matcher from the AsmString, it splits "cmp${cc}ss" into tokens, and the "ss" suffix is recognized as the SS register. I can't think of a situation where that's a feature, not a bug, hence: when a token is "isolated", i.e., it is followed and preceded by separators, it shouldn't be parsed as a register. Differential Revision: http://reviews.llvm.org/D9844 llvm-svn: 238536
* [TableGen][AsmMatcherEmitter] Factor out AsmOperand creation. NFC.Ahmed Bougacha2015-05-291-8/+15
| | | | llvm-svn: 238534
* AsmMatcherEmitter: Add an option to override custom converters for InstAliasTom Stellard2015-05-261-3/+12
| | | | | | | | | | | | | | | | | If there is an InstAlias defined for an instruction that had a custom converter (AsmMatchConverter), then when the alias is matched, the custom converter will be used rather than the converter generated by the InstAlias. This patch adds the UseInstAsmMatchConverter field to the InstAlias class, which allows you to override this behavior and force the converter generated by the InstAlias to be used. This is required for some future improvemnts to the R600 assembler. Differential Revision: http://reviews.llvm.org/D9083 llvm-svn: 238210
* Use std::bitset for SubtargetFeatures.Michael Kuperstein2015-05-261-7/+5
| | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first several times this was committed (e.g. r229831, r233055), it caused several buildbot failures. Apparently the reason for most failures was both clang and gcc's inability to deal with large numbers (> 10K) of bitset constructor calls in tablegen-generated initializers of instruction info tables. This should now be fixed. llvm-svn: 238192
* MC: Modernize MCOperand API naming. NFC.Jim Grosbach2015-05-131-2/+2
| | | | | | MCOperand::Create*() methods renamed to MCOperand::create*(). llvm-svn: 237275
* Reverting r237234, "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-05-131-5/+7
| | | | | | | The buildbots are still not satisfied. MIPS and ARM are failing (even though at least MIPS was expected to pass). llvm-svn: 237245
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-05-131-7/+5
| | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first two times this was committed (r229831, r233055), it caused several buildbot failures. At least some of the ARM and MIPS ones were due to gcc/binutils issues, and should now be fixed. llvm-svn: 237234
* Revert "Use std::bitset for SubtargetFeatures"Michael Kuperstein2015-03-241-5/+7
| | | | | | | | This reverts commit r233055. It still causes buildbot failures (gcc running out of memory on several platforms, and a self-host failure on arm), although less than the previous time. llvm-svn: 233068
* Use std::bitset for SubtargetFeaturesMichael Kuperstein2015-03-241-7/+5
| | | | | | | | | | | | | Previously, subtarget features were a bitfield with the underlying type being uint64_t. Since several targets (X86 and ARM, in particular) have hit or were very close to hitting this bound, switching the features to use a bitset. No functional change. The first time this was committed (r229831), it caused several buildbot failures. At least some of the ARM ones were due to gcc/binutils issues, and should now be fixed. Differential Revision: http://reviews.llvm.org/D8542 llvm-svn: 233055
* TableGen: Initialize ErrorInfo to ~0ULL in the MatchInstructionImplTom Stellard2015-03-051-1/+1
| | | | | | | | This is what all the targets check for and is consistent with the initialized value of MissingFeatures, which is sometimes assinged to ErrorInfo. llvm-svn: 231397
* Add a FIXME for PR22796, broken ordering of ClassInfo in TableGenDavid Blaikie2015-03-041-0/+5
| | | | | | As discussed (at length) in code review of r222935, with Duncan. llvm-svn: 231282
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