| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | [llvm-exegesis] Provide a way to handle memory instructions. | Guillaume Chatelet | 2018-08-01 | 1 | -2/+4 |
| | | | | | | | | | | | | | | | | | | Summary: And implement memory instructions on X86. This fixes PR36906. Reviewers: gchatelet Reviewed By: gchatelet Subscribers: lebedev.ri, filcab, mgorny, tschuett, RKSimon, llvm-commits Differential Revision: https://reviews.llvm.org/D48935 llvm-svn: 338567 | ||||
| * | [llvm-exegesis] Disable failing ARM assembler tests. | Clement Courbet | 2018-05-17 | 1 | -2/+2 |
| | | | | | llvm-svn: 332604 | ||||
| * | reland r332579: [llvm-exegesis] Update to cover latency through another opcode. | Clement Courbet | 2018-05-17 | 1 | -0/+48 |
| Restructuring the code to measure latency and uops. The end goal is to have this program spawn another process to deal with SIGILL and other malformed programs. It is not yet the case in this redesign, it is still the main program that runs the code (and may crash). It now uses BitVector instead of Graph for performance reasons. https://reviews.llvm.org/D46821 (with fixed ARM tests) Authored by Guillaume Chatelet llvm-svn: 332592 | |||||
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index : bcm5719-llvm | |
| Project Ortega BCM5719 LLVM | Raptor Computing Systems |
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