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* Revert: [llvm-mca] Flush the output stream before we start the analysis of a ↵Andrea Di Biagio2018-06-131-1/+0
| | | | | | | | | new code region. NFC Not sure why, but it breaks buildbot clang-cmake-armv8-full. It causes a failure in TEST 'Xray-armhf-linux :: TestCases/Posix/profiling-single-threaded.cc'. llvm-svn: 334617
* [llvm-mca] Flush the output stream before we start the analysis of a new ↵Andrea Di Biagio2018-06-131-0/+1
| | | | | | code region. NFC llvm-svn: 334610
* [llvm-mca] Print the "Block RThroughput" in the SummaryView.Andrea Di Biagio2018-05-231-1/+1
| | | | | | | | | | | | | | | | | | | This patch implements the "block reciprocal throughput" computation in the SummaryView. The block reciprocal throughput is computed as the MAX of: - NumMicroOps / DispatchWidth - Resource Cycles / #Units (for every resource consumed). The block throughput is bounded from above by the hardware dispatch throughput. That is because the DispatchWidth is an upper bound on how many opcodes can be part of a single dispatch group. The block throughput is also limited by the amount of hardware parallelism. The number of available resource units affects how the resource pressure is distributed, and also how many blocks can be delivered every cycle. llvm-svn: 333095
* [llvm-mca] Hide unrelated flags from the -help output.Andrea Di Biagio2018-05-171-23/+35
| | | | llvm-svn: 332615
* [llvm-mca] add flag -all-views and flag -all-stats.Andrea Di Biagio2018-05-171-0/+38
| | | | | | | Flag -all-views enables all the views. Flag -all-stats enables all the views that print hardware statistics. llvm-svn: 332602
* [llvm-mca] Introduce a pipeline Stage class and FetchStage.Matt Davis2018-05-151-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is just an idea, really two ideas. I expect some push-back, but I realize that posting a diff is the most comprehensive way to express these concepts. This patch introduces a Stage class which represents the various stages of an instruction pipeline. As a start, I have created a simple FetchStage that is based on existing logic for how MCA produces instructions, but now encapsulated in a Stage. The idea should become more concrete once we introduce additional stages. The idea being, that when a stage completes, the next stage in the pipeline will be executed. Stages are chained together as a singly linked list to closely model a real pipeline. For now there is only one stage, so the stage-to-stage flow of instructions isn't immediately obvious. Eventually, Stage will also handle event notifications, but that functionality is not complete, and not destined for this patch. Ideally, an interested party can register for notifications from a particular stage. Callbacks will be issued to these listeners at various points in the execution of the stage. For now, eventing functionality remains similar to what it has been in mca::Backend. We will be building-up the Stage class as we move on, such as adding debug output. This patch also removes the unique_ptr<Instruction> return value from InstrBuilder::createInstruction. An Instruction pointer is still produced, but now it's up to the caller to decide how that item should be managed post-allocation (e.g., smart pointer). This allows the Fetch stage to create instructions and manage the lifetime of those instructions as it wishes, and not have to be bound to any specific managed pointer type. Other callers of createInstruction might have different requirements, and thus can manage the pointer to fit their needs. Another idea would be to push the ownership to the RCU. Currently, the FetchStage will wrap the Instruction pointer in a shared_ptr. This allows us to remove the Instruction container in Backend, which was probably going to disappear, or move, at some point anyways. Note that I did run these changes through valgrind, to make sure we are not leaking memory. While the shared_ptr comes with some additional overhead it relieves us from having to manage a list of generated instructions, and/or make lookup calls to remove the instructions. I realize that both the Stage class and the Instruction pointer management (mentioned directly above) are separate but related ideas, and probably should land as separate patches; I am happy to do that if either idea is decent. The main reason these two ideas are together is that Stage::execute() can mutate an InstRef. For the fetch stage, the InstRef is populated as the primary action of that stage (execute()). I didn't want to change the Stage interface to support the idea of generating an instruction. Ideally, instructions are to be pushed through the pipeline. I didn't want to draw too much of a specialization just for the fetch stage. Excuse the word-salad. Reviewers: andreadb, courbet, RKSimon Reviewed By: andreadb Subscribers: llvm-commits, mgorny, javed.absar, tschuett, gbedwell Differential Revision: https://reviews.llvm.org/D46741 llvm-svn: 332390
* [llvm-mca] removes flag -instruction-tables from the "View Options" category.Andrea Di Biagio2018-05-051-25/+15
| | | | | | | | This patch also improves the description of a couple of flags in the view options. With this change, the -help now specifies which views are enabled by default. llvm-svn: 331594
* [llvm-mca] use colors for warnings and notes generated by InstrBuilder.Andrea Di Biagio2018-05-041-2/+1
| | | | llvm-svn: 331517
* [llvm-mca] Support for in-order CPU for -instruction-tables testing.Andrea Di Biagio2018-04-301-1/+1
| | | | | | | | | Added Intel Atom tests to verify that the tool correctly generates instruction tables even if the CPU is in-order. Fixes PR37282. llvm-svn: 331169
* [llvm-mca] Make ViewOptions static. NFCIFilipe Cabecinhas2018-04-251-1/+1
| | | | llvm-svn: 330829
* [llvm-mca] Add a new option category for views.Andrea Di Biagio2018-04-251-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | With this patch, options to add/tweak views are all grouped together in the -help output. The new "View Options" category looks like this: ``` View Options: -dispatch-stats - Print dispatch statistics -instruction-info - Print the instruction info view -instruction-tables - Print instruction tables -register-file-stats - Print register file statistics -resource-pressure - Print the resource pressure view -retire-stats - Print retire control unit statistics -scheduler-stats - Print scheduler statistics -timeline - Print the timeline view -timeline-max-cycles=<uint> - Maximum number of cycles in the timeline view. Defaults to 80 cycles -timeline-max-iterations=<uint> - Maximum number of iterations to print in timeline view ``` llvm-svn: 330816
* [llvm-mca] run clang-format on a bunch of files. NFCAndrea Di Biagio2018-04-251-11/+9
| | | | llvm-svn: 330811
* [llvm-mca] Default to the native host cpu if flag -mcpu is not specified.Andrea Di Biagio2018-04-251-2/+7
| | | | llvm-svn: 330809
* [llvm-mca] Remove unused flag -verbose. NFCAndrea Di Biagio2018-04-241-4/+0
| | | | | | I forgot to remove it at r329794. llvm-svn: 330757
* [llvm-mca] Default the output asm dialect used by the instruction printer to ↵Andrea Di Biagio2018-04-241-12/+16
| | | | | | | | | | | | | | | | the input asm dialect. The instruction printer used by llvm-mca to generate the performance report now defaults the output assembly format to the format used for the input assembly file. On x86, the asm format can be either AT&T or Intel, depending on the presence/absence of directive `.intel_syntax`. Users can still specify a different assembly dialect with the command line flag -output-asm-variant=<uint>. llvm-svn: 330733
* [llvm-mca] Use WithColor for printing errorsJonas Devlieghere2018-04-181-12/+15
| | | | | | | | Use convenience helpers in WithColor to print errors and notes. Differential revision: https://reviews.llvm.org/D45666 llvm-svn: 330267
* Define InitLLVM to do common initialization all at once.Rui Ueyama2018-04-131-5/+2
| | | | | | | | | | | We have a few functions that virtually all command wants to run on process startup/shutdown. This patch adds InitLLVM class to do that all at once, so that we don't need to copy-n-paste boilerplate code to each llvm command's main() function. Differential Revision: https://reviews.llvm.org/D45602 llvm-svn: 330046
* [llvm-mca] Minor code cleanup. NFCAndrea Di Biagio2018-04-111-1/+1
| | | | llvm-svn: 329796
* [llvm-mca] Renamed BackendStatistics to RetireControlUnitStatistics.Andrea Di Biagio2018-04-111-5/+10
| | | | | | Also, removed flag -verbose in favor of flag -retire-stats. llvm-svn: 329794
* [llvm-mca] Move the logic that prints scheduler statistics from ↵Andrea Di Biagio2018-04-111-0/+9
| | | | | | | | BackendStatistics to its own view. Added flag -scheduler-stats to print scheduler related statistics. llvm-svn: 329792
* [llvm-mca] Move the logic that prints dispatch unit statistics from ↵Andrea Di Biagio2018-04-101-0/+9
| | | | | | | | | | | BackendStatistics to its own view. This patch moves the logic that collects and analyzes dispatch events to the DispatchStatistics view. Added flag -dispatch-stats to print statistics related to the dispatch logic. llvm-svn: 329708
* [llvm-mca] Fix MCACommentConsumerFangrui Song2018-04-091-1/+1
| | | | llvm-svn: 329592
* [llvm-mca] Add the ability to mark regions of code for analysis (PR36875)Andrea Di Biagio2018-04-091-42/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch teaches llvm-mca how to parse code comments in search for special "markers" used to select regions of code. Example: # LLVM-MCA-BEGIN My Code Region .... # LLVM-MCA-END The MCAsmLexer now delegates to an object of class MCACommentParser (i.e. an AsmCommentConsumer) the parsing of code comments to search for begin/end code region markers. A comment starting with substring "LLVM-MCA-BEGIN" marks the beginning of a new region of code. A comment starting with substring "LLVM-MCA-END" marks the end of the last region. This implementation doesn't allow regions to overlap. Each region can have a optional description; internally, each region is identified by a range of source code locations (SMLoc). MCInst objects are added to a region R only if the source location for the MCInst is in the range of locations specified by R. By default, the tool allocates an implicit "Default" code region which contains every source location. See new tests llvm-mca-marker-*.s for a few examples. A new Backend object is created for every region. So, the analysis is conducted on every parsed code region. The final report is the union of the reports generated for every code region. Note that empty regions are skipped. Special "[#] Code Region - ..." strings are used in the report to mark the portion which is specific to a code region only. For example, see llvm-mca-markers-5.s. Differential Revision: https://reviews.llvm.org/D45433 llvm-svn: 329590
* [llvm-mca] Simplify code. NFCAndrea Di Biagio2018-04-081-33/+26
| | | | llvm-svn: 329532
* [llvm-mca] Remove flag -max-retire-per-cycle, and update the docs.Andrea Di Biagio2018-04-051-7/+2
| | | | | | | | This is done in preparation for D45259. With D45259, models can specify the size of the reorder buffer, and the retire throughput directly via tablegen. llvm-svn: 329274
* [llvm-mca] Move the logic that prints register file statistics to its own ↵Andrea Di Biagio2018-04-031-0/+9
| | | | | | | | | | | | | view. NFCI Before this patch, the "BackendStatistics" view was responsible for printing the register file usage (as well as many other statistics). Now users can enable register file usage statistics using the command line flag `-register-file-stats`. By default, the tool doesn't print register file statistics. llvm-svn: 329083
* [llvm-mca] Fix how views are added to the InstructionTables.Andrea Di Biagio2018-03-261-7/+6
| | | | | | | This should fix the stack-use-after-scope reported by the asan buildbots after revision 328493. llvm-svn: 328499
* [llvm-mca] Add a flag -instruction-info to enable/disable the instruction ↵Andrea Di Biagio2018-03-261-4/+14
| | | | | | info view. llvm-svn: 328493
* [llvm-mca] Add flag -instruction-tables to print the theoretical resource ↵Andrea Di Biagio2018-03-261-1/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pressure distribution for instructions (PR36874) The goal of this patch is to address most of PR36874. To fully fix PR36874 we need to split the "InstructionInfo" view from the "SummaryView". That would make easy to check the latency and rthroughput as well. The patch reuses all the logic from ResourcePressureView to print out the "instruction tables". We have an entry for every instruction in the input sequence. Each entry reports the theoretical resource pressure distribution. Resource pressure is uniformly distributed across all the processor resource units of a group. At the moment, the backend pipeline is not configurable, so the only way to fix this is by creating a different driver that simply sends instruction events to the resource pressure view. That means, we don't use the Backend interface. Instead, it is simpler to just have a different code-path for when flag -instruction-tables is specified. Once Clement addresses bug 36663, then we can port the "instruction tables" logic into a stage of our configurable pipeline. Updated the BtVer2 test cases (thanks Simon for the help). Now we pass flag -instruction-tables to each modified test. Differential Revision: https://reviews.llvm.org/D44839 llvm-svn: 328487
* [llvm-mca] run clang-format on all files.Andrea Di Biagio2018-03-241-1/+2
| | | | | | This also addresses Simon's review comment in D44839. llvm-svn: 328428
* [llvm-mca] Split the InstructionInfoView from the SummaryView.Andrea Di Biagio2018-03-231-1/+4
| | | | llvm-svn: 328358
* [llvm-mca] Pass the InstrBuilder to the constructor of Backend.Andrea Di Biagio2018-03-231-1/+5
| | | | | | | This is done in preparation for the fix for PR36784. No functional change. llvm-svn: 328306
* [llvm-mca] Add flag -resource-pressure to enable/disable printing of the ↵Andrea Di Biagio2018-03-231-1/+7
| | | | | | | | | resource pressure view. By default, the tool always enables the resource pressure view. This flag lets user specify whether they want to add that view or not. llvm-svn: 328305
* [llvm-mca] Simplify code. NFCAndrea Di Biagio2018-03-221-16/+7
| | | | llvm-svn: 328187
* [llvm-mca] Move the logic that computes the register file usage to the ↵Andrea Di Biagio2018-03-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | BackendStatistics view. With this patch, the "instruction dispatched" event now provides information related to the number of microarchitectural registers used in each register file. Similarly, the "instruction retired" event is now able to tell how may registers are freed in each register file. Currently, the BackendStatistics view is the only consumer of register usage/pressure information. BackendStatistics uses that info to print out a few general statistics (i.e. max number of mappings used; total mapping created). Before this patch, the BackendStatistics was forced to query the Backend to obtain the register pressure information. This helps removes that dependency. Now views are completely independent from the Backend. As a consequence, it should be easier to address PR36663 and further modularize the pipeline. Added a couple of test cases in the BtVer2 specific directory. llvm-svn: 328129
* [llvm-mca] Remove method getSchedModel() from the Backend.Andrea Di Biagio2018-03-161-1/+1
| | | | llvm-svn: 327756
* [llvm-mca] Remove the logic that computes the reciprocal throughput, and ↵Andrea Di Biagio2018-03-131-2/+2
| | | | | | | | | | | | | | | | | make the SummaryView independent from the Backend. NFCI Since r327420, the tool can query the MCSchedModel interface to obtain the reciprocal throughput information. As a consequence, method `ResourceManager::getRThroughput`, and method `Backend::getRThroughput` are no longer needed. This patch simplifies the code by removing the custom RThroughput computation. This patch also refactors class SummaryView by removing the dependency with the Backend object. No functional change intended. llvm-svn: 327425
* [llvm-mca] Views are now independent from resource masks. NFCIAndrea Di Biagio2018-03-101-2/+1
| | | | | | | | | This change removes method Backend::getProcResourceMasks() and simplifies some logic in the Views. This effectively removes yet another dependency between the views and the Backend. No functional change intended. llvm-svn: 327214
* [llvm-mca] Move the logic that prints the summary into its own view. NFCIAndrea Di Biagio2018-03-091-4/+6
| | | | llvm-svn: 327128
* [llvm-mca] Run clang-format on the source code. NFCAndrea Di Biagio2018-03-091-5/+4
| | | | llvm-svn: 327125
* [llvm-mca] Unify the API for the various views. NFCIAndrea Di Biagio2018-03-081-13/+59
| | | | | | | | | | | | | | | This allows the customization of the performance report. Users can specify their own custom sequence of views. Each view contributes a portion of the performance report generated by the BackendPrinter. Internally, class BackendPrinter keeps a sequence of views; views are printed out in sequence when method 'printReport()' is called. This patch addresses one of the two review comments from Clement in D43951. llvm-svn: 327018
* [llvm-mca] LLVM Machine Code Analyzer.Andrea Di Biagio2018-03-081-0/+307
llvm-mca is an LLVM based performance analysis tool that can be used to statically measure the performance of code, and to help triage potential problems with target scheduling models. llvm-mca uses information which is already available in LLVM (e.g. scheduling models) to statically measure the performance of machine code in a specific cpu. Performance is measured in terms of throughput as well as processor resource consumption. The tool currently works for processors with an out-of-order backend, for which there is a scheduling model available in LLVM. The main goal of this tool is not just to predict the performance of the code when run on the target, but also help with diagnosing potential performance issues. Given an assembly code sequence, llvm-mca estimates the IPC (instructions per cycle), as well as hardware resources pressure. The analysis and reporting style were mostly inspired by the IACA tool from Intel. This patch is related to the RFC on llvm-dev visible at this link: http://lists.llvm.org/pipermail/llvm-dev/2018-March/121490.html Differential Revision: https://reviews.llvm.org/D43951 llvm-svn: 326998
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