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* [llvm-mca] Correctly set the ReadAdvance information for register use operands.Andrea Di Biagio2018-03-291-22/+52
| | | | | | | | | | | | The tool was passing the wrong operand index to method MCSubtargetInfo::getReadAdvanceCycles(). That method requires a "UseIdx", and not the operand index. This was found when testing X86 code where instructions had a memory folded operand. This patch fixes the issue and adds test read-advance-1.s to ensure that the ReadAfterLd (a ReadAdvance of 3cy) information is correctly used. llvm-svn: 328790
* [llvm-mca] Make the resource cost a double.Andrea Di Biagio2018-03-231-5/+6
| | | | | | | | This is done in preparation for the fix for PR36874. The number of cycles consumed for each pipe is now a double quantity. This allows reuse of the resource pressure view to print out instruction tables. llvm-svn: 328335
* [llvm-mca] Minor refactoring. NFCIAndrea Di Biagio2018-03-221-10/+3
| | | | | | Also, removed a couple of unused methods from class Instruction. llvm-svn: 328198
* [llvm-mca] Simplify (and better standardize) the Instruction interface.Andrea Di Biagio2018-03-221-4/+3
| | | | llvm-svn: 328190
* [llvm-mca] Simplify code. NFCAndrea Di Biagio2018-03-221-5/+7
| | | | llvm-svn: 328187
* [llvm-mca] Remove const from a bunch of ArrayRef. NFCAndrea Di Biagio2018-03-201-4/+4
| | | | llvm-svn: 328018
* [llvm-mca] Move the logic that computes the scheduler's queue usage to the ↵Andrea Di Biagio2018-03-201-15/+39
| | | | | | | | | | | | | | | | | | | | | | BackendStatistics view. This patch introduces two new callbacks in the event listener interface to handle the "buffered resource reserved" event and the "buffered resource released" event. Every time a buffered resource is used, an event is generated. Before this patch, the Scheduler (with the help of the ResourceManager) was responsible for tracking the scheduler's queue usage. However, that design forced the Scheduler to 'publish' scheduler's queue pressure information through the Backend interface. The goal of this patch is to break the dependency between the BackendStatistics view, and the Backend. Now the Scheduler knows how to notify "buffer reserved/released" events. The scheduler's queue usage analysis has been moved to the BackendStatistics. Differential Revision: https://reviews.llvm.org/D44686 llvm-svn: 328011
* [llvm-mca] Move the routine that computes processor resource masks to its ↵Andrea Di Biagio2018-03-201-31/+8
| | | | | | | | | | | | | | | | | | own file. Function computeProcResourceMasks is used by the ResourceManager (owned by the Scheduler) to compute resource masks for processor resources. Before this refactoring, there was an implicit dependency between the Scheduler and the InstrBuilder. That is because InstrBuilder has to know about resource masks when computing the set of processor resources consumed by a new instruction. With this patch, the functionality that computes resource masks has been extracted from the ResourceManager, and moved to a separate file (Support.h). This helps removing the dependency between the Scheduler and the InstrBuilder. No functional change intended. llvm-svn: 327973
* [llvm-mca] Simplify code. NFCAndrea Di Biagio2018-03-191-26/+40
| | | | llvm-svn: 327886
* [llvm-mca] Remove the logic that computes the reciprocal throughput, and ↵Andrea Di Biagio2018-03-131-20/+0
| | | | | | | | | | | | | | | | | make the SummaryView independent from the Backend. NFCI Since r327420, the tool can query the MCSchedModel interface to obtain the reciprocal throughput information. As a consequence, method `ResourceManager::getRThroughput`, and method `Backend::getRThroughput` are no longer needed. This patch simplifies the code by removing the custom RThroughput computation. This patch also refactors class SummaryView by removing the dependency with the Backend object. No functional change intended. llvm-svn: 327425
* [llvm-mca] Use a const ArrayRef in a few places. NFCAndrea Di Biagio2018-03-131-8/+8
| | | | llvm-svn: 327396
* [llvm-mca] Refactor event listeners to make the backend agnostic to event types.Clement Courbet2018-03-131-3/+18
| | | | | | | | | | Summary: This is a first step towards making the pipeline configurable. Subscribers: llvm-commits, andreadb Differential Revision: https://reviews.llvm.org/D44309 llvm-svn: 327389
* [llvm-mca] Views are now independent from resource masks. NFCIAndrea Di Biagio2018-03-101-1/+5
| | | | | | | | | This change removes method Backend::getProcResourceMasks() and simplifies some logic in the Views. This effectively removes yet another dependency between the views and the Backend. No functional change intended. llvm-svn: 327214
* [llvm-mca] Fix handling of zero-latency instructions.Andrea Di Biagio2018-03-081-0/+1
| | | | | | | | | | | | | | | | | | | | This patch fixes a problem found when testing zero latency instructions on target AArch64 -mcpu=exynos-m3 / -mcpu=exynos-m1. On Exynos-m3/m1, direct branches are zero-latency instructions that don't consume any processor resources. The DispatchUnit marks zero-latency instructions as "executed", so that no scheduling is required. The event of instruction executed is then notified to all the listeners, and the reorder buffer (managed by the RetireControlUnit) is updated. In particular, the entry associated to the zero-latency instruction in the reorder buffer is marked as executed. Before this patch, the DispatchUnit forgot to assign a retire control unit token (RCUToken) to the zero-latency instruction. As a consequence, the RCUToken was used uninitialized. This was causing a crash in the RetireControlUnit logic. Fixes PR36650. llvm-svn: 327056
* [llvm-mca] LLVM Machine Code Analyzer.Andrea Di Biagio2018-03-081-0/+458
llvm-mca is an LLVM based performance analysis tool that can be used to statically measure the performance of code, and to help triage potential problems with target scheduling models. llvm-mca uses information which is already available in LLVM (e.g. scheduling models) to statically measure the performance of machine code in a specific cpu. Performance is measured in terms of throughput as well as processor resource consumption. The tool currently works for processors with an out-of-order backend, for which there is a scheduling model available in LLVM. The main goal of this tool is not just to predict the performance of the code when run on the target, but also help with diagnosing potential performance issues. Given an assembly code sequence, llvm-mca estimates the IPC (instructions per cycle), as well as hardware resources pressure. The analysis and reporting style were mostly inspired by the IACA tool from Intel. This patch is related to the RFC on llvm-dev visible at this link: http://lists.llvm.org/pipermail/llvm-dev/2018-March/121490.html Differential Revision: https://reviews.llvm.org/D43951 llvm-svn: 326998
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