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* Fix GCMetadaPrinter::finishAssembly not executed, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-191-0/+31
| | | | | | | | | | | Due to the execution order of doFinalization functions, the GC information were deleted before AsmPrinter::doFinalization was executed. Thus, the GCMetadataPrinter::finishAssembly was never called. The patch fixes that by moving the code of the GCInfoDeleter::doFinalization to Printer::doFinalization. llvm-svn: 175528
* ARM NEON: Merge a f32 bitcast of a v2i32 extracteltArnold Schwaighofer2013-02-191-0/+25
| | | | | | | | | | | | | | A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers. The patch fixes this by using a COPY_TO_REGCLASS and a EXTRACT_SUBREG to extract the element from the vector instead. radar://13191881 llvm-svn: 175520
* [asan] instrument memory accesses with unusual sizesKostya Serebryany2013-02-191-1/+31
| | | | | | | | | | | | | | | | | This patch makes asan instrument memory accesses with unusual sizes (e.g. 5 bytes or 10 bytes), e.g. long double or packed structures. Instrumentation is done with two 1-byte checks (first and last bytes) and if the error is found __asan_report_load_n(addr, real_size) or __asan_report_store_n(addr, real_size) is called. Also, call these two new functions in memset/memcpy instrumentation. asan-rt part will follow. llvm-svn: 175507
* Expand pseudos/macros BteqzT8SltiX16, BteqzT8SltiuX16,Reed Kotler2013-02-192-0/+184
| | | | | | BtnezT8SltiX16, BtnezT8SltiuX16 . llvm-svn: 175486
* Temporarily revert r175470 for more review.Bill Wendling2013-02-191-23/+0
| | | | llvm-svn: 175476
* Expand pseudos BteqzT8CmpiX16 and BtnezT8CmpiX16.Reed Kotler2013-02-192-0/+198
| | | | llvm-svn: 175474
* Check to see if the 'no-builtin' attribute is set before simplifying a ↵Bill Wendling2013-02-181-0/+23
| | | | | | library call. llvm-svn: 175470
* Comment out the rdar number.Chad Rosier2013-02-181-1/+1
| | | | llvm-svn: 175460
* [fast-isel] Remove an invalid assert.Chad Rosier2013-02-181-0/+7
| | | | | | | | If the memcpy has an odd length with an alignment of 2, this would incorrectly assert on the last 1 byte copy. rdar://13202135 llvm-svn: 175459
* Support for HiPE-compatible code emission, patch by Yiannis Tsiouris.Benjamin Kramer2013-02-181-0/+67
| | | | llvm-svn: 175457
* R600/SI: Use MULADD_IEEE/V_MAD_F32 instruction for mad patternVincent Lejeune2013-02-181-0/+19
| | | | llvm-svn: 175446
* [asan] revert r175266 as it breaks code with packed structures. supporting ↵Kostya Serebryany2013-02-181-1/+1
| | | | | | long double will require a more general solution llvm-svn: 175442
* AArch64: adjust tests which rely on a default JITTim Northover2013-02-183-2/+14
| | | | | | | | | | | | | Profiling tests *do* need a JIT. They'll pass if a cross-compiler targetting AArch64 by default has been built, but fail if a native AArch64 compiler has been build. Therefore XFAIL is inappropriate and we mark them unsupported. ExecutionEngine tests are JIT by definition, they should also be unsupported. Transforms/LICM only uses the interpreter to check the output is still sane after optimisation. It can be switched to use an interpreter. llvm-svn: 175433
* Expand macro/pseudo instructions BtnezT8SltX16 and BtnezT8SltuX16.Reed Kotler2013-02-181-0/+96
| | | | llvm-svn: 175420
* Expand pseudo/macro BteqzT8SltX16.Reed Kotler2013-02-181-0/+98
| | | | llvm-svn: 175417
* Expand macro/pseudo BteqzT8CmpX16.Reed Kotler2013-02-181-0/+96
| | | | llvm-svn: 175416
* Beginning of expanding all current mips16 macro/pseudo instruction sequences.Reed Kotler2013-02-181-0/+95
| | | | | | | | | | This expansion will be moved to expandISelPseudos as soon as I can figure out how to do that. There are other instructions which use this ExpandFEXT_T8I816_ins and as soon as I have finished expanding them all, I will delete the macro asm string text so it has no way to be used in the future. llvm-svn: 175413
* [XCore] Add missing 2r instructions.Richard Osborne2013-02-171-0/+9
| | | | | | | These instructions are not targeted by the compiler but it is needed for the MC layer. llvm-svn: 175407
* [XCore] Add TSETR instruction.Richard Osborne2013-02-171-0/+3
| | | | | | | This instruction is not targeted by the compiler but it is needed for the MC layer. llvm-svn: 175406
* [XCore] Add missing u10 / lu10 instructions.Richard Osborne2013-02-171-0/+12
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 175404
* [XCore] Add missing u6 / lu6 instructions.Richard Osborne2013-02-171-0/+36
| | | | | | | These instructions are not targeted by the compiler but they are needed for the MC layer. llvm-svn: 175403
* Force a cpu for test. It failed on atom due to different scheduling decisions.Benjamin Kramer2013-02-171-1/+1
| | | | llvm-svn: 175401
* BBVectorize: Fix an invalid reference bugHal Finkel2013-02-171-0/+98
| | | | | | | | | | | | | | This fixes PR15289. This bug was introduced (recently) in r175215; collecting all std::vector references for candidate pairs to delete at once is invalid because subsequent lookups in the owning DenseMap could invalidate the references. bugpoint was able to reduce a useful test case. Unfortunately, because whether or not this asserts depends on memory layout, this test case will sometimes appear to produce valid output. Nevertheless, running under valgrind will reveal the error. llvm-svn: 175397
* The transform is:Bill Wendling2013-02-162-23/+12
| | | | | | | | | | | | | | | (or (bool?A:B),(bool?C:D)) --> (bool?(or A,C):(or B,D)) By the time the OR is visited, both the SELECTs have been visited and not optimized and the OR itself hasn't been transformed so we do this transform in the hopes that the new ORs will be optimized. The transform is explicitly disabled for vector-selects until "codegen matures to handle them better". Patch by Muhammad Tauqir! llvm-svn: 175380
* MCParser: Reject .balign with non-pow2 alignments.Benjamin Kramer2013-02-161-0/+10
| | | | | | | | GNU as rejects them and there are configure scripts in the wild that check if the assembler rejects ".align 3" to determine whether the alignment is in bytes or powers of two. llvm-svn: 175360
* Replace "check:" wth "CHECK:".Jakub Staszak2013-02-161-4/+4
| | | | | | Also fix one test by changing "vpermilps" to "vpshufd". llvm-svn: 175357
* Reinitialize the ivars in the subtarget so that they can be reset with the ↵Bill Wendling2013-02-161-1/+0
| | | | | | new features. llvm-svn: 175336
* [ms-inline asm] Do not omit the frame pointer if we have ms-inline assembly.Chad Rosier2013-02-161-2/+8
| | | | | | | | | | | If the frame pointer is omitted, and any stack changes occur in the inline assembly, e.g.: "pusha", then any C local variable or C argument references will be incorrect. I pass no judgement on anyone who would do such a thing. ;) rdar://13218191 llvm-svn: 175334
* Derive ELF section type from the name in some cases where GNU as doesJoerg Sonnenberger2013-02-161-0/+62
| | | | | | so. llvm-svn: 175327
* Temporary revert of 175320.Bill Wendling2013-02-151-0/+1
| | | | llvm-svn: 175322
* Reinitialize the ivars in the subtarget.Bill Wendling2013-02-151-0/+66
| | | | | | | When we're recalculating the feature set of the subtarget, we need to have the ivars in their initial state. llvm-svn: 175320
* If bundle alignment is enabled, do not add data to a fragment with instructionsDerek Schuff2013-02-151-2/+13
| | | | | | | | | | | | With bundle alignment, instructions all get their own MCFragments (unless they are in a bundle-locked group). For instructions with fixups, this is an MCDataFragment. Emitting actual data (e.g. for .long) attempts to re-use MCDataFragments, which we don't want int this case since it leads to fragments which exceed the bundle size. So, don't reuse them in this case. Also adds a test and fixes some formatting. llvm-svn: 175316
* Forgot to 'svn add' the LoopVectorizer tests for the new parallel loop ↵Pekka Jaaskelainen2013-02-152-0/+166
| | | | | | metadata, sorry. llvm-svn: 175311
* enable SDISel sincos optimization for GNU environmentsPaul Redmond2013-02-151-14/+40
| | | | | | | | | | | | - add sincos to runtime library if target triple environment is GNU - added canCombineSinCosLibcall() which checks that sincos is in the RTL and if the environment is GNU then unsafe fpmath is enabled (required to preserve errno) - extended sincos-opt lit test Reviewed by: Hal Finkel llvm-svn: 175283
* Teach InstCombine to work with smaller legal types in icmp (shl %v, C1), C2Arnaud A. de Grandmaison2013-02-152-3/+42
| | | | | | | | | It enables to work with a smaller constant, which is target friendly for those which can compare to immediates. It also avoids inserting a shift in favor of a trunc, which can be free on some targets. This used to work until LLVM-3.1, but regressed with the 3.2 release. llvm-svn: 175270
* [asan] support long double on 64-bit. See ↵Kostya Serebryany2013-02-151-0/+9
| | | | | | https://code.google.com/p/address-sanitizer/issues/detail?id=151 llvm-svn: 175266
* AArch64: remove ConstantIsland pass & put literals in separate section.Tim Northover2013-02-159-31/+38
| | | | | | | | This implements the review suggestion to simplify the AArch64 backend. If we later discover that we *really* need the extra complexity of the ConstantIslands pass for performance reasons it can be resurrected. llvm-svn: 175258
* AArch64: refactor frame handling to use movz/movk for overlarge offsets.Tim Northover2013-02-151-18/+15
| | | | | | | | In the near future litpools will be in a different section, which means that any access to them is at least two instructions. This makes the case for a movz/movk pair (if total offset <= 32-bits) even more compelling. llvm-svn: 175257
* Simplify the 'operator<' for the attribute object.Bill Wendling2013-02-151-2/+2
| | | | llvm-svn: 175252
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
| | | | | | This reverts commit 58f20a3cbfca7384fe5e25e095f18572736a4792. llvm-svn: 175249
* Revert "Fix testcase for attribute ordering."Anna Zaks2013-02-151-1/+1
| | | | | | This reverts commit 997c6516ca161073a1d516ebca7c0ca7722f64e2. llvm-svn: 175248
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
| | | | llvm-svn: 175238
* Fix minor mips16 issues in directives for function prologue. Probably this doesReed Kotler2013-02-151-4/+20
| | | | | | | not matter but makes it more gcc compatible which avoids possible subtle problems. Also, turned back on a disabled check in helloworld.ll. llvm-svn: 175237
* Fix testcase for attribute ordering.Bill Wendling2013-02-151-1/+1
| | | | llvm-svn: 175236
* The ARM NEON vector compare instructions take three arguments. However, the Joel Jones2013-02-141-1/+67
| | | | | | | | | | | | | | assembler should also accept a two arg form, as the docuemntation specifies that the first (destination) register is optional. This patch uses TwoOperandAliasConstraint to add the two argument form. It also fixes an 80-column formatting problem in: test/MC/ARM/neon-bitwise-encoding <rdar://problem/12909419> Clang rejects ARM NEON assembly instructions llvm-svn: 175221
* death to extra whitespaceKay Tiong Khoo2013-02-141-20/+20
| | | | llvm-svn: 175200
* added basic support for Intel ADX instructionsKay Tiong Khoo2013-02-142-0/+36
| | | | | | -feature flag, instructions definitions, test cases llvm-svn: 175196
* Dont merge consecutive loads/stores into vectors when noimplicitfloat is used.Nadav Rotem2013-02-141-0/+34
| | | | llvm-svn: 175190
* Re-apply r175088 for bug fix 13622: Add paired register support forWeiming Zhao2013-02-142-2/+55
| | | | | | | | inline asm with 64-bit data on ARM Update test case to use -mtriple=arm-linux-gnueabi llvm-svn: 175186
* R600: Do not fold single instruction with more that 3 kcache readVincent Lejeune2013-02-141-0/+52
| | | | | | | | | It fixes around 100 tfb piglit tests and 16 glean tests. NOTE: This is a candidate for the Mesa stable branch. Reviewed-by: Tom Stellard <thomas.stellard at amd.com> llvm-svn: 175183
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