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* Debug Info: instead of calling addToContextOwner which constructs the contextManman Ren2013-10-2912-47/+49
| | | | | | | | | | | | after the DIE creation, we construct the context first. This touches creation of namespaces and global variables. The purpose is to handle all DIE creations similarly: constructs the context first, then creates the DIE and immediately adds the DIE to its parent. We use createAndAddDIE to wrap around "new DIE(". llvm-svn: 193589
* Add llvm/test/Transforms/SLPVectorizer/ARM/lit.local.cfg. Tests there ↵NAKAMURA Takumi2013-10-291-0/+3
| | | | | | require ARM in targets. llvm-svn: 193580
* Fix "existant" typosAlp Toker2013-10-292-3/+3
| | | | llvm-svn: 193579
* ARM cost model: Unaligned vectorized double stores are expensiveArnold Schwaighofer2013-10-292-9/+29
| | | | | | | | | Updated a test case that assumed that <2 x double> would vectorize to use <4 x float>. radar://15338229 llvm-svn: 193574
* ARM cost model: Account for zero cost scalar SROA instructionsArnold Schwaighofer2013-10-291-0/+52
| | | | | | | | | By vectorizing a series of srl, or, ... instructions we have obfuscated the intention so much that the backend does not know how to fold this code away. radar://15336950 llvm-svn: 193573
* Adding a workaround for __main linking with remote lli and Cygwin/MinGWAndrew Kaylor2013-10-298-21/+3
| | | | llvm-svn: 193570
* Move the STT_FILE symbols out of the normal symbol table processing forJoerg Sonnenberger2013-10-291-0/+47
| | | | | | | ELF. They can overlap with the other symbols, e.g. if a source file "foo.c" contains a function "foo" with a static variable "c". llvm-svn: 193569
* Debug Info: use createAndAddDIE for newly-created Subprogram DIEs.Manman Ren2013-10-295-14/+22
| | | | | | | | | | | More patches will be submitted to convert "new DIE(" to use createAddAndDIE in DwarfCompileUnit.cpp. This will simplify implementation of addDIEEntry where we have to decide between ref4 and ref_addr, because DIEs that can be shared across CU will be added to a CU already. Reviewed off-list by Eric. llvm-svn: 193567
* Renaming MCJIT .ir files to .ll and moving them to InputsAndrew Kaylor2013-10-2816-9/+9
| | | | llvm-svn: 193562
* lit: add missing substitutions for recently added toolsAlp Toker2013-10-282-0/+4
| | | | | | | llvm-mcmarkup, obj2yaml and yaml2obj were missing from the substitutions list, causing the test suite to fail in a sandboxed environment. llvm-svn: 193559
* Quote potential shell expansions found in testsAlp Toker2013-10-282-2/+2
| | | | llvm-svn: 193558
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-29/+44
| | | | llvm-svn: 193548
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-34/+61
| | | | llvm-svn: 193547
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-31/+56
| | | | llvm-svn: 193546
* Standardizing lli's extra module command line optionAndrew Kaylor2013-10-289-9/+9
| | | | llvm-svn: 193544
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-27/+41
| | | | llvm-svn: 193539
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-16/+209
| | | | llvm-svn: 193538
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-17/+59
| | | | llvm-svn: 193537
* Convert another llc -filetype=obj test.Rafael Espindola2013-10-282-17/+33
| | | | llvm-svn: 193536
* Return early from getUnconditionalBranchTargetOpValue if the branch target isLang Hames2013-10-281-2/+2
| | | | | | | | | | | | | | | | | an MCExpr, in order to avoid writing an encoded zero value in the immediate field. When getUnconditionalBranchTargetOpValue is called with an MCExpr target, we don't know what the final immediate field value should be. We shouldn't explicitly set the immediate field to an encoded zero value as zero is encoded with a non-zero bit pattern. This leads to bits being set that pollute the final immediate value. The nature of the encoding is such that the polluted bits only affect very large immediate values, explaining why this hasn't caused problems earlier. Fixes <rdar://problem/15155975>. llvm-svn: 193535
* Convert a llc -filetype=obj test into a llvm-mc test.Rafael Espindola2013-10-282-16/+98
| | | | llvm-svn: 193534
* [arm] Implement eabi_attribute, cpu, and fpu directives.Logan Chien2013-10-286-38/+393
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit allows the ARM integrated assembler to parse and assemble the code with .eabi_attribute, .cpu, and .fpu directives. To implement the feature, this commit moves the code from AttrEmitter to ARMTargetStreamers, and several new test cases related to cortex-m4, cortex-r5, and cortex-a15 are added. Besides, this commit also change the Subtarget->isFPOnlySP() to Subtarget->hasD16() to match the usage of .fpu directive. This commit changes the test cases: * Several .eabi_attribute directives in 2010-09-29-mc-asm-header-test.ll are removed because the .fpu directive already cover the functionality. * In the Cortex-A15 test case, the value for Tag_Advanced_SIMD_arch has be changed from 1 to 2, which is more precise. llvm-svn: 193524
* [SystemZ] Set usaAA to trueRichard Sandiford2013-10-285-18/+19
| | | | | | | | | | | | | | | | useAA significantly improves the handling of vector code that has TBAA information attached. It also helps other cases, as shown by the testsuite changes here. The only real downside I've seen is that it interferes with MergeConsecutiveStores. The problem is that that optimization works top down, starting at the first store in the chain, and looks for cases where the chain result is only used by a single related store. These related stores don't alias, so useAA will have rewritten all the later stores to use a different chain input (typically the same one as the first store). I think the advantages outweigh the disadvantages though, so for now I've just disabled alias analysis for the unaligned-01.ll test. llvm-svn: 193521
* [DAGCombiner] Respect volatility when checking for aliasesRichard Sandiford2013-10-281-1/+2
| | | | | | | | Making useAA() default to true for SystemZ showed that the combiner alias analysis wasn't handling volatile accesses. This hit many of the SystemZ tests, but I arbitrarily picked one for the purpose of this patch. llvm-svn: 193518
* Keep TBAA info when rewriting SelectionDAG loads and storesRichard Sandiford2013-10-281-0/+20
| | | | | | | | | | | | | | | | | Most SelectionDAG code drops the TBAA info when creating a new form of a load and store (e.g. during legalization, or when converting a plain load to an extending one). This patch tries to catch all cases where the TBAA information can legitimately be carried over. The patch adds alternative forms of getLoad() and getExtLoad() that take a MachineMemOperand instead of individual fields. (The corresponding getTruncStore() already exists.) The idea is to use the MachineMemOperand forms when all fields are carried over (size, pointer info, isVolatile, isNonTemporal, alignment and TBAA info). If some adjustment is being made, e.g. to narrow the load, then we still pass the individual fields but also pass the TBAA info. llvm-svn: 193517
* SCEV: Make the final add of an inbounds GEP nuw if we know that the index is ↵Benjamin Kramer2013-10-281-2/+38
| | | | | | | | | | | | | | | | | | | | | | | positive. We can't do this for the general case as saying a GEP with a negative index doesn't have unsigned wrap isn't valid for negative indices. %gep = getelementptr inbounds i32* %p, i64 -1 But an inbounds GEP cannot run past the end of address space. So we check for the very common case of a positive index and make GEPs derived from that NUW. Together with Andy's recent non-unit stride work this lets us analyze loops like void foo3(int *a, int *b) { for (; a < b; a++) {} } PR12375, PR12376. Differential Revision: http://llvm-reviews.chandlerc.com/D2033 llvm-svn: 193514
* Make first substantial checkin of my port of ARM constant islands code to Mips.Reed Kotler2013-10-271-0/+35
| | | | | | | | | | | | Before I just ported the shell of the pass. I've tried to keep everything nearly identical to the ARM version. I think it will be very easy to eventually merge these two and create a new more general pass that other targets can use. I have some improvements I would like to make to allow pools to be shared across functions and some other things. When I'm all done we can think about making a more general pass. More to be ported but the basic mechanism works now almost as good as gcc mips16. llvm-svn: 193509
* MCJIT-remote: __main should be resolved in child context.NAKAMURA Takumi2013-10-278-5/+24
| | | | | | | | | | | | | | | - Mark tests as XFAIL:cygming in test/ExecutionEngine/MCJIT/remote. Rather to suppress them, I'd like to leave them running as XFAIL. - Revert r193472. RecordMemoryManager no longer resolves __main on cygming. There are a couple of issues. - X86 Codegen emits "call __main" in @main for targeting cygming. It is useless in JIT. FYI, tests are passing when emitting __main is disabled. - Current remote JIT does not resolve any symbols in child context. FIXME: __main should be disabled, or remote JIT should resolve __main. llvm-svn: 193498
* AVX-512: PMIN/PMAX intrinsics and patternsElena Demikhovsky2013-10-271-0/+56
| | | | | | Patch by Cameron McInally <cameron.mcinally@nyu.edu> llvm-svn: 193497
* Revert r193251 : Use address-taken to disambiguate global variable and ↵Shuxin Yang2013-10-277-38/+9
| | | | | | indirect memops. llvm-svn: 193489
* llvm/test/lit.cfg: Tighten conditions to enable 'native'.NAKAMURA Takumi2013-10-261-1/+3
| | | | | | | I saw the case that 'native' was mis-enabled when x86_64-pc-win32 on x86_64-linux. FIXME: Consider cases that target can be executed even if host_triple were different from target_triple. llvm-svn: 193459
* llvm/test/Other/close-stderr.ll: Remove "XFAIL:win32". It reverts r173509.NAKAMURA Takumi2013-10-261-3/+0
| | | | | | "REQUIRES: shell" should cover if this failed. llvm-svn: 193458
* Fix SCEVExpander: don't try to expand quadratic recurrences outside a loop.Andrew Trick2013-10-251-0/+42
| | | | | | | | | | | | Partial fix for PR17459: wrong code at -O3 on x86_64-linux-gnu (affecting trunk and 3.3) When SCEV expands a recurrence outside of a loop it attempts to scale by the stride of the recurrence. Chained recurrences don't work that way. We could compute binomial coefficients, but would hve to guarantee that the chained AddRec's are in a perfectly reduced form. llvm-svn: 193438
* Fix LSR: don't normalize quadratic recurrences.Andrew Trick2013-10-251-6/+38
| | | | | | | | | | Partial fix for PR17459: wrong code at -O3 on x86_64-linux-gnu (affecting trunk and 3.3) ScalarEvolutionNormalization was attempting to normalize by adding and subtracting strides. Chained recurrences don't work that way. llvm-svn: 193437
* Handle calls and invokes in GlobalStatus.Rafael Espindola2013-10-251-0/+37
| | | | | | | | | | | This patch teaches GlobalStatus to analyze a call that uses the global value as a callee, not as an argument. With this change internalize call handle the common use of linkonce_odr functions. This reduces the number of linkonce_odr functions in a LTO build of clang (checked with the emit-llvm gold plugin option) from 1730 to 60. llvm-svn: 193436
* LoopVectorizer: Don't attempt to vectorize extractelement instructionsHal Finkel2013-10-251-0/+35
| | | | | | | | | | | | | | | The loop vectorizer does not currently understand how to vectorize extractelement instructions. The existing check, which excluded all vector-valued instructions, did not catch extractelement instructions because it checked only the return value. As a result, vectorization would proceed, producing illegal instructions like this: %58 = extractelement <2 x i32> %15, i32 0 %59 = extractelement i32 %58, i32 0 where the second extractelement is illegal because its first operand is not a vector. llvm-svn: 193434
* [X86][AVX512] Add patterns that match the AVX512 floating point register ↵Quentin Colombet2013-10-251-0/+14
| | | | | | | | vbroadcast intrinsics. Patch by Cameron McInally <cameron.mcinally@nyu.edu> llvm-svn: 193422
* [X86][AVX512] Add patterns that match the AVX512 floating point vbroadcast ↵Quentin Colombet2013-10-251-0/+14
| | | | | | | | intrinsics. Patch by Cameron McInally <cameron.mcinally@nyu.edu> llvm-svn: 193421
* ARM: allow .thumb_func to be separated from symbol definitionTim Northover2013-10-251-1/+1
| | | | | | | | | | When assembling, a .thumb_func directive is supposed to be applicable to the next symbol definition, even if there are intervening directives. We were racing ahead to try and find it, and this commit should fix the issue. Patch by Gabor Ballabas llvm-svn: 193403
* ARM: don't expand atomicrmw inline on Cortex-M0Tim Northover2013-10-251-0/+1
| | | | | | | | | | There's a barrier instruction so that should still be used, but most actual atomic operations are going to need a platform decision on the correct behaviour (either nop if single-threaded or OS-support otherwise). rdar://problem/15287210 llvm-svn: 193399
* LegalizeDAG: allow libcalls for max/min atomic operationsTim Northover2013-10-251-0/+24
| | | | | | | | | | | ARM processors without ldrex/strex need to be able to make libcalls for all atomic operations, including the newer min/max versions. The alternative would probably be expanding these operations in terms of cmpxchg (as x86 does always), but in the configurations where this matters code-size tends to be paramount so the libcall is more desirable. llvm-svn: 193398
* ARM: tweak test to pass on all platformsTim Northover2013-10-251-1/+3
| | | | | | | A TableGen indeterminacy means that the reason for the failure can vary, and Windows gets the other option. llvm-svn: 193394
* ARM: Test r193381 a bit more thoroughly.Jim Grosbach2013-10-241-0/+2
| | | | | | Make sure we're predicating right based on CPU even if the triple is 'wrong'. llvm-svn: 193382
* ARM: Tweak usage of '*vfp' compiler_rt functions.Jim Grosbach2013-10-241-2/+2
| | | | | | | | | Only use them if the subtarget has ARM mode, as these routines are implemented as ARM code. rdar://15302004 llvm-svn: 193381
* Inliner: Handle readonly attribute per argument when adding memcpyTom Stellard2013-10-241-4/+29
| | | | | | Patch by: Vincent Lejeune llvm-svn: 193356
* I had to move and removeRenato Golin2013-10-241-46/+0
| | | | llvm-svn: 193355
* ARM: Mark double-precision instructions as suchTim Northover2013-10-242-0/+200
| | | | | | | | | | | | This prevents us from silently accepting invalid instructions on (for example) Cortex-M4 with just single-precision VFP support. No tests for the extra Pat Requires because they're essentially assertions: the affected code should have been lowered to libcalls before ISel. rdar://problem/15302004 llvm-svn: 193354
* Fix broken builds by moving test to x86 dirRenato Golin2013-10-241-0/+46
| | | | llvm-svn: 193351
* Mark vector loops as already vectorizedRenato Golin2013-10-242-2/+49
| | | | | | | | Make sure we mark all loops (scalar and vector) when vectorizing, so that we don't try to vectorize them anymore. Also, set unroll to 1, since this is what we check for on early exit. llvm-svn: 193349
* ARM: add a couple more NEON predicates.Tim Northover2013-10-241-1/+12
| | | | | | | | The fused multiply instructions were added in VFPv4 but are still NEON instructions, in particular they shouldn't be available on a Cortex-M4 not matter how floaty it is. llvm-svn: 193342
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