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* TableGen: Add !foldl operationNicolai Haehnle2018-03-061-0/+71
| | | | | Change-Id: I63d67bf6e0b315e2d3360e47e3b62c9517f38987 llvm-svn: 326790
* TableGen: Delay instantiating inline anonymous recordsNicolai Haehnle2018-03-061-1/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Only instantiate anonymous records once all variable references in template arguments have been resolved. This allows patterns like the new test case, which in practice can appear in expressions like: class IntrinsicTypeProfile<list<LLVMType> ty, int shift> { list<LLVMType> types = !listconcat(ty, [llvm_any_ty, LLVMMatchType<shift>]); } class FooIntrinsic<IntrinsicTypeProfile P, ...> : Intrinsic<..., P.types, ...>; Without this change, the anonymous LLVMMatchType instantiation would never get resolved. Another consequence of this change is that anonymous inline instantiations are uniqued via the folding set of the newly introduced VarDefInit. Change-Id: I7a7041a20e297cf98c9109b28d85e64e176c932a Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43756 llvm-svn: 326788
* TableGen: Explicitly check whether a record has been resolvedNicolai Haehnle2018-03-062-12/+2
| | | | | | | | | | | | | | | | | | Summary: There are various places where resolving and constant folds can get stuck, especially around casts. We don't always signal an error for those, because in many cases they can legitimately occur without being an error in the "untaken branch" of an !if. Change-Id: I3befc0e4234c8e6cc61190504702918c9f29ce5c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43754 llvm-svn: 326786
* TableGen: Allow !cast of records, cleanup conversion machineryNicolai Haehnle2018-03-064-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Distinguish two relationships between types: is-a and convertible-to. For example, a bit is not an int or vice versa, but they can be converted into each other (with range checks that you can think of as "dynamic": unlike other type checks, those range checks do not happen during parsing, but only once the final values have been established). Actually converting initializers between types is subtle: even when values of type A can be converted to type B (e.g. int into string), it may not be possible to do so with a concrete initializer (e.g., a VarInit that refers to a variable of type int cannot be immediately converted to a string). For this reason, distinguish between getCastTo and convertInitializerTo: the latter implements the actual conversion when appropriate, while the former will first try to do the actual conversion and fall back to introducing a !cast operation so that the conversion will be delayed until variable references have been resolved. To make the approach of adding !cast operations to work, !cast needs to fallback to convertInitializerTo when the special string <-> record logic does not apply. This enables casting records to a subclass, although that new functionality is only truly useful together with !isa, which will be added in a later change. The test is removed because it uses !srl on a bit sequence, which cannot really be supported consistently, but luckily isn't used anywhere either. Change-Id: I98168bf52649176654ed2ec61a29bdb29970cfe7 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43753 llvm-svn: 326785
* TableGen: Simplify BitsInit::resolveReferencesNicolai Haehnle2018-03-061-1/+30
| | | | | | | | | | | | | | | | | | | | Summary: No functional change intended. The removed code has a loop for recursive resolving, which is superseded by the recursive resolving done by the Resolver implementations. Add a test case which was broken by an earlier version of this change. Change-Id: Ib208d037b77a8bbb725977f1388601fc984723d8 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43655 llvm-svn: 326784
* TableGen: Generalize record types to fix typeIsConvertibleTo et al.Nicolai Haehnle2018-03-062-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: Allow RecordRecTy to represent the type "subclass of N superclasses", where N may be zero. Furthermore, generate RecordRecTy instances only with actual classes in the list. Keeping track of multiple superclasses is required to resolve the type of a list correctly in some cases. The old code relied on the incorrect behavior of typeIsConvertibleTo, and an earlier version of this change relied on a modified ordering of superclasses (it was committed in r325884 and then reverted because unfortunately some of clang-tblgen's backends depend on the ordering). Previously, the DefInit for each Record would have a RecordRecTy of that Record as its type. Now, all defs with the same superclasses will share the same type. This allows us to be more consistent about type checks involving records: - typeIsConvertibleTo actually requires the LHS to be a subtype of the RHS - resolveTypes will return the least supertype of given record types in all cases - different record types in the two branches of an !if are handled correctly Add a test that used to be accepted without flagging the obvious type error. Change-Id: Ib366db1a4e6a079f1a0851e469b402cddae76714 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43680 llvm-svn: 326783
* [AVR] Remove the earlyclobber flag from LDDWRdYQDylan McKay2018-03-061-0/+139
| | | | | | | | | | | | | | | | | Before I started maintaining the AVR backend, this instruction never originally used to have an earlyclobber flag. Some time afterwards (years ago), I must've added it back in, not realising that it was left out for a reason. This pseudo instrction exists solely to work around a long standing bug in the register allocator. Before this commit, the LDDWRdYQ pseudo was not actually working around any bug. With the earlyclobber flag removed again, the LDDWRdYQ pseudo now correctly works around PR13375 again. llvm-svn: 326774
* [DebugInfo] Discard invalid DBG_VALUE instructions in LiveDebugVariablesBjorn Pettersson2018-03-062-3/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This is a workaround for pr36417 https://bugs.llvm.org/show_bug.cgi?id=36417 LiveDebugVariables will now verify that the DBG_VALUE instructions are sane (prior to register allocation) by asking LIS if a virtual register used in the DBG_VALUE is live (or dead def) in the slot index before the DBG_VALUE. If it isn't sane the DBG_VALUE is discarded. One pass that was identified as introducing non-sane DBG_VALUE instructtons, when analysing pr36417, was the DAG->DAG Instruction Selection. It sometimes inserts DBG_VALUE instructions referring to a virtual register that is defined later in the same basic block. So it is a use before def kind of problem. The DBG_VALUE is typically inserted in the beginning of a basic block when this happens. The problem can be seen in the test case test/DebugInfo/X86/dbg-value-inlined-parameter.ll Reviewers: aprantl, rnk, probinson Reviewed By: aprantl Subscribers: vsk, davide, alexcrichton, Ka-Ka, eraman, llvm-commits, JDevlieghere Differential Revision: https://reviews.llvm.org/D43956 llvm-svn: 326769
* [X86] Handle EAX being live when calling chkstk for x86_64Martin Storsjo2018-03-061-0/+36
| | | | | | | | | | | | EAX can turn out to be alive here, when shrink wrapping is done (which is allowed when using dwarf exceptions, contrary to the normal case with WinCFI). This fixes PR36487. Differential Revision: https://reviews.llvm.org/D43968 llvm-svn: 326764
* Revert "[DWARFv5] Emit file 0 to the line table."Paul Robinson2018-03-069-84/+56
| | | | | | | | | Caused an asan failure. This reverts commit d54883f081186cdcce74e6f98cfc0438579ec019. aka r326758 llvm-svn: 326762
* [DWARFv5] Emit file 0 to the line table.Paul Robinson2018-03-069-56/+84
| | | | | | | | | | | DWARF v5 specifies that the root file (also given in the DW_AT_name attribute of the compilation unit DIE) should be emitted explicitly to the line table's list of files. This makes the line table more independent of the .debug_info section. Differential Revision: https://reviews.llvm.org/D44054 llvm-svn: 326758
* Disable llvm-opt-fuzzer/exec-options.ll on Windows, it is too flakyReid Kleckner2018-03-051-0/+6
| | | | llvm-svn: 326752
* GlobalISel: IRTranslate llvm.fabs.* intrinsicVolkan Keles2018-03-051-0/+11
| | | | | | | | | | | | | | | | Summary: Fabs is a common floating-point operation, especially for some expansions. This patch adds a new generic opcode for llvm.fabs.* intrinsic in order to avoid building/matching this intrinsic. Reviewers: qcolombet, aditya_nandakumar, dsanders, rovka Reviewed By: aditya_nandakumar Subscribers: kristof.beyls, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D43864 llvm-svn: 326749
* [RewriteStatepoints] Fix stale parse pointsDaniel Neilson2018-03-053-10/+52
| | | | | | | | | | | | | | | | | | | | | | | | Summary: RewriteStatepointsForGC collects parse points for further processing. During the collection if a callsite is found in an unreachable block (DominatorTree::isReachableFromEntry()) then all unreachable blocks are removed by removeUnreachableBlocks(). Some of the removed blocks could have been reachable according to DominatorTree::isReachableFromEntry(). In this case the collected parse points became stale and resulted in a crash when accessed. The fix is to unconditionally canonicalize the IR to removeUnreachableBlocks and then collect the parse points. The added test crashes with the old version and passes with this patch. Patch by Yevgeny Rouban! Reviewed by: Anna Differential Revision: https://reviews.llvm.org/D43929 llvm-svn: 326748
* [X86] Add silvermont fp arithmetic cost model testsSimon Pilgrim2018-03-051-0/+73
| | | | | | Add silvermont to existing high coverage tests instead of repeating in slm-arith-costs.ll llvm-svn: 326747
* [AVR] Fix the test suite after r326500.Dylan McKay2018-03-051-1/+1
| | | | | | r326500 subtly changed the way the instructions are printed. llvm-svn: 326742
* [SLP] Additional tests for stores vectorization, NFC.Alexey Bataev2018-03-051-0/+179
| | | | llvm-svn: 326740
* [PowerPC] Do not emit record-form rotates when record-form andi sufficesNemanja Ivanovic2018-03-052-1/+43
| | | | | | | | | | | | | | | | Up until Power9, the performance profile for rlwinm., rldicl. and andi. looked more or less equivalent. However with Power9, the rotates are still 2-way cracked whereas the and-immediate is not. This patch just ensures that we don't emit record-form rotates when an andi. is adequate. As first pointed out by Carrot in https://bugs.llvm.org/show_bug.cgi?id=30833 (this patch is a fix for that PR). Differential Revision: https://reviews.llvm.org/D43977 llvm-svn: 326736
* [x86] auto-generate full checks for fabs testsSanjay Patel2018-03-051-41/+85
| | | | | | | Also, change the x86-64 test to optimized and remove the unnecessary platform specification from the RUN lines.. llvm-svn: 326735
* On Windows expansion of regex file name patterns is the responsibility of eachDmitry Mikulin2018-03-051-0/+7
| | | | | | | | tool. Fix ar to do that. Differential Revision: https://reviews.llvm.org/D43987 llvm-svn: 326734
* [llvm-pdbdump] Dump restrict type qualifierAaron Smith2018-03-053-0/+80
| | | | | | | | | | | | Reviewers: zturner, llvm-commits, rnk Reviewed By: zturner Subscribers: majnemer Differential Revision: https://reviews.llvm.org/D43639 llvm-svn: 326731
* [InstCombine] Don't blow up in foldICmpWithCastAndCast on vector icmp ↵Daniel Neilson2018-03-051-0/+12
| | | | | | | | | | | | | | | | | | | | | | | instructions. Summary: Presently, InstCombiner::foldICmpWithCastAndCast() implicitly assumes that it is only invoked with icmp instructions of integer type. If that assumption is broken, and it is called with an icmp of vector type, then it fails (asserts/crashes). This patch addresses the deficiency. It allows it to simplify icmp (ptrtoint x), (ptrtoint/c) of vector type into a compare of the inputs, much as is done when the type is integer. Reviewers: apilipenko, fedor.sergeev, mkazantsev, anna Reviewed By: anna Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44063 llvm-svn: 326730
* [InstCombine] Add constant vector support to getMinimumFPType for visitFPTrunc.Craig Topper2018-03-051-8/+19
| | | | | | | | This patch teaches getMinimumFPType to support shrinking a vector of ConstantFPs. This should improve our ability to combine vector fptrunc with fp binops. Differential Revision: https://reviews.llvm.org/D43774 llvm-svn: 326729
* [AArch64] Harden test caseEvandro Menezes2018-03-051-151/+158
| | | | | | NFC llvm-svn: 326724
* fix PR36582Sebastian Pop2018-03-051-2/+15
| | | | | | | | | The error occurs when reading i16 elements (as in the testcase) from a v8i8 with a pattern of <0,2,4,6>. As all the data in the vector is accessed, the operation is not a VUZP. The patch stops the pattern recognition of VUZP when EXTRACT_VECTOR_ELT has a different element type than BUILD_VECTOR. llvm-svn: 326722
* [IPSCCP] Add getCompare which returns either true, false, undef or null.Florian Hahn2018-03-051-0/+26
| | | | | | | | | | | | | | | getCompare returns true, false or undef constants if the comparison can be evaluated, or nullptr if it cannot. This is in line with what ConstantExpr::getCompare returns. It also allows us to use ConstantExpr::getCompare for comparing constants. Reviewers: davide, mssimpso, dberlin, anna Reviewed By: davide Differential Revision: https://reviews.llvm.org/D43761 llvm-svn: 326720
* [AArch64] Improve code generation of constant vectorsEvandro Menezes2018-03-053-66/+163
| | | | | | | | | | | | | Use the whole gammut of constant immediates available to set up a vector. Instead of using, for example, `mov w0, #0xffff; dup v0.4s, w0`, which transfers between register files, use the more efficient `movi v0.4s, #-1` instead. Not limited to just a few values, but any immediate value that can be encoded by all the variants of `FMOV`, `MOVI`, `MVNI`, thus eliminating the need to there be patterns to optimize special cases. Differential revision: https://reviews.llvm.org/D42133 llvm-svn: 326718
* AMDGPU/GlobalISel: Add InstrMapping for G_EXTRACTMatt Arsenault2018-03-051-0/+31
| | | | llvm-svn: 326715
* AMDGPU/GlobalISel: Make some G_EXTRACTs legalMatt Arsenault2018-03-051-0/+105
| | | | | | | As far as I can tell legalization of weird sizes for the output type isn't implemented. llvm-svn: 326714
* Fuzzer: remove temporary files after we're done with them.Tim Northover2018-03-053-0/+10
| | | | | | | | These were just copies of the relevant fuzzer binary with (presumably) meaningful suffixes, but accounted for more than 10% of my build directory (> 8GB). Hard drive space is cheap, but not that cheap. llvm-svn: 326710
* TableGen: Resolve all template args simultaneously in AddSubClassNicolai Haehnle2018-03-051-0/+16
| | | | | | | | | | | | | | | | | | | | | | Summary: Use the new resolver interface more explicitly, and avoid traversing all the initializers multiple times. Add a test case for a pattern that was broken by an earlier version of this change. An additional change is that we now remove *all* template arguments after resolving them. Change-Id: I86c828c8cc84c18b052dfe0f64c0d5cbf3c4e13c Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43652 llvm-svn: 326706
* TableGen: Reimplement !foreach using the resolving mechanismNicolai Haehnle2018-03-055-59/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | Summary: This changes the syntax of !foreach so that the first "parameter" is a new syntactic variable: !foreach(x, lst, expr) will define the variable x within the scope of expr, and evaluation of the !foreach will substitute elements of the given list (or dag) for x in expr. Aside from leading to a nicer syntax, this allows more complex expressions where x is deeply nested, or even constant expressions in which x does not occur at all. !foreach is currently not actually used anywhere in trunk, but I plan to use it in the AMDGPU backend. If out-of-tree targets are using it, they can adjust to the new syntax very easily. Change-Id: Ib966694d8ab6542279d6bc358b6f4d767945a805 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits, tpr Differential Revision: https://reviews.llvm.org/D43651 llvm-svn: 326705
* Pass Divergence Analysis data to Selection DAG to drive divergenceAlexander Timofeev2018-03-052-16/+59
| | | | | | | | dependent instruction selection. Differential revision: https://reviews.llvm.org/D35267 llvm-svn: 326703
* TableGen: Allow NAME in template arguments in defm in multiclassNicolai Haehnle2018-03-052-0/+82
| | | | | | | | | | | | | | | | | | | | Summary: NAME has already worked for def in a multiclass, since the (protoype) record including its NAME variable is created before parsing the superclasses. Since defm's do not have an associated single record, support for NAME has to be implemented differently here. Original test cases provided by Artem Belevich (tra) Change-Id: I933b74f328c0ff202e7dc23a35b78f3505760cc9 Reviewers: arsenm, craig.topper, tra, MartinO Subscribers: wdng, llvm-commits Differential Revision: https://reviews.llvm.org/D43656 llvm-svn: 326700
* [MergeICmp] We can discard initial blocks that do other workXin Tong2018-03-051-0/+64
| | | | | | | | | | | | | | | | Summary: We can discard initial blocks that do other work We do not need to limit ourselves to just the first block in the chain. Reviewers: courbet, davide Reviewed By: courbet Subscribers: llvm-commits Differential Revision: https://reviews.llvm.org/D44029 llvm-svn: 326698
* [WebAssembly] Add validation to reloc sectionNicholas Wilson2018-03-052-1/+24
| | | | | | | | | | | | We now check relocations offsets are within range, and the relocation index is valid. Also updated tests which contained invalid Wasm files that were previously not checked. Differential Revision: https://reviews.llvm.org/D43684 llvm-svn: 326697
* [ARM][Asm] VMOVSRR and VMOVRRS need sequential S registersOliver Stannard2018-03-051-0/+6
| | | | | | | | | | These instructions require that the two S registers are adjacent (but not the R registers), because only the first register is included in the encoding, but we were not checking this in the assembler. Differential revision: https://reviews.llvm.org/D44084 llvm-svn: 326696
* [WebAssembly] Reorder reloc sections to come between symtab and nameNicholas Wilson2018-03-055-7/+7
| | | | | | | | | | | This is required in order to enable relocs to be validated as they are read in. Also update tests with new section ordering. Differential Revision: https://reviews.llvm.org/D43940 llvm-svn: 326694
* [WebAssembly] Fix tests with invalid yaml (required CODE section missing)Nicholas Wilson2018-03-053-3/+28
| | | | | | Differential Revision: https://reviews.llvm.org/D44023 llvm-svn: 326692
* [X86] Add a DAG combine to turn stores of vXi1 constants into scalar stores.Craig Topper2018-03-042-120/+26
| | | | llvm-svn: 326679
* [X86] Add a 32-bit mode command line to avx512-mask-op.ll. Add tests for ↵Craig Topper2018-03-041-0/+711
| | | | | | storing v2i1 and v4i1 constants. llvm-svn: 326678
* [DAGCombiner] Add a peekThroughBitcast to MergeStoresOfConstantsOrVecElts to ↵Craig Topper2018-03-041-0/+32
| | | | | | | | fix a crash if we are storing a bitcast of a constant. Loading a constant into a k-register in AVX512 requires a bitcast from a scalar constant. In the test case here we have a k-register store that gets split into multiple parts of KNL. MergeConsecutiveStores sees each of these pieces as a consecutive store and looks through the bitcast to find the underly scalar constant. But when we went to create the combined store we didn't look through the same bitcast. llvm-svn: 326677
* [X86][X87] Add X87 folded integer arithmetic testsSimon Pilgrim2018-03-041-0/+621
| | | | | | | | Add tests for FIADD/FISUB/FISUBR/FIMUL/FIDIV/FIDIVR Shows we have more FILD stack usage than necessary (arg load, spill, reload to x87) llvm-svn: 326674
* [X86] Combine (store (v1i1 (scalar_to_vector (i8 X)))) -> (store (i8 X)).Craig Topper2018-03-041-14/+14
| | | | llvm-svn: 326670
* [X86] Lower v1i1/v2i1/v4i1/v8i1 load/stores to i8 load/store during op ↵Craig Topper2018-03-041-6/+2
| | | | | | | | legalization if AVX512DQ is not supported. We were previously doing this with isel patterns. Moving it to op legalization gives us chance to see the required bitcast earlier. And it lets us remove some isel patterns. llvm-svn: 326669
* [CallSiteSplitting] properly split musttail callsFedor Indutny2018-03-031-0/+75
| | | | | | | | | | | | | | | | | | | | Summary: `musttail` calls can't be naively splitted. The split blocks must include not only the call instruction itself, but also (optional) `bitcast` and `return` instructions that follow it. Clone `bitcast` and `ret`, place them into the split blocks, and remove the tail block when done. Reviewers: junbuml, mcrosier, davidxl, davide, fhahn Reviewed By: fhahn Subscribers: JDevlieghere, llvm-commits Differential Revision: https://reviews.llvm.org/D43729 llvm-svn: 326666
* [InstCombine] add test for vectors with undef elts; NFCSanjay Patel2018-03-031-1/+14
| | | | llvm-svn: 326661
* [InstCombine] (~X) - (~Y) --> Y - XSanjay Patel2018-03-031-4/+2
| | | | llvm-svn: 326660
* [InstCombine] add tests for notnotsub; NFCSanjay Patel2018-03-031-0/+36
| | | | | | | As shown in D44043, we may need this fold in the backend, but it's also missing in the IR optimizer. llvm-svn: 326659
* [ThinLTO] Revert r325320: Import global variablesChandler Carruth2018-03-024-39/+3
| | | | | | | | | | | | | | This caused some links to fail with ThinLTO due to missing symbols as well as causing some binaries to have failures at runtime. We're working with the author to get a test case, but want to get the tree green again. Further, it appears to introduce a data race. While the test usage of threads was disabled in r325361 & r325362, that isn't an acceptable fix. I've reverted both of these as well. This code needs to be thread safe. Test cases for this are already on the original commit thread. llvm-svn: 326638
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